AM625: Boot from QSPI WINBOND Nor flash

Shibi,

Shibi MAnoharan said:

2. Does it need PHY calibration?

This only applies to high speed DDR/SDR modes (>50MHz speed), and this not working for example due to missing calibration patters should usually not prevent you from doing a basic boot as the drivers should fall back to slower operation.

Shibi MAnoharan said:

FYI: I tried to boot from DFU and from the u-boot console I could probe the nor flash and read and write to it.

That's great that means lots of things in your system seem to be working right, including the QSPI device it seems, as well as DDR.

We should double-check the device tree configuration. Can you post your complete QSPI-related changes here (as a `diff`). And which specific Flash chip are you using?

Also do you have the ability to use JTAG on your board? Usually a quick "attach" using CCS for example and checking R5F core operation in this case will quickly show if something is off.

One more thing you can do is enabling diagnostic/debug prints for the QSPI/OSPI driver by adding the following line...

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 0448b9929ca..223bdd972ee 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -4,6 +4,8 @@
  * Altera Corporation <www.altera.com>
  */

+#define DEBUG
+
 #include <common.h>
 #include <clk.h>
 #include <log.h>

Regards, Andreas

Hi Andreas,

          Apologize for the late reply. I enabled the debug console and found that the boot is getting stuck at this point.

Do I need to add the below line? It is not present currently

include/mach/j721e_spl.h:18:#define BOOT_DEVICE_NOR BOOT_DEVICE_HYPERFLASH

U-Boot SPL 2024.04-00003-g5fdf8a4b1e-dirty (Feb 12 2025 - 19:28:57 +0530)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.8--v09.02.08 (Kool Koala)')
SPL initial stack usage: 13416 bytes
Trying to boot from NOR flashSPI
Loading image
drivers/pinctrl/pinctrl-uclass.c:87-pinctrl_select_state_full() cadence_spi spi@fc40000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
drivers/pinctrl/pinctrl-uclass.c:87-pinctrl_select_state_full() cadence_spi spi@fc40000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
drivers/pinctrl/pinctrl-uclass.c:87-pinctrl_select_state_full() cadence_spi spi@fc40000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19
drivers/pinctrl/pinctrl-uclass.c:87-pinctrl_select_state_full() cadence_spi spi@fc40000: pinctrl_select_state_full: uclass_get_device_by_phandle_id: err=-19

I was facing some build errors while compiling with SPL_NOR support.  I had to add the below lines to fix it. I am not sure whether this configuration is correct.

diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h
index 6ef79d1ba0..b4432779bf 100644
--- a/include/configs/am62x_evm.h
+++ b/include/configs/am62x_evm.h
@@ -28,4 +28,6 @@
#define CFG_SYS_NAND_ECCBYTES 14
/*-- end NAND config --*/

+#define CFG_SYS_UBOOT_BASE 0x50280000
+
#endif /* __CONFIG_AM625_EVM_H */

--- a/arch/arm/mach-k3/include/mach/am62_spl.h
+++ b/arch/arm/mach-k3/include/mach/am62_spl.h
@@ -7,6 +7,11 @@
#ifndef _ASM_ARCH_AM62_SPL_H_
#define _ASM_ARCH_AM62_SPL_H_

+
+#define BOOT_DEVICE_HYPERFLASH 0x00
+#define BOOT_DEVICE_NOR BOOT_DEVICE_QSPI
+
+
/* Primary BootMode devices */
#define BOOT_DEVICE_SERIAL_NAND 0x00
#define BOOT_DEVICE_OSPI 0x01

&ospi0 {
status = "okay";
pinctrl-names = "default";
@@ -193,7 +260,7 @@
flash@0 {
compatible = "jedec,spi-nor";
reg=<0>;
- spi-tx-bus-width = <4>; // Quad SPI nor transmit
+ spi-tx-bus-width = <1>; // Quad SPI nor transmit
spi-rx-bus-width = <4>; // Quad SPI nor receive
spi-max-frequency = <50000000>;
cdns,tshsl-ns = <60>;
@@ -203,28 +270,49 @@
cdns,read-delay = <2>;
cdns,phy-mode;

- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
- bootph-all;
-
- partition@0 {
- label = "qspi.tiboot3";
- reg = <0x00 0x80000>;
- };
+partitions {
+ bootph-all;
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "ospi.tiboot3";
+ reg = <0x0 0x80000>;
+ };
+
+ partition@80000 {
+ label = "ospi.tispl";
+ reg = <0x80000 0x200000>;
+ };
+
+ partition@280000 {
+ label = "ospi.u-boot";
+ reg = <0x280000 0x400000>;
+ };
+
+ partition@680000 {
+ label = "ospi.env";
+ reg = <0x680000 0x40000>;
+ };
+
+ partition@6c0000 {
+ label = "ospi.env.backup";
+ reg = <0x6c0000 0x40000>;
+ };
+
+ partition@800000 {
+ label = "ospi.rootfs";
+ reg = <0x800000 0x37c0000>;
+ };
+
+ partition@3fc0000 {
+ bootph-pre-ram;
+ label = "ospi.phypattern";
+ reg = <0x3fc0000 0x40000>;
+ };
+ };

- partition@80000 {
- label = "qspi.tispl";
- reg = <0x80000 0x200000>;
- };
- partition@280000 {
- label = "qspi.u-boot";
- reg = <0x280000 0x400000>;
- };
-
-
- };

};
};

Shibi,

does this still need attention? If so, please provide latest status of experimentation/debug effort.

Regards, Andreas