Tool/software:
Hi TI experts
I need to use PCIe interface with Xilinx FPGA xdma ip core with R5F to get enough real-time performance. The test under A53 Linux is ok, but when I use R5F AM64x MCU+ SDK: PCIE buffer transfer RC example, the link can't reach L0 and the status(ltssmStateReg.ltssmState) is always 'PCIE_LTSSM_POLL_COMPLIANCE', which is 0x03.
I have found a thread discussing very similar issue: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1440868/am6442-configure-pcie-rc-in-r5f The reply is that MCUSDK based RC is designed to work with MCUSDK based EP only, not generic EP.
I also found a thread: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1398510/tmds243evm-pcie-rc-read-ep-bar-info-stuck-243evm-intel-fpga , I think in this example the link is established.
So I think although the api can't directly used for generic pcie ep, it's possible to set up link with some modify or I can write my own code.
Do you have any suggestion?
Thanks a lot
Yuqiao