Other Parts Discussed in Thread: SYSCONFIG
Tool/software:
Hi TI Experts,
Do you have recommendations on using MCASP Audio peripheral?
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Hi Board Designers,
Multichannel Audio Serial Port (MCASP)
The MCASP functions as a general-purpose audio serial port and are optimized to the requirements of various audio applications. The MCASP module can operate in both transmit and receive modes. The MCASP is useful for
time-division multiplexed (TDM) stream, Inter-IC Sound (I2S) protocols reception and transmission as well as for an inter-component digital audio interface transmission (DIT). The MCASP has the flexibility to gluelessly connect to a Sony/Philips digital interface (S/PDIF) transmit physical layer component.
Multichannel Serial Peripheral Interface (MCSPI)
The MCSPI module is a multichannel transmit/receive, controller/peripheral synchronous serial bus.
McASP Design Guide - Tips, Tricks, and Practical Examples
https://www.ti.com/lit/an/sprack0/sprack0.pdf
Data pins for McASP instances
(25) AM62D-Q1: McASP Audio Ports - Processors forum - Processors - TI E2E support forums
3x Multichannel Audio Serial Ports (McASP)
– Transmit and Receive Clocks up to 50MHz
– Up to 4/6/16 Serial Data Pins across 3x McASP with Independent TX and RX Clocks
https://www.ti.com/lit/ds/symlink/am62d-q1.pdf
Regards,
Sreenivasa
Hi Board Designers,
Refer below FAQs:
e2e.ti.com/.../am620-q1-mcasp-interface
Please refer below inputs i received from the expert.
The proposed setup looks ok. Since not details on the communication format have been provide, just some comments on the configuration.
MCASP0 * Bluetooth and Tuner must be running with the same format (TDM/I2S/etc) and word size setup and are synchronized with the bit clock and frame Sync
MCASP2 * Codec and amplifier must be running with the same format (TDM/I2S/etc) and word size setup and are synchronized with the bit clock and frame Sync
Two devices can be connected to McASP. It is recommended to follow good layout practices when routing the bit clock. Use the IBIS model to check signal integrity.
The required configuration is valid. Please use the SysConfig tool to ensure correct peripheral/IOSet configuration.
Synchronous Transmit and Receive Operations -
When the MCASP_ACLKXCTL[6] ASYNC bit is written to 0b0, the transmit and receive sections operate
synchronously to the transmit section clock and transmit frame sync signals.
Though Rx section may have a different data format, it has to be configured to have the same slot size than
the transmit section one.
e2e.ti.com/.../66ak2g12-soc-to-codec-connection-and-design-verification
Each McASP serializer can be set as either Rx, Tx, or none. You can see an example within k3-j721e-common-proc-board.dts where mcasp10 has 4 serializers set as Tx and 3 serializers set as Rx.
e2e.ti.com/.../5616314
e2e.ti.com/.../5746365
e2e.ti.com/.../5743314
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1469999/audio-am62d-evm-how-to-get-a-quick-start-with-am62d/5644096?tisearch=e2e-sitesearch&keymatch=MCASP#5644096
Regards,
Sreenivasa