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J784S4XEVM: Suspend to RAM and Wakeup enable via CAN for PMIC IC TPS6594133ARWERQ1 in J784S4XEVM.

Part Number: J784S4XEVM
Other Parts Discussed in Thread: TDA4VH, TCAN1043-Q1

Tool/software:

J784S4XG01EVM (TDA4AP, TDA4VP, TDA4AH, TDA4VH)

Revision: PROC141E4

PMIC: TPS6594133ARWERQ1

Hi Nichloas McNamara, We are currently using the J784S4XG01EVM board for our POC development work. We need your support on implementing Suspend-to-RAM functionality on the TDA4 (J784S4 EVM).

Currently, we are able to successfully transition the system into Suspend-to-RAM mode. We would like to confirm our implementation approach with you to ensure it aligns with TI’s recommended method for this platform..
Additionally, we are looking to enable wake-up from Suspend-to-RAM via CAN. We would appreciate your guidance on how to configure this, and any assistance you can provide would be highly valuable.
Regards,
Tanishq Kanungo
  • Hi,

    Our expect is on vacation this week, Kindly wait for response.

    Best Regards,
    Sudheer

  • Hello Tanishq,

    Thanks for your patience. What os are you using for the suspend to ram? Are you using Linux? Or is this your own bare metal implementation of s2r?

    Best Regards,

    Keerthy

  • Hello Keerthy J,

    Thank you for your response. Yes, we are currently using Linux as the OS for our S2R implementation. We would like to confirm that our approach aligns with TI's recommended method for this platform, and also request your support for configuring CAN wake-up from Suspend to RAM. Additionally, if possible, we would appreciate the opportunity to schedule a call to discuss our implementation and clarify a few details more effectively.

    Regards,

    Tanishq Kanungo

  • Hello Tanishq,

    In addition to the email, I'm also posting my response here for availability for all parties involved.

    1. What is the target PDN for this system, PDN-3A, PDN-3F, PDN-3G, PDN-3M, or PDN-3X etc….
    2. After the I2C_7 is set, when transitioning to the S2R state, what is the target wake up state?

     

    From the PMIC side this is what is required as you know, setting the desired wake-up destination state is done by setting the register below.

     

    DDR Retention (aka DDR_RET, Suspend-to-RAM, S2R) low power mode requires:

    1. PMIC PN to assign GPIO_6 = Regulator Enable (REGEN) function with an open-drain output buffer type per NVM default settings. The board level net H_DDR_RET_1V1 signal is pulled up to VDD_DDR_1V1 & connected to SoC’s DDR_RET input. When this input is set high, SoC’s EMIF IO buffers are set to high-Z state as part of entering DDR_RET mode.
    1. B) SoC SW executes command sequence that sets key PMIC register bits in order to enter DDR_RET low power mode of operation and select the desired wake-up destination state (i.e. Full Active or MCU Only).
    2. C) After entering DDR_RET mode, the following power rails will remain energized & all other SoC MCU & Main supplies will be shut off to minimize power:
    3. VDD_DDR_1V1 supplying both SoC EMIF & SDRAM IO voltages
    4. VDD1_DDR_1V8 supplying SDRAM only
    5. D) PDN system exits DDR_RET upon detecting a CAN_WAKE signal edge toggle on PMIC’s GPIO_4 = LP_WKUP1 function per NVM settings that initiates exiting DDR_RET mode & restores Full Active processor operations.

     

    As for the CAN_WKUP it should be a signal sent from the other end of the gate for the open drain, as for the configuration software for the CAN receiver I'll let  Keerthy make clarifications.

    Best Regards,

    Nicholas McNamara

  • Hello Nicholas McNamara,  Keerthy J,

    Thank you for the details provided. Please find our response below:
    1. Target PDN: We are using PDN-3A for this system.
    2. Target Wake-up State: The intended wake-up destination state is Full Active. we verified the RTC_CTRL_2 (C3h) register value as 0xE1, confirming the correct Wake-up State configuration.

    GPIO_6 is configured as REGEN with open-drain output, per NVM default settings. The DDR_RET flow is properly implemented, and we are successfully transitioning into Suspend-to-RAM (S2R) mode

    Request for Guidance on CAN Wake via GPIO_4 (LP_WKUP1):
    We would appreciate guidance for correctly setting up the CAN wake-up mechanism using GPIO_4 (LP_WKUP1). We understand that a signal edge toggle on GPIO_4 is required to trigger exit from DDR_RET and resume to Full Active mode.
    We would appreciate support in configuring the software stack to enable CAN-based wake-up.

    Specifically:
    How to properly configure the wake-up frame on the CAN controller to detect the CAN_WAKE signal via GPIO_4(LP_WKUP1).
    Is there a reference waveform or timing requirement for the CAN_WAKE signal to be recognized by LP_WKUP1?
    Your assistance with completing the wake-up via CAN is greatly appreciated.

    Regards,

    Tanishq Kanungo

  • Hello Tanishq,

    I'll be referring to this User's Guide for the PMIC here, with software instructions necessary to wake from the GPIO_4 pin: https://www.ti.com/lit/ug/slvuci2/slvuci2.pdf?ts=1745475706576

    The above comes from the User's Guide.

    As for the software needed for the CAN controller running on the J7 side, Keerthy can make comments on that.

    BR,

    Nicholas

  • Hello Hello Nicholas McNamara,  Keerthy J,

    I have also referred the same user guide for S2R/Retention mode. I have followed the below listed same sequence of command to successfully transitioning into Suspend-to-RAM (S2R) mode.

    I would appreciate your assistance in wakeup from retention using GPIO_4 triggered by CAN WUP frame.

    Regards,

    Tanishq Kanungo

  • Tanishq,

    The IO Retention mode is currently not supported in the SDK. Are you able to wake up the system from S2R mode using external wake up like PMIC GPIO? 

    Best Regards,

    Keerthy 

  • Tanishq,

    The IO Retention mode is currently not supported in the SDK. Are you able to wake up the system from S2R mode using external wake up like PMIC GPIO? 

    Best Regards,

    Keerthy 

  • Hello Keerthy, Nicholas McNamara,

    We are currently trying to wakeup from the S2R mode via CAN. As a part of this, we have identified that the PMIC wake up signal is routed to GPIO_4 (LP_WKUP1). our understanding is that a signal edge toggle on GPIO_4 is required to trigger exit from DDR_RET and resume to Full Active mode. We have also confirmed that INH pin (CAN_WKUP) of the TCAN1043-Q1 transceivers is connected to GPIO_4. This setup allows us to use the CAN transceiver to generate the necessary edge signal. To wakeup from S2R we plan to send the Wakeup frame to the TCAN1043-Q1 transceiver.

    However, we observed that the MAIN_CAN3 interface, which is required to send the wakeup frame, is currently not enabled in the device driver. We would appreciate support in configuring the software stack to enable CAN-based wake-up. 

    We would also like to request a call with TI team to discuss and for further analysis.

    Regards,

    Tanishq Kanungo.

  • Tanishq,

    Are you targeting an external wakeup or an Internal IO Wakeup? We do not have this implementation and without that I really cannot comment here.

    - Keerthy

  • Hello Keerthy,

    we are targeting an external wakeup via CAN. 

    Regards,

    Tanishq

  • Hello @Keerthy,

    Can we have a short call with your time. We have made necessary changes in SDK required. We would like to confirm if anything is missing. Also, would like to understand whether wakeup from S2R is possible on evalkit without any changes in PCB. We would like to discuss the issue.

    Regards,
    Geoff

  • Hi Geoff,

    Also, would like to understand whether wakeup from S2R is possible on evalkit without any changes in PCB

    There are some hardware changes required, but no changes in PCB required. The changes required are : 

     On PROC141E3 / J784S4XG01EVM and PROC141E4 / J784S4XG01EVM with these hardware changes:

    1. Mandatory: R658 moved to R659 (0 Ohm)
      1. Without this change, the board won't stay in suspend
    2. May not be necessary: Change R534 from pull-down to pull-up to VCCA_3V3 side of C320

    These changes are not the same for PROC141E2 / J784S4XG01EVM and PROC141E2A / J784S4XG01EVM.

    1. There will be additional changes required for the above boards which have not been worked out.
    2. There are two circuits driving the "SOC_PWR_WKn" signal in E3 and E4. This signal goes to PMIC and is required for waking up the SoC. Change 1 disables one of the circuit.

    One more thing to note would be that we have only verified wake from GPIO sources and not from TCAN signals. But in theory, if GPIO pins and TCAN's effect on SOC_PWR_WKn is same, there is no reason CAN shouldn't work.

    Regards,
    Tanmay

  • Hello Tanmay,

    Will check on hardware changes. Thanks for the info, this might help. 
    We have both PROC141E5/J784S4XG01EVM and  PROC141E4/J784S4XG01EVM. Currently, testing is performed on  PROC141E4/J784S4XG01EVM.
    Does PROC141E5/J784S4XG01EVM also require hardware changes?

    If you can share your mail id it would be helpful.

    Regards,
    Geoff
    mail: geoff.ar@tcs.com

  • Hello @Tanmay,

    Sequence followed : Transceiver enters sleep state -> S2R activated.
    Observation: VCC_12V0 is turned off. Fan stops. 

    • When S2R is performed after transceiver enters Sleep, Vcc_12V_0 is turned off(current consumption is reduced to zero with status LED active). Unable to do wakeup in this condition. (Wake pin is low). When SW15 is pressed current fan starts and current consumption rises to 0.3A.
    • When S2R is performed without transceiver entering sleep, current consumption is 0.3A VCC_12V_0 is active.

    Our intention is to wakeup the system from DDR retention to Active using CAN frame on MCAN3..  If R658 is removed, I guess it will not help in CAN based wakeup. 

    Also, are you referring to Change 1 + usage of PB_CAN_WAKEn  Switch as GPIO wakeup which was verified.


    Regards,
    Geoff

  • Hi Geoff,

    Also, are you referring to Change 1 + usage of PB_CAN_WAKEn  Switch as GPIO wakeup which was verified.

    What was verified was Change 1 + Change 1 +usage of SW15 to toggle PB_CAN_WAKEn which is inverted into SOC_PWR_WKn for wakeup signal

    Does PROC141E5/J784S4XG01EVM also require hardware changes?

    I will check this. But mostly yes, it also requires changes.

    Our intention is to wakeup the system from DDR retention to Active using CAN frame on MCAN3..  If R658 is removed, I guess it will not help in CAN based wakeup.

    Yes, removing R658 will not help in CAN based wake-up. You will have to attach R658 but remove U278/R1302. Then have the same behavior at SOC_PWR_WKn with CAN_WKUP.

    Regards,
    Tanmay