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Original question:

AM623: AM62x RTI WDT related question

AM6422: Boot counter implementation

Angel Gavrailov
Intellectual 270 points
Part Number: AM6442


Tool/software:

Dear TI experts,

we are trying to integrate an update/recovery system in our Yocto distribution. For the purpose, we need to implement a functionality of a boot counter. That is:

  • A counter, which is incremented on each boot trough u-boot
  • The same counter is reseted, as soon as Linux has booted and certain services are online
  • If the counter reaches a certain limit, the system goes into recovery mode

As you may guess, this counter has to survive resets - and optimally, but not 100% necessarily -  a power cycle. So the question here: does the AM64x have such kind of non-volatile registers/memories, which survive reset, either warm or cold, or even power cycling?

In the following forum post there is a hint, however for AM62x, so I hope that is also the case with AM64x:

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1229080/am623-am62x-rti-wdt-related-question?tisearch=e2e-sitesearch&keymatch=%22boot%20counter%22#

Thank you!

  • 0
    TI__Mastermind 49316 points

    Hello,

    We do not have any dedicated register that retains content across a Power-On Reset (POR).

    If you use any unused padcfg register to implement a use case—such as incrementing a count value on every warm reset—you will observe that the padcfg register retains its content during a warm reset.

    However, in the case of a POR, the content of the padcfg register will also be lost.

    So, if your requirement is to retain the count value across every POR, you will need to store it in a non-volatile memory like eMMC or flash. Unfortunately, we do not have any register that can retain its content across POR events.

    To summarize, both padcfg and MMR registers retain values only during a warm reset and not during a POR.

    Regards,

    Anil

  • 0 in reply to Swargam Anil
    Intellectual 270 points

    Hi Swargam,

    thanks for the answer. Can you tell me which exactly register you meant? I only found those at  0x04084000..0x04084080 (page 2228 of the AM64x TRM, SPRUIM2G). If so, I am afraid using one of those for saving arbitrary values is pretty dangerous, as those contain the pad configuration of the SOC.

    What do you think?

    Thanks!

  • +1 in reply to Angel Gavrailov
    TI__Mastermind 49316 points

    Hello,

    For example, I am not using the D7 pin and it is not connected to any external devices.

    So, I can use this Pin for writing data.

    And find these pins PADCFG register  addresses on the datasheet and use that PADCFG register..

    NOTE : PADCFG and MMR registers retain values only during a warm reset and not during a POR.

    Regards,

    Anil.