Tool/software:
Hello experts,
This is all in U-Boot 2024.04. SDK10. Custom board.
I get some troublesome clk errors from the Serdes setup. Depending on how I define the serdes nodes,
different serdes blocks report that error. Can someone help out in finding what is wrong here?
This is our Serdes setup:
SerDes0 lane0: unused SerDes0 lane1: unused SerDes1 lane0: PCIe for future M.2 expansion SerDes1 lane1: PCIe for future M.2 expansion SerDes2 lane0: unused SerDes2 lane1: USB3_1 SerDes3 lane0: USB3_0 swap SerDes3 lane1: USB3_0 SerDes4 lane0: unused SerDes4 lane1: unused SerDes4 lane2: unused SerDes4 lane3: unused
The relevant dts nodes looks like this:
&usb_serdes_mux {
idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
};
&serdes_ln_ctrl {
idle-states = <J721E_SERDES0_LANE0_IP4_UNUSED>, <J721E_SERDES0_LANE1_IP4_UNUSED>,
<J721E_SERDES1_LANE0_PCIE1_LANE0>, <J721E_SERDES1_LANE1_PCIE1_LANE1>,
<J721E_SERDES2_LANE0_IP1_UNUSED>, <J721E_SERDES2_LANE1_USB3_1>,
<J721E_SERDES3_LANE0_USB3_0_SWAP>, <J721E_SERDES3_LANE1_USB3_0>,
<J721E_SERDES4_LANE0_IP2_UNUSED>, <J721E_SERDES4_LANE1_IP2_UNUSED>,
<J721E_SERDES4_LANE2_IP2_UNUSED>, <J721E_SERDES4_LANE3_IP2_UNUSED>;
};
&cmn_refclk1 {
clock-frequency = <100000000>;
};
&wiz1_pll1_refclk {
assigned-clocks = <&wiz1_pll1_refclk>;
assigned-clock-parents = <&cmn_refclk1>;
};
&wiz1_refclk_dig {
assigned-clocks = <&wiz1_refclk_dig>;
assigned-clock-parents = <&cmn_refclk1>;
};
&wiz2_pll1_refclk {
assigned-clocks = <&wiz2_pll1_refclk>;
assigned-clock-parents = <&cmn_refclk1>;
};
&wiz2_refclk_dig {
assigned-clocks = <&wiz2_refclk_dig>;
assigned-clock-parents = <&cmn_refclk1>;
};
&serdes1 {
assigned-clocks = <&serdes1 CDNS_SIERRA_PLL_CMNLC>;
assigned-clock-parents = <&wiz1_pll1_refclk>;
serdes1_pcie_link: phy@0 {
reg = <0>;
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_PCIE>;
resets = <&serdes_wiz1 1>, <&serdes_wiz1 2>;
};
};
&serdes2 {
serdes2_usb_link: phy@1 {
reg = <1>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
resets = <&serdes_wiz2 2>;
};
};
&usbss1 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss1_pins_default>;
ti,vbus-divider;
};
&usb1 {
dr_mode = "host";
maximum-speed = "super-speed";
phys = <&serdes2_usb_link>;
phy-names = "cdns3,usb3-phy";
};
&serdes_wiz3 {
typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
};
&serdes3 {
serdes3_usb_link: phy@0 {
reg = <0>;
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
};
};
&usbss0 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss0_pins_default>;
ti,vbus-divider;
};
&usb0 {
dr_mode = "otg";
maximum-speed = "super-speed";
phys = <&serdes3_usb_link>;
phy-names = "cdns3,usb3-phy";
};
And here is a log from booting. I have added debug prints that show the parent as well as the node that fails.
In: serial@2800000 Out: serial@2800000 Err: serial@2800000 clk_get_by_index_nodev: Node 'bus@100000->ethernet@c000000', CLK index 0 /drivers/net/ti/am65-cpsw-nuss.c:791-am65_cpsw_probe_nuss() am65_cpsw_nuss ethernet@c000000: K3 CPSW: nuss_ver: 0x6BA01901 cpsw_ver: 0x6BA80101 ale_ver: 0x00294104 Ports:8 clk_get_by_index_nodev: Node 'bus@100000->wiz@5000000', CLK index 1 clk_get_by_index_nodev: Node 'bus@100000->wiz@5000000', CLK index 2 clk_get_by_index_nodev: Node 'wiz@5000000->serdes@5000000', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5000000->cmn-refclk-dig-div', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5000000->refclk-dig', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5000000->refclk-dig', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5000000->refclk-dig', CLK index 2 clk_get_by_index_nodev: Node 'wiz@5000000->refclk-dig', CLK index 3 clk_get_by_index_nodev: Node 'wiz@5000000->serdes@5000000', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5000000->cmn-refclk1-dig-div', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5000000->pll1-refclk', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5000000->pll1-refclk', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5000000->pll1-refclk', CLK index 2 clk_get_by_index_tail: Node 'wiz@5000000->pll1-refclk', property 'clocks', failed to request CLK index 2: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5000000->pll1-refclk', CLK index 3 clk_get_by_index_tail: Node 'wiz@5000000->pll1-refclk', property 'clocks', failed to request CLK index 3: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5000000->serdes@5000000', CLK index 2 clk_get_by_index_nodev: Node 'wiz@5000000->pll0-refclk', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5000000->pll0-refclk', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5000000->pll0-refclk', CLK index 2 clk_get_by_index_tail: Node 'wiz@5000000->pll0-refclk', property 'clocks', failed to request CLK index 2: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5000000->pll0-refclk', CLK index 3 clk_get_by_index_tail: Node 'wiz@5000000->pll0-refclk', property 'clocks', failed to request CLK index 3: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5000000->serdes@5000000', CLK index 3 /drivers/phy/cadence/phy-cadence-sierra.c:1122-cdns_sierra_phy_probe() cdns,sierra serdes@5000000: PHY not found 0x7364 vs 0x0 Sierra init failed:-22 Net: clk_get_by_index_nodev: Node 'ethernet@c000000->mdio@f00', CLK index 0
As you can see in the log, the driver tries to find clocks that are not there:
clk_get_by_index_nodev: Node 'wiz@5000000->pll1-refclk', CLK index 2 clk_get_by_index_tail: Node 'wiz@5000000->pll1-refclk', property 'clocks', failed to request CLK index 2: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2
compare to the main-dts setup:
wiz0_pll1_refclk: pll1-refclk {
clocks = <&k3_clks 292 0>, <&cmn_refclk1>;
#clock-cells = <0>;
assigned-clocks = <&wiz0_pll1_refclk>;
assigned-clock-parents = <&k3_clks 292 0>;
};
which has only two clocks. No wonder it fails.
If I add to the dts:
&serdes0 {
status = "disabled";
};then the log starts complaining on the next serdes block instead (5010000):
In: serial@2800000 Out: serial@2800000 Err: serial@2800000 clk_get_by_index_nodev: Node 'bus@100000->ethernet@c000000', CLK index 0 /drivers/net/ti/am65-cpsw-nuss.c:791-am65_cpsw_probe_nuss() am65_cpsw_nuss ethernet@c000000: K3 CPSW: nuss_ver: 0x6BA01901 cpsw_ver: 0x6BA80101 ale_ver: 0x00294104 Ports:8 clk_get_by_index_nodev: Node 'bus@100000->wiz@5010000', CLK index 1 clk_get_by_index_nodev: Node 'bus@100000->wiz@5010000', CLK index 2 clk_get_by_index_nodev: Node 'wiz@5010000->pll1-refclk', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5010000->pll1-refclk', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5010000->pll1-refclk', CLK index 2 clk_get_by_index_tail: Node 'wiz@5010000->pll1-refclk', property 'clocks', failed to request CLK index 2: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5010000->pll1-refclk', CLK index 3 clk_get_by_index_tail: Node 'wiz@5010000->pll1-refclk', property 'clocks', failed to request CLK index 3: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 /drivers/clk/clk-uclass.c:91-clk_get_by_index_tail() get: returning err=-19 Sierra init failed:-19
If I disable both serdes0 and serdes1 (even though we will need serdes1 in the future):
In: serial@2800000 Out: serial@2800000 Err: serial@2800000 clk_get_by_index_nodev: Node 'bus@100000->ethernet@c000000', CLK index 0 /drivers/net/ti/am65-cpsw-nuss.c:791-am65_cpsw_probe_nuss() am65_cpsw_nuss ethernet@c000000: K3 CPSW: nuss_ver: 0x6BA01901 cpsw_ver: 0x6BA80101 ale_ver: 0x00294104 Ports:8 clk_get_by_index_nodev: Node 'bus@100000->wiz@5020000', CLK index 1 clk_get_by_index_nodev: Node 'bus@100000->wiz@5020000', CLK index 2 clk_get_by_index_nodev: Node 'wiz@5020000->serdes@5020000', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5020000->cmn-refclk-dig-div', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5020000->refclk-dig', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5020000->refclk-dig', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5020000->refclk-dig', CLK index 2 clk_get_by_index_nodev: Node 'wiz@5020000->refclk-dig', CLK index 3 clk_get_by_index_nodev: Node 'wiz@5020000->serdes@5020000', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5020000->cmn-refclk1-dig-div', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5020000->pll0-refclk', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5020000->pll0-refclk', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5020000->pll0-refclk', CLK index 2 clk_get_by_index_tail: Node 'wiz@5020000->pll0-refclk', property 'clocks', failed to request CLK index 2: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5020000->pll0-refclk', CLK index 3 clk_get_by_index_tail: Node 'wiz@5020000->pll0-refclk', property 'clocks', failed to request CLK index 3: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5020000->pll1-refclk', CLK index 0 clk_get_by_index_nodev: Node 'wiz@5020000->pll1-refclk', CLK index 1 clk_get_by_index_nodev: Node 'wiz@5020000->pll1-refclk', CLK index 2 clk_get_by_index_tail: Node 'wiz@5020000->pll1-refclk', property 'clocks', failed to request CLK index 2: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5020000->pll1-refclk', CLK index 3 clk_get_by_index_tail: Node 'wiz@5020000->pll1-refclk', property 'clocks', failed to request CLK index 3: -2 /drivers/clk/clk-uclass.c:112-clk_get_by_index_tail() prop: returning err=-2 clk_get_by_index_nodev: Node 'wiz@5020000->serdes@5020000', CLK index 2 clk_get_by_index_nodev: Node 'wiz@5020000->serdes@5020000', CLK index 3 /drivers/phy/cadence/phy-cadence-sierra.c:1130-cdns_sierra_phy_probe() cdns,sierra serdes@5020000: sierra probed
It now complains about clocks on the serdes2 block, but it ends up with a messages that it has been probed.
All help is much appreciated.
Regards,
/Bo
