AM625: Watchdog in R5 SPL

Boris Krasnovskiy

Part Number: AM625

Tool/software:

Hello, how to activate watchdog in R5 SPL?

This is the test case for watchdog R5 SPL, that is why "failed to boot from all devices". It is the easiest way to create fault condition.

According reference manual wkup_rti0 suppose to reset R5 but activating it result in error message and no reset...

U-Boot SPL 2025.04 (May 13 2025 - 20:37:13 -0400)
SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.7--v11.00.07 (Fancy Rat)')
Changed A53 CPU frequency to 1250000000Hz (T grade) in DT
SPL initial stack usage: 13400 bytes
ti_power_domain_of_xlate: invalid dev-id: 132
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

Attempt to activate main_rti0 as a check result in different error but still no reset:

U-Boot SPL 2025.04 (May 13 2025 - 20:37:13 -0400)
SYSFW ABI: 4.0 (firmware rev 0x000b '11.0.7--v11.00.07 (Fancy Rat)')
Changed A53 CPU frequency to 1250000000Hz (T grade) in DT
SPL initial stack usage: 13400 bytes
ti_power_domain_of_xlate: invalid dev-id: 125
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

6 months ago

0 Nick Saulnier 6 months ago

TI__Guru** 103790 points

Hello there,

You can only use RTI watchdogs for cores that are currently powered on. So I would expect the attempt to activate main_rti0 to fail, since A53 core0 is not running yet during R5F SPL.

The dev-id values that are reported look correct for AM62X_DEV_WKUP_RTI0 and AM62X_DEV_RTI0 (see https://software-dl.ti.com/tisci/esd/09_02_07/5_soc_doc/am62x/devices.html ).

Is this thread helpful? AM62Px will have different details, but the overall concepts should be the same:
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1461108/am62p-watchdog-support-in-u-boot-r5-spl

Regards,

Nick

0 Boris Krasnovskiy 6 months ago in reply to Nick Saulnier

Prodigy 10 points

Hi Nick,

Yes I read this thread. Unfortunately, dev-data.c has a lot of undocumented parameters which I do not understand how to work with. Could you please explain what these structures do, what the numbers mean and where they come from? And what are the rules to assign the lists, and what do they represent.

static struct ti_psc soc_psc_list[] = {
    [0] = PSC(0, 0x04000000),
    [1] = PSC(1, 0x00400000),
};

static struct ti_pd soc_pd_list[] = {
    [0] = PSC_PD(0, &soc_psc_list[1], NULL),
    [1] = PSC_PD(2, &soc_psc_list[1], &soc_pd_list[0]),
    [2] = PSC_PD(3, &soc_psc_list[1], &soc_pd_list[0]),
    [3] = PSC_PD(4, &soc_psc_list[1], &soc_pd_list[2]),
    [4] = PSC_PD(5, &soc_psc_list[1], &soc_pd_list[2]),
};

static struct ti_lpsc soc_lpsc_list[] = {
    [0] = PSC_LPSC(0, &soc_psc_list[1], &soc_pd_list[0], NULL),
    [1] = PSC_LPSC(9, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
    [2] = PSC_LPSC(10, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[1]),
    [3] = PSC_LPSC(11, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[2]),
    [4] = PSC_LPSC(12, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[8]),
    [5] = PSC_LPSC(13, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[9]),
    [6] = PSC_LPSC(20, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
    [7] = PSC_LPSC(21, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
    [8] = PSC_LPSC(23, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
    [9] = PSC_LPSC(24, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
    [10] = PSC_LPSC(28, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
    [11] = PSC_LPSC(34, &soc_psc_list[1], &soc_pd_list[0], &soc_lpsc_list[11]),
    [12] = PSC_LPSC(41, &soc_psc_list[1], &soc_pd_list[1], &soc_lpsc_list[11]),
    [13] = PSC_LPSC(42, &soc_psc_list[1], &soc_pd_list[2], &soc_lpsc_list[11]),
    [14] = PSC_LPSC(45, &soc_psc_list[1], &soc_pd_list[3], &soc_lpsc_list[13]),
    [15] = PSC_LPSC(46, &soc_psc_list[1], &soc_pd_list[4], &soc_lpsc_list[13]),
};

static struct ti_dev soc_dev_list[] = {
    PSC_DEV(16, &soc_lpsc_list[0]),
    PSC_DEV(77, &soc_lpsc_list[0]),
    PSC_DEV(61, &soc_lpsc_list[0]),
    PSC_DEV(95, &soc_lpsc_list[0]),
    PSC_DEV(107, &soc_lpsc_list[0]),
    PSC_DEV(170, &soc_lpsc_list[1]),
    PSC_DEV(177, &soc_lpsc_list[2]),
    PSC_DEV(55, &soc_lpsc_list[3]),
    PSC_DEV(178, &soc_lpsc_list[4]),
    PSC_DEV(179, &soc_lpsc_list[5]),
    PSC_DEV(57, &soc_lpsc_list[6]),
    PSC_DEV(58, &soc_lpsc_list[7]),
    PSC_DEV(161, &soc_lpsc_list[8]),
    PSC_DEV(162, &soc_lpsc_list[9]),
    PSC_DEV(75, &soc_lpsc_list[10]),
    PSC_DEV(36, &soc_lpsc_list[11]),
    PSC_DEV(102, &soc_lpsc_list[11]),
    PSC_DEV(146, &soc_lpsc_list[11]),
    PSC_DEV(13, &soc_lpsc_list[12]),
    PSC_DEV(166, &soc_lpsc_list[13]),
    PSC_DEV(135, &soc_lpsc_list[14]),
    PSC_DEV(136, &soc_lpsc_list[15]),
};

Processors

Processors forum

AM625: Watchdog in R5 SPL