AM625: Custom AM625 based Board bring-up

I am able to get the all the buck outputs of PMIC, voltage level VDD_SD to 3.3V

Hello Mohit Sharma

Thank you for the query and inputs.

Did you say the issue is resolved and what findings did you have if the issue was resolved.

Regards,

Sreenivasa

There is an issue with the boot, i am able to get all supplies but VDD_SD is coming out of 0V which is output of U7 IC in schematic. Because of this I was not able to boot the AM625 processor from SD card(first boot)

Hello Mohit Sharma

Thank you.

Not sure i understand the inputs.

Do you have the SD boot working?

Regards,

Sreenivasa

You van refer to the SD card section jn the schematic, there is U7 which is not giving output as I have tested on the running board. It should give the output to 3.3V, because of that the SD card is not powered up so I am stuck on SD card booting process

I will try this tomorrow and get back to you

Hello Mohit Sharma

Thank you. 

Regards,

Sreenivasa

Hello Sreenivasa, 

I have tested it by not mounting the D11 Diode and then testing the output, But the pin 3 of U7 remains Low which disables the On state of TPS22918DBVR. Which disables the boot 

I have seen the output of both the boards of D11(SD_PWR_EN)  and D12(Resetstatz)i.e., I am getting 0V on both of the rails due to which the U7 remains turned OFF.

But on running board I have tested the State of D11 and D12, its pulled up with 3.3V. 

Regards

Mohit Sharma

Hello Sreenivasa, 

I have tested it by not mounting the D11 Diode and then testing the output, But the pin 3 of U7 remains Low which disables the On state of TPS22918DBVR. Which disables the boot 

I have seen the output of both the boards of D11(SD_PWR_EN)  and D12(Resetstatz)i.e., I am getting 0V on both of the rails due to which the U7 remains turned OFF.

But on running board I have tested the State of D11 and D12, its pulled up with 3.3V. 

The SD_PWR_EN and Resetstatz is basically disabling my processor to boot. I have also testing the voltage on below testpoints

Reset_Reqz - 3.3V
MCU_ResetZ 1.8V
MCU_Resetstatz - 0V (instead of 3.3V)

Regards

Mohit Sharma

Hello Mohit Sharma

Thank you.

If i understand correctly you seem to be saying some boards are working.

Help me confirm how many boards does not work.

On the non-working boards if the RESETSTAtz is low, likely the board is not powering properly, or clock is not available.

Please check MCU_PORz input and clock 

Regards,

Sreenivasa

Hello Sreenivasa I Replace the crytsal of 25MHz and Now some things are working, I am getting the output of U7 also, But not able to boot from SD card. Please let me know in the below image which resisters are Important for booting the processor board from Sd card.

Regards
Mohit

Please let me also know if I pull up these resistors from VDD_3V3_SD will also works fine, or I have to pull up from VDD_SD and VDD_3V3 only as shown in the above image

Hello Mohit Sharma

Thank you.

Can you please answer the below:

Kallikuppa Sreenivasa said:

If i understand correctly you seem to be saying some boards are working.

Help me confirm how many boards does not work.

Is the SD card working on the boards 

sd_volt_sel - can you confirm the gpio is mapped in the software to toggle to select the SD card IO voltage between 3.3V and 1.8V 

Please populate the D0..D3 and CMD pullup

Please connect the SD_CD resistor that connected the SDCD pin to 3.3V 

SD_CLK needs a 10K pulldown. I see pullup in the schematics. You may need to adjust the resistor mounting and connect to ground.

During boot, when UHS-I SD card is enabled, the VDD_SD is expected to toggle between 3.3V and 1.8V.

Please read the schematics checklist and hardware design considerations documents to understand the SD card functionality.

Recommended References for review and design of custom board
AM62X
TI.com product page
www.ti.com/.../AM625
www.ti.com/.../AM623
www.ti.com/.../AM620-Q1
www.ti.com/.../AM625-Q1

Collaterals
AM62x Sitara Processors datasheet (Rev. B)
www.ti.com/.../sprsp58
AM625SIP – AM6254 Sitara Processor with Integrated LPDDR4 SDRAM datasheet (Rev. A)
www.ti.com/.../sprsp98
AM62x Sitara Errata (Rev. F)
www.ti.com/.../sprz487
Hardware Design Considerations
www.ti.com/.../sprad05
DDR Board Design and Layout Guidelines
www.ti.com/.../sprad06
Schematic Design and Review Checklist for AM62x processor family
www.ti.com/.../sprado3
Schematic Design and Review Checklist combined for sitara processor families
www.ti.com/.../sprad21

Schematic review request (internal)
e2e.ti.com/.../4661966
AM62x Schematic checklist
e2e.ti.com/.../faq-am625-am623-am62a-am62p-am62d-q1-am64x-am243x-design-recommendations-custom-board-hardware-design---schematics-review-checklists

AM62x Schematic self-review
e2e.ti.com/.../faq-am625-am623-am625sip-am620-q1-am625-q1-design-recommendations-custom-board-hardware-design---custom-board-schematics-self-review
e2e.ti.com/.../faq-am625-am625-am623-am62a-am62p-am62d-q1-am64x-am243x-design-recommendations-custom-board-hardware-design---list-of-errors-observed-during-customer-schematics-review
e2e.ti.com/.../faq-am625-am623-am62a-design-recommendations-commonly-observed-errors-during-custom-board-hardware-design-sk-schematics-updates-for-design-update-note
e2e.ti.com/.../faq-am625-am623-am62a-am62p-am62d-q1-am64x-am243x-design-recommendations-custom-board-hardware-design---queries-related-to-soc-data-sheet-pin-attributes
e2e.ti.com/.../faq-am62x-am64x-custom-board-hardware-design-how-to-handle-used-unused-pins-peripherals-e-g-gpios-serdes-usb-csi-mmc-emmc-sd-card-csi-oldi-dsi
e2e.ti.com/.../faq-am625-am623-am62l-am62a-am62d-q1-am62p-design-recommendations-commonly-observed-errors-during-custom-board-hardware-design-soc-peripherals-and-ios-connection-when-not-used

Frequently Asked Questions FAQs for master list of FAQs for all AM6 processor families and AM62x processor family
e2e.ti.com/.../faq-custom-board-hardware-design---master-complete-list-of-faqs-for-all-sitara-processor-am62x-am64x-am243x-am335x-families
e2e.ti.com/.../faq-am625-am623-am625sip-am625-q1-am620-q1-custom-board-hardware-design---faqs-related-to-processor-collaterals-functioning-peripherals-interface-and-starter-kit

Frequently Asked Questions FAQs for schematics D-Note, R-Note
e2e.ti.com/.../faq-am625-am623-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62b-schematics
e2e.ti.com/.../faq-am625-am623-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62b-p1-schematics
e2e.ti.com/.../faq-am625-q1-am620-q1-custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62-lp-schematics
e2e.ti.com/.../faq-am625sip---custom-board-hardware-design---design-and-review-notes-for-reuse-of-sk-am62-sip-schematics

Downloadable design files on TI.com list for SK
SK-AM62B-P1 Design Package Content Overview (Rev. A)
www.ti.com/.../sprt777
www.ti.com/.../spar001
SK-AM62-LP Design Package Content Overview
www.ti.com/.../sprt778
www.ti.com/.../sprr471
SK-AM62B Design Package Folder and Files List
www.ti.com/.../sprt784
www.ti.com/.../sprr481
SK-AM62-SIP Design Package Folder and Files List
www.ti.com/.../sprt785
www.ti.com/.../SK-AM62-SIP

Regards,

Sreenivasa

Hello Mohit Sharma

VDD_SHV5

Please connect a bulk cap across the 0.1 uF cap after the ferrite to minimize resonance.

Regards,

Sreenivasa

Hello Sreenivasa,

Please find on page number 3, there is 100nF capacitor at VDD_SHV5.

Thanks and Regards
Mohit

Hello Mohit Sharma

Thank you.

Kallikuppa Sreenivasa said:

Please connect a bulk cap across the 0.1 uF cap after the ferrite to minimize resonance.

Please read the message above. The recommendation is to add a 1 uF cap across 0.1 uF cap.

Regards,

Sreenivasa

Hi Sreenivasa,

Thanks for the references, I found out that while pullups on SD Card are having issues. I didn't put that pullups footprint on Processor board itself, will have to make changes for next iteration.

I found out sometimes when SD card is plugin and USR button is pressed the processor board shuts off the PMIC after Few ms.

changes in pullups are not there with the respective supply 

VDD_3V3 to SD_CD

VDD_SD to SD_CMD,SD_D3,SD_D2,SD_D1,SD_D0,SD_CLK.

*They all are Pulled up with VDD_3V3_SD only

Please let me know if you have any inputs regarding this. By the way there is one market purchased beagleplay I removed all the pullups and after this it still boots the board.

Thanks and Regards
Mohit

Hi Sreenivasa,

Board is successfully booted.

Thanks for your valuable inputs. I will make sure to follow the recommendations as suggested in the following iterations of Board.

Thanks and Regards

Mohit Sharma

Hello Mohit Sharma

Thank you.

Can you help me understand the issue.

In the schematics i did observed some additional issues that may need updates. I will share by end of the week or early next week.

Regards,

Sreenivasa

Hello Sreenivasa,

There are some hardware issues with the SD card adapter that I made a separate breakout.

I replaced with the new one, then board start working as normal.(Not faced boot issue with Sd card pullups on the SD breakout board instead of main board)

Thanks and Regards
Mohit Sharma

Hello Mohit Sharma

Thank you for the inputs, appreciated.

Please review the above collaterals before you build the next boards. 

Regards,

Sreenivasa

Hello, Sreenivasa

I will make the changes as suggested by you, and will also be waiting for the additional issues you observed by the end if this week.

Regards
Mohit

Hello Mohit Sharma

Thank you and appreciate you making changes.

Regards,

Sreenivasa

Hello Mohit Sharma

I am reviewing the schematics and observed that you are connecting OBSCLK0 as the EPHY input.

Can you confirm if this is the case.

Have you had a chance to test the EPHY interface and did you have any performance issues.

Here are a few input:

OBSCLK0 O Main Domain Observation clock output for test
and debug purposes only

You may have to use CLKOUT0 or WKUP_CLKOUT0.

The clock is not enabled by default. A pulldown is recommended near to the EPHY clock input to hold the clock in a known state until the SOC clock is configured.

Regards,

Sreenivasa

Hello Mohit Sharma

I see that the WKUP_CLKOUT0 does not have a connection.

I am not sure about the EXT_CLKOUT0 connection.

The WKUP_CLKOUT0 is the buffered output of the oscillator XO and connects to the pin after reset.

Regards,

Sreenivasa

Hello Sreenivasa,

On previous Iteration I have done these connections:-

The WKUP_CLKOUT0, I have used before when I am also connecting the WIFI Module.
The CLKOUT0 I have used in the single pair ethernet.

In current Iteration I have removed the peripherals like WIFI Module and single pair ethernet, that's why I have not connected the WKUP_CLKOUT0 and CLKOUT0 to the Gigabit ethernet interface.

Please let me know if connection with WKUPCLK0 and CLKOUT0 would also work instead of MCU_OSBCLK0.

Thanks and Regards
Mohit

Hello Mohit Sharma,

Thank you.

Mohit Sharma said:

Please let me know if connection with WKUPCLK0 and CLKOUT0 would also work instead of MCU_OSBCLK0.

The recommended is to use WKUP_CLKOUT0 

Alternate is to use CLKOUT0. The CLKOUT0 clock output needs to be configured in the software. A pulldown is recommended near to the clock input.

Regards,

Srfeenivasa

Hello Mohit Sharma,

As i do a quick review of the schematics, i will need some information on the project.

Are you able to share some project related information over the private chat please.

Regards,

Sreenivasa

Hello Sreenivasa,

Thank you for your message.

Sure, I’d be happy to share the required project-related information. Please let me know the specific details or aspects you're looking for, and I will provide them over the private chat.

Looking forward to your input.

Best regards,
Mohit Sharma

Hello Mohit Sharma,

Thank you.

Please share the End application, Estimated SOP and Volumes.

In case you are working with TI sales/support teams other than E2E, please share relevant details.

Regards,

Sreenivasa

Hello Mohit Sharma

Not sure if you had a chance to look at the above inputs.

Regards,

Sreenivasa

Hello Sreenivasa, 

Sorry for the late reply, I have sent the related details over private message.

Regards
Mohit

Hello Mohit Sharma

Thank you.

Let me check and update you.

Regards,

Sreenivasa