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GPMC can't map to external NOR flash on DM8148

Eric Chen
Intellectual 810 points
Other Parts Discussed in Thread: SYSCONFIG

Hi,

   I got Linux PSP 4.01.00.06 and there's NOR flash writer source code inside. I modified the writer on our custom board and it worked to write/read data to NOR flash, and the base address is 0x08000000 while the register GPMC_CONFIG7_i is set to 0x00000C48.

   The source code was then added to our own code. Unfortunately, after GPMC initialized, the base address 0x08000000 can't be accessed. I've confirmed that CM_ALWON_GPMC_CLKCTRL (0x481815D0) and CM_ALWON_MCBSP_CLKCTRL (0x4818154C) were enabled. Could someone please help me?

    Here're my GPMC register setting sequence and values which followed NOR-flash-writer:

 GPMC_SYSCONFIG: 0x00000000
 GPMC_IRQENABLE: 0x00000000
 GPMC_TIMEOUT_CONTROL: 0x00000000
 GPMC_CONFIG: 0x00000000
 GPMC_CONFIG7_i: 0x00000000
 GPMC_CONFIG1_i: 0x00001010
 GPMC_CONFIG2_i: 0x00101080
 GPMC_CONFIG3_i:  0x00020201
 GPMC_CONFIG4_i: 0x0F031003
 GPMC_CONFIG5_i: 0x000F1111
 GPMC_CONFIG6_i: 0x0F030080
 GPMC_CONFIG7_i: 0x00000C08
 GPMC_CONFIG7_i: 0x00000C48

    where i=0.

 

    I also tried other base address and the problem still existed.

 

  I found a phenomenon that when I set 0x00000C48 to GPMC_CONFIG7_i, the values of the register GPMC_NAND_COMMAND_i (0x5000007C), GPMC_NAND_ADDRESS_i (0x50000080) and GPMC_NAND_DATA_i (0x50000084) seemed what I set to NOR by NOR-flash-writer. Does it mean the base address is mapped to somewhere instead of 0x08000000?

    Thanks.

        Eric

 

  • 0
    TI__Genius 15310 points

    Eric,

    I would recommend to take out your own code and try again to see if it is still work.  Also compare the GPMC registers before and after adding your code.  Fromm the GPMC_CONFIG7_i, the map address is corrected.

    BR,

    Viet

  • 0 in reply to Viet Dinh
    Intellectual 810 points

    Hi Viet,

        I copied my code of NOR flash access to an new project, but it still not worked.

     

        I found that when I loaded the NOR flash writer in CCS, it displayed MMU off on status bar, but when I ran my own code, MMU is on. I added the memory mapping from 0x08000000 to 0x08800000 which is used to NOR flash mirror to MMU table, then this memory region could be read/write after GPMC is configured.

        Although now it works with MMU table, but I still have no idea that is it necessary to enable MMU table and include the flash mirror area to this table?

     

            Eric

  • 0
    TI__Prodigy 400 points

    Eric,

    You are trying to use the Base address of 0x08 000 000.

    GPMC allows the BASE address to be 24 bits wide, and then a granularity of 256MB.

    <See attached file>5758.GPMC_AddressMap.pdf

    So If you want to access Location 0x08 000 000, Use the below programming for the

    GPMC_CONFIG_7_i ( The last GPMC_CONFIG_7_i programming) ::

    GPMC_CONFIG_7_i =0x00000040

    "040" : Means that your Base Address or starting address = 0X00000000

    and can go up to maximum address = 0X0FFFFFFF

    and 0x08000000 will fall in this range and cal be accessed.

    Best regards,

    Chaitanya

  • 0 in reply to Chaitanya Vaddadi
    TI__Prodigy 400 points

    There is a problem in how the Site is displaying the information I have given.

    I meant to GPMC_CONFIG_7_i :

    0x00000040

  • 0 in reply to Chaitanya Vaddadi
    Intellectual 810 points

    Hi Chaitanya,

        I tried GPMC_CONFIG_7_i as 0x0000040, it still not worked unless I added the memory mapping item in MMU table.

     

    Regards,

        Eric