AM623: system can‘t boot normally when open DDR ECC function

This is an follow-up discussion from thread

 https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1537341/am623-ddr-delay-register-configuration 

The custom board has 512MB DDR. The memory size for applications is about 455MB (1/9 smaller) once DDR ECC is enabled. So the memory map for some components have to be adjusted to fit into 455MB.

Details will be provided here once everything is sorted out.

Hi Bin

     Do you have any update for this issue?

Hi Bert,

In addition to the changed made in the previous e2e thread, the DM firmware location in the DDR also has to be moved down by 1/9 of the DDR region.

I just got the response from our dev team, that to move the DM firmware location, the DM firmware should be re-compiled with the new location updated in its linker file. The DM firmware source code is provided in the MCU+ SDK.

Please let me know if you need help in modifying and compiling DM firmware in the MCU+ SDK.

hi Bin

which is the source code for  DM firmware in MCU+ SDK?  please also help provide the document to compile it and it's linker file name