DRA821U: DRA821 MCSPI1 transaction to transaction delay time is too long

Syed N Akhtar

Part Number: DRA821U
Other Parts Discussed in Thread: DRA821

Tool/software:

Hello,

One of the carrier team (NUC) is having problem with SPI overload timing between transactions on Hydra board (DRA821 processor – to FRAM on carrier board).

It is taking SPI roughly 3.5us between each transaction (see below). This is very long and needs to be reduced.

Can TI team please check if this limitation is on the DRA821 side?

24 days ago

0 Takuma Fujiwara 22 days ago

TI__Guru 50563 points

Hi Syed,

Which software driver is in-use? Is this Linux or RTOS, and is it OSPI or McSPI?

Regards,

Takuma

0 Syed N Akhtar 22 days ago in reply to Takuma Fujiwara

Prodigy 100 points

Hi Takuma,

This is in VxWorks and is concerning McSPI bus.

I just found out that another customer is also seeing similar issue on their McSPI bus. Any help on TI side will be very much appreciated.

Perhaps TI can check this on the DRA821 Eval board and confirm if they are seeing the same issue or not.

0 Takuma Fujiwara 21 days ago in reply to Syed N Akhtar

TI__Guru 50563 points

Hi Syed,

Understood. Then recommendation would be to talk with Windriver, since the driver comes from them. From TI perspective, it should be possible to make delay shorter. For example, usage of DMA can reduce delays like below thread:

SK-AM62: Long Word Delays on MCSPI transfers

Above is a thread for AM62, but the McSPI hardware and software driver should be the same as DRA821.

Regards,

Takuma

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DRA821U: DRA821 MCSPI1 transaction to transaction delay time is too long