AM62L: AM62L32

Hi,

Could you please confirm whether you are using Linux or MCU+,RTOS, Bare Metal domain ?

linux

Hello,

Let me re-assign to the PMIC team to comment.

Thanks,

Anshu

Hi Yang, 

GPIO should be the first output of the PMIC timing sequence, are you seeing the other PMIC outputs powering on successfully (B2 or LDO2) ?

Are you able to use I2C to read the interrupt registers of the PMIC to see if any fault is being flagged?

Best Regards,
Sarah

Hi Sarah，

The output of BUCK2 was not successfully established；  LDO1 is OK；  LDO2 no test；

The test images are as follows

Hi Yang, 

I may need more information to help identify the issue here. 

Are you able to send full schematic for proper review?
Is it possible to know how much capacitance is on Buck2, including at the point of load?

Also, are you able to use I2C to read the interrupt registers of the PMIC to see if any fault is being flagged?

Best Regards, 
Sarah

1：The schematic diagram is as follows

2：I didn't read the I2C register because the PMIC was not properly established. Can AM62L read the I2C register data of PMIC?

EC_S_MB_V10-250906.pdfM2KEY-E_S_IB_V10-250906.pdf

Hi Yang, 

1. Thank you for providing schematic diagram, please allow me a few days to review. 
I will try to get back to you as soon as I can, if I have any comments.

2. In the meantime, yes, the PMIC registers should be able to be read from I2C with the AM62L.

Best Regards, 
Sarah

There are two rectification findings:
1: Change the CT capacitor of the load switch to 1nf
2: Add a 50 ohm load to the output of BUCK2
Both of the above methods can enable PMIC to establish the timing sequence normally。

The register of I2C cannot be read out, which is in the earliest stage of power establishment, and AM62L has not yet run normally

Hi Sarah

1:that VDD1P8 is not connected to any external loads. SURE;

2:The two rectification measures mentioned above can both establish the timing sequence of PMIC normally, and AM62L has also responded

But for the same circuit, EVK does not need to be rectified in this way.

I think there is still a problem with the circuit, which is 3V3 to 1. 8V leakage

Hi Yang, 

Thank you for the update. 

Is there any main differences between your board design and the EVK design, layout-wise that could be causing this leakage issue?

Best Regards, 
Sarah

Thank you for your reply.

So far, apart from the two rectification measures mentioned above, the real cause has not been identified.

Hi Yang, 

Thank you, please update if you have any insight on the layout or the root cause identification. 

Best Regards, 
Sarah