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TDA4AL-Q1: [PSDK RTOS 10.01] Raise MCU R5F DDR access priority via CBASS QoS in SBL/SPL (request minimal patch)

SanHsin Kuo
Prodigy 100 points
Part Number: TDA4AL-Q1
Other Parts Discussed in Thread: PROCESSOR-SDK-J721S2, TDA4VL-Q1

Tool/software:

Hi

                Our PROCESSOR-SDK-J721S2 version is  pdk_j721s2_10_01_00_25

 ．Symptom:

     Under heavy Camera/Perception loading  on MAIN domain (A72/C7x/R5F), MCU_R5F (MCU1_0) shows jitter and higher CPU loading.

 ．What we tried:

     Moved Deterministic code/data to MSMC/OCMC/TCM → but our all  MCU code is too big , some  MCU code  still needs in DDR.

 ．Request:

     Please provide the patch to Raise MCU R5F DDR access priority  on pdk_j721s2_10_01_00_25.

 

Note: we understand QoS improves priority but does not guarantee bandwidth; goal is to minimize jitter while  heavy Camera/Perception loading  on MAIN domain

 

B.R.

Sanhsin Kuo

  • 0
    TI__Guru**** 475745 points

    Hi Sanhsin Kuo,

    Could you please share high level dataflow and DDR BW that this dataflow is using? This will help us to debug it further.

    Regards,

    Brijesh 

  • 0 in reply to Brijesh Jadav
    Prodigy 100 points

    Hi    

          We are suffering  an issue similar to the one described in   TDA4VL-Q1: MCU DDR access priority .

    The problem is related to the MCU R5F DDR access priority, but we are using a different PDK version, pdk_j721s2_10_01_00_25. The patch provided for the TDA4VL-Q1 issue is incompatible with our version.

         

    Could you the patch to Raise MCU R5F DDR access priority  based on pdk_j721s2_10_01_00_25?

    The High level data flow is like the below diagram.

    Thanks a lot.

    SanHsin

    CC:  ,  

  • 0 in reply to SanHsin Kuo
    TI__Guru**** 475745 points

    Hi SanHsin,

    but can you copy the same API ie setup_mcu_r5f_qos in the SBL, rebuild SBL and see if it helps? 

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 100 points

    HI  :

        >>but can you copy the same API ie setup_mcu_r5f_qos in the SBL, rebuild SBL and see if it helps? 

    Could you please provide specific guidance on how to configure the QoS to raise the DDR access priority for the MCU R5F?

    We are not clear on the required steps and would appreciate your help

    Thanks

    SanHsin

  • 0 in reply to SanHsin Kuo
    TI__Guru**** 475745 points

    Hi SanHsin,

    My suggestion here is to refer to TRM for QoS parameters understanding. 

    Regards,

    Brijesh 

  • 0 in reply to Brijesh Jadav
    Prodigy 100 points

    Hi  ,   CC:  

       We need your techical support, experience to speed up our CRITICAL MCU Loading issue.

    According to the patches  raise the DDR access priority for the MCU R5F from TDA4VL-Q1: MCU DDR access priority,

       these below patches cannot  be applied into pdk_j721s2_10_01_00_25.,  also cannot find the API setup_mcu_r5f_qos   mentioned from below patches , u-boot , pdk source files.

    0001-Added-QOS-support-for-DSS-on-J721S2.patch
    5305.0001-Added-QoS-parameters-settings.patch
    QoS_For_mcu3_mcu1.patch.

    There is no he API setup_mcu_r5f_qos   mentioned from the patch 0001-Added-QOS-support-for-DSS-on-J721S2.patch 
    285: +void setup_navss_nb(void)
    292: +void setup_vpac_qos(void)
    321: +void setup_dmpac_qos(void)
    332: +void setup_dss_qos(void)
    365: +void setup_gpu_qos(void)
    432: +void setup_encoder_qos(void)
    461: +void setup_decoder_qos(void)

    Could you please help us where to find  the API setup_mcu_r5f_qos in the SBL?  or  provide the patch to Raise MCU R5F DDR access priority  based on pdk_j721s2_10_01_00?

    Thanks a lot.

    SanHsin