a IPC problem

Hi, the pll initional funticion is pasted here,

Bool myPllInit()

{

    CSL_Status              status;

    PllcHwSetup             pllc_hwSetup;

    PllcHwSetup             pllc_hwSetupRead;

    /* PLLC module handle structure */

    /* Set the Core PLL */

    /* Clear local data structures */

    memset(&pllc_hwSetup, 0, sizeof(PllcHwSetup));

    /* Setup PLLC hardware parameters */

    pllc_hwSetup.divEnable  = (CSL_BitMask32) (PLLC_DIVEN_PLLDIV2 |

                                          PLLC_DIVEN_PLLDIV5 |

                                          PLLC_DIVEN_PLLDIV8) ;

    /* Setup PLLC hardware parameters */

    pllc_hwSetup.pllM       =

           (((DEF_INIT_CONFIG_PLL1_PLLM) ? DEF_INIT_CONFIG_PLL1_PLLM : PLATFORM_PLL1_PLLM_val) - 1);

    pllc_hwSetup.preDiv   = PLATFORM_PLL_PREDIV_val - 1;

    pllc_hwSetup.pllDiv2  = PLATFORM_PLLDIV2_val - 1;

    pllc_hwSetup.pllDiv5  = PLATFORM_PLLDIV5_val - 1;

    pllc_hwSetup.pllDiv8  = PLATFORM_PLLDIV8_val - 1;

    pllc_hwSetup.postDiv  = PLATFORM_PLL_POSTDIV_val -1;

    /* set Pll */

    status = CorePllcHwSetup (&pllc_hwSetup);

    if (status != CSL_SOK)

    {

       printf("CorePLL: HwSetup... Failed.\n");

       return FALSE;

    }

    /* Read back */

    status = CorePllcGetHwSetup (&pllc_hwSetupRead);

    if (status != CSL_SOK)

    {

       printf("CorePLL: Hardware setup parameters reading... Failed.\n");

       return FALSE;

    }

    /* Set the PA_SS PLL */

    status = SetPaPllConfig();

    if (status != CSL_SOK)

    {

       printf("PAPLLC: HwSetup... Failed.\n");

       return FALSE;

    }

    //PowerUpDomains();

    return TRUE;

}

i didn't import a GEL file into the project, and i thought the heap used by ipc was located in MSCMEM which i checked in  the  .map file ,

the memory configuration is as the following

MEMORY CONFIGURATION

         name                origin          length         used            unused     attr    fill

----------------------      --------          ---------        --------             --------      ----  --------

  L2SRAM                00800000   00080000  00038870  00047790  RW X

  MSMCSRAM         0c000000   00400000  00200000  00200000  RW X

  DDR3                   80000000   20000000  00000000  20000000  RWIX

 i have an another question about the location of  code . i tried to locate the code in MSMMEM,

so i modify the sections configuration .

the original configuration is:

SECTIONS

{

          .text: load >> L2SRAM

         .ti.decompress: load > L2SRAM

         .stack: load > L2SRAM

         GROUP: load > L2SRAM

       {

             .bss:

             .neardata:

             .rodata:

       }

          .cinit: load > L2SRAM

        .pinit: load >> L2SRAM

       .init_array: load > L2SRAM

       .const: load >> L2SRAM

       .data: load >> L2SRAM

      .fardata: load >> L2SRAM

      .switch: load >> L2SRAM

      .sysmem: load > L2SRAM

      .far: load >> L2SRAM

       .args: load > L2SRAM align = 0x4, fill = 0 {_argsize = 0x0; }

      .cio: load >> L2SRAM

      .ti.handler_table: load > L2SRAM

      .vecs: load >> L2SRAM

      xdc.meta: load >> L2SRAM, type = COPY

} 

i substitued  MSMMEM for L2SRAM. it didn't work well,i don't konw why . 

thanks a lot !

First,try attach the GEL file(evmc6678l.gel) and remove the invoke of function Pll_init().

 hi ,i have tried to attach the GEL file and removed the invoke of function Pll_init().

it works  ok , so if i want to reconfigure pll parameters ,i'd better to do this in GEL file ?

another question is if i want to located the code in MSMEM instead of L2SRAM (as i have mentioned in last post),what i should to do ?

Yes, I think it's a better way to modify the PLL function in GEL.

Add the statement in your cfg file like :
Program.sectMap[".text"] = "MSMCSRAM";

it can help you to place the text section in MSMCRAM.

sorry for the delay ,thanks for your help. i want to do pll configuration in app instead of GEL (i don't want to import a GEL file ),what should i do ? 

 the project i mentioned is pasted here.

2313.ipc_test_new.rar

Hi,

Which version of IPC and CSL you are using?

Hi,the ipc used in this project is IPC 1.24.00.16

the csl used is pasted here

1638.libary.zip

thanks for your help!

Sorry for the delay and I'm on other things these several days.

I have tried your project and find out where is the origin of the problem. The situation on my side is that if there is write access to Bootcfg space before the IPC and BIOS start, the code will run to unexpected status. Because Bootcfg space is locked by the kicker, so I remove all the operation in myPllInit() except only one action: CSL_BootCfgUnlockKicker, that's a CSL API to unlock the Bootcfg space, but even so the code is still unexpected. I have checked the memory and register address in your project, there's no problem. So I couldn't explan what's happened currently. You can try this operation in your side and see whether it's the same. And maybe TI's expert can have a look at this problem.

Allen

               Thanks for your effort ! so  is   there any TI's expert  online ?i hope you can give me some suggestions!

Hi, Are those problem resolved? I have also meet this problem. I Want to use 6678 Notify example in CCS in one Image and Run it in MAD through tftp. It seems works ok.

Then I add EVM_init function in xdc startup function. And init Serial port on Core when task_fun0 start. Then it can work correctly thourgh CCS jtag mode. I can see serial output in serial port.

 But when use it through tftp Using MAD.   Then the serial output shows that the Notify interrupt can't  any more. I try to remove evm_init in xdc startup function and add it in tast_fun0. The notify example works ok again.

I can't understand why?