AM6442: GPMC pSRAM /NOR Access use DMA problem

Tool/software:

Hi,

The external memory is FPGA. Device Type: PSRAM
The mcu_plus_sdk_am64x only provided an example of using UDMA in NAND flash(gpmc_flash_io_am64x-evm_r5fss0-0_nortos_ti-arm-clang). I made modifications based on this.
It is ok that read data from FPGA to r5fss0-0 memory. But data cannot be written into FPGA.Capture GPMC signals by FPGA. Address 、CS、ADV、WE are all right,but the data is 0.
Write to FPGA and read from FPGA both directly involve calling GPMC_dmaCopy().
Write to FPGA : GPMC_dmaCopy(gpmcDmaHandle, FPGAMem,R5Mem,120,FALSE)
Read from FPGA:GPMC_dmaCopy(gpmcDmaHandle, R5Mem,FPGAMem,120,FALSE)
Disable DMA, GPMC read and write are all ok.
gpmc_nandlike_v0.c :
GPMC_nandReadData() called the GPMC_dmaCopy(), but GPMC_nandWriteData() did not call GPMC_dmaCopy().
The writing cannot use the GPMC_dmaCopy() ?
I feel the problem should be in UDMA configuration. The GPMC should be fine.

/* GPMC Driver Parameters */
GPMC_Params gGpmcParams[CONFIG_GPMC_NUM_INSTANCES] =
{
    {
        .gpmcDmaChIndex = 0,
        .devType                =   CSL_GPMC_CONFIG1_DEVICETYPE_NORLIKE,
        .devSize                =   CSL_GPMC_CONFIG1_DEVICESIZE_THIRTYTWOBITS,
        .chipSel                =   GPMC_CHIP_SELECT_CS0,
        .intrEnable             =   FALSE,
        .dmaEnable              =   TRUE,
        .transferMode           =   GPMC_TRANSFER_MODE_BLOCKING,
        .transferCallBckFunc    =   NULL,
        .memDevice              =   GPMC_MEM_TYPE_NORLIKE,
    },
};
/*
 * GPMC
 */

/* Regions restricted for DMA. We should use CPU memcpy in these cases */
static GPMC_AddrRegion gGpmcDmaRestrictRegions[] =
{
    {
        .regionStartAddr = CSL_R5FSS0_ATCM_BASE,
        .regionSize      = CSL_R5FSS0_ATCM_SIZE,
    },
    {
        .regionStartAddr = CSL_R5FSS0_BTCM_BASE,
        .regionSize      = CSL_R5FSS0_BTCM_SIZE,
    },
    {
        .regionStartAddr = CSL_R5FSS1_ATCM_BASE,
        .regionSize      = CSL_R5FSS1_ATCM_SIZE,
    },
    {
        .regionStartAddr = CSL_R5FSS1_BTCM_BASE,
        .regionSize      = CSL_R5FSS1_BTCM_SIZE,
    },
    {
        .regionStartAddr = CSL_MCU_M4FSS0_IRAM_BASE,
        .regionSize      = CSL_MCU_M4FSS0_IRAM_SIZE,
    },
    {
        .regionStartAddr = CSL_MCU_M4FSS0_DRAM_BASE,
        .regionSize      = CSL_MCU_M4FSS0_DRAM_SIZE,
    },
    {
        .regionStartAddr = 0xFFFFFFFFU,
        .regionSize      = 0U,
    }
};
#include <drivers/gpmc/v0/dma/gpmc_dma.h>
#include <drivers/gpmc/v0/dma/udma/gpmc_dma_udma.h>
#include <drivers/udma.h>
/*
 * GPMC UDMA Blockcopy Parameters
 */
#define GPMC_UDMA_BLK_COPY_CH_RING_ELEM_CNT (1U)
#define GPMC_UDMA_BLK_COPY_CH_RING_MEM_SIZE (((GPMC_UDMA_BLK_COPY_CH_RING_ELEM_CNT * 8U) + UDMA_CACHELINE_ALIGNMENT) & ~(UDMA_CACHELINE_ALIGNMENT - 1U))
#define GPMC_UDMA_BLK_COPY_CH_TRPD_MEM_SIZE (UDMA_GET_TRPD_TR15_SIZE(1U))
#define GPMC_UDMA_NUM_BLKCOPY_CH (1U)

/* GPMC UDMA Blockcopy Channel Objects */
static Udma_ChObject gGpmcUdmaBlkCopyChObj[GPMC_UDMA_NUM_BLKCOPY_CH];

/* GPMC UDMA Blockcopy Channel Ring Mem */
static uint8_t gGpmcUdmaBlkCopyCh0RingMem[GPMC_UDMA_BLK_COPY_CH_RING_MEM_SIZE] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));

/* GPMC UDMA Blockcopy Channel TRPD Mem */
static uint8_t gGpmcUdmaBlkCopyCh0TrpdMem[GPMC_UDMA_BLK_COPY_CH_TRPD_MEM_SIZE] __attribute__((aligned(UDMA_CACHELINE_ALIGNMENT)));

GpmcDma_UdmaArgs gGpmcUdma0Args =
{
    .drvHandle     = &gUdmaDrvObj[CONFIG_UDMA0],
    .chHandle      = &gGpmcUdmaBlkCopyChObj[0],
    .trpdMem       = &gGpmcUdmaBlkCopyCh0TrpdMem,
    .trpdMemSize   = GPMC_UDMA_BLK_COPY_CH_TRPD_MEM_SIZE,
    .ringMem       = &gGpmcUdmaBlkCopyCh0RingMem,
    .ringMemSize   = GPMC_UDMA_BLK_COPY_CH_RING_MEM_SIZE,
    .ringElemCount = GPMC_UDMA_BLK_COPY_CH_RING_ELEM_CNT,
    .localEventID  = 29,
};
GPMC_DmaConfig gGpmcDmaConfig[CONFIG_GPMC_NUM_DMA_INSTANCES] =
{
    {
        .fxns        = &gGpmcDmaUdmaFxns,
        .gpmcDmaArgs = (void *)&gGpmcUdma0Args,
    }
};

uint32_t gGpmcDmaConfigNum = CONFIG_GPMC_NUM_DMA_INSTANCES;



/*
 * UDMA
 */
/* UDMA driver instance object */
Udma_DrvObject          gUdmaDrvObj[CONFIG_UDMA_NUM_INSTANCES];
/* UDMA driver instance init params */
static Udma_InitPrms    gUdmaInitPrms[CONFIG_UDMA_NUM_INSTANCES] =
{
    {
        .instId             = UDMA_INST_ID_BCDMA_0,
        .skipGlobalEventReg = FALSE,
        .virtToPhyFxn       = Udma_defaultVirtToPhyFxn,
        .phyToVirtFxn       = Udma_defaultPhyToVirtFxn,
    },
};

Looking forward to your reply!

Best regards,

Andy Zhou