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Original question:

TDA4VM: How R5F uses CPSW in MAIN Domain?

TDA4VM: Clarification on A72 <-> R5F <-> CPSW9G <-> CPTS Access for TI TDA4 J784S4

Akhil M Nair
Prodigy 70 points
Part Number: TDA4VM


Tool/software:

Dear TI Support Team,

I am working with the TI TDA4 J784S4 SoC and referring to the attached SPRUJ52D Technical Reference Manual (TRM). I need clarification on the interaction between the A72 core, the R5F firmware, and the CPSW9G switch, specifically regarding access to the CPTS (Common Platform Time Sync) module for timestamping.

From the TRM, I understand that:

  • CPSW9G is part of the MAIN domain as mentioned in this table at section 1.1.3.


  • Section 12.2.2.1.1 confirms that CPTS is a part of the CPSW9 switch.
  • CPTS is designed to supports both software and hardware timestamping and provides mechanisms for precise time tracking and synchronization across various subsystems. I’m particularly focused on the CPTS functionality within the CPSW9 switch, as my development scope involves creating a kernel driver for VxWorks that runs on the A72 core and performs diagnostic testing related to the CPTS registers in CPSW9.


Could you please clarify:

  1. How does the A72 core communicate with the R5F firmware to configure or retrieve timestamps from the CPSW9G CPTS module?
  2. Can the A72 core directly access CPTS registers, or does it require coordination with R5F firmware?
  3. Is there a standard mechanism or protocol (e.g., mailbox, shared memory, interconnect) used for this communication?
  4. Are there specific TRM sections or examples that detail this interaction?

Any guidance or references to TRM pages or SDK examples would be greatly appreciated.

Best regards,
Akhil M Nair

5315.SPRUJ52 - J84S4 AM69A TRM.pdf

  • 0
    Prodigy 70 points

    Dear TI Support Team,

    The scope of the VxWorks kernel diagnostic driver running on the A72 core is to cover the following safety mechanisms mentioned in the SFFS462_J784S4_J742S2_SafetyManual_v1.0 section 5.50 NAVSS.

    • CPTS1 - Periodic Software Read Back of Static Configuration Registers
    • CPTS2 - Software Monitoring of Event Time Accuracy
    • CPTS3 - Software Read Back of Written Configuration
    • CPTS4 - Software Test of Basic Functionality

    For all of the above mechanisms we need access to the CPTS registers. Therefore, access to the CPTS registers is essential for implementing all the above safety mechanisms, which is the basis of my initial query.

    Regards,
    Akhil

    SFFS462_J784S4_J742S2_SafetyManual_v1.0.pdf

  • 0 in reply to Akhil M Nair
    TI__Guru 66130 points

    Hi,

    CPTS from CPSW9G is configurable only when CPSW9G is enabled.

    I am not sure about the drivers used in VxWorks. If you can access CPSW9G registers, then you will be able to access CPTS.

    If you are using the ETHFW model applicaiton from the R5F core, then only R5F has access to CPTS registers. In this case, you can't implement the diagnosis from the A72 applicaiton running on VxWorks.

    Best Regards,
    Sudheer

  • 0 in reply to Doredla Sudheer Kumar
    Prodigy 70 points

    Hello Sudheer,

    Thank you for the reply.

    I’ll need to do a deeper investigation into the ETHFW model from the R5F core to better understand the usage. I’ll reach out again if I have any further questions.

    In the meantime, it would be helpful if we could keep this thread open for about a week, so we can continue discussing any related points here.

    Once again, I truly appreciate your prompt and helpful feedback.

    Wishing you a great day ahead!


    Regards,
    Akhil

  • 0 in reply to Akhil M Nair
    TI__Guru 66130 points

    Hi Akhil,

    Akhil M Nair said:
    I’ll need to do a deeper investigation into the ETHFW model from the R5F core to better understand the usage.

    You can refer to the ETHFW User Guide for more insights about the ETHFW.
    https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/11_01_00_04/exports/docs/ethfw/docs/user_guide/index.html

    Akhil M Nair said:
    In the meantime, it would be helpful if we could keep this thread open for about a week, so we can continue discussing any related points here.

    You can reply to this thread when you have any queries.

    Best Regards,
    Sudheer