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Part Number: AM62P
Other Parts Discussed in Thread: SN65DSI86, AM67
Hi Expert,
We develop an application in customized AM62P board with SDK v11.1. When we replug the DP cable, system can't display any more. We debug function ti_sn_bridge_detect() in ti-sn65dsi86.c and find that it does detect connector connected after we replug the DP cable. Seems it does handle the HPD event but can't resume the display. How to solve it? Thanks.
BR,
Jeff
Hi Expert,
Here are some information about the system:
bridge_dsi86: bridge@2c {
compatible = "ti,sn65dsi86";
reg = <0x2c>;
enable-gpios = <&main_gpio0 84 GPIO_ACTIVE_HIGH>;
//suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;
interrupts-extended = <&main_gpio0 83 IRQ_TYPE_EDGE_FALLING>;
vccio-supply = <&buck3>;
vcca-supply = <&vdd_sn65_1v2>;
vpll-supply = <&buck3>;
vcc-supply = <&vdd_sn65_1v2>;
clock-names = "refclk";
clocks = <&edp_refclk>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
edp_bridge_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
edp_bridge_out: endpoint {
data-lanes = <0 1 2 3>;
lane-polarities = <0 0 0 0>;
remote-endpoint = <&dp0_connector_in>;
};
};
};
};
BR,
Jeff
Hi Chieh Hung Chuang,
I am looking into this and I need to discuss this internally with an expert.
Please expect a response early next week.
Thanks for your patience !
Kind Regards,
Anastas Yordanov
Hi Chieh Hung Chuang,
I am assigning to the software expert to support.
Regards,
Sreenivasa
Hi Jeff,
Just to cross-check if are on the latest SDK, can you see if the following patch is already applied on your SN65DSI86 driver: https://lore.kernel.org/all/20250624044835.165708-1-j-choudhary@ti.com/ ?
The following patch series enables it: lore.kernel.org/.../
Hello Jeff,
On the DP0_HPD signal, i see a 51K series resistor.
Nou sure on the use case, in case the hot plug does not work with the patch please measure the HPD signal and make required changes.
Regards,
Sreenivasa
Hi Expert,
I try again, and find it can show display again in this process:
1. boot on -> show TI login in screen
2. run kmsxxtest -> show color blocks in screen
3. unplug & plug DP cable -> show nothing
4. stop kmsxxtest -> show nothing
5. run kmsxxtest -> show nothing
6. stop kmsxxtest -> show nothing
7. run kmsxxtest -> show color blocks in screen
8. stop kmsxxtest -> show TI login in screen
But I run my application like this process, but I can't get same result. Any suggestion?
BR,
Jeff
Hi Jeff,
On the DP0_HPD signal, i see a 51K series resistor.
Nou sure on the use case, in case the hot plug does not work with the patch please measure the HPD signal and make required changes.
Can you please check for the above.
Please share your complete dts for display related part as well.
In the sn65dsi86 driver, what is ti_sn_bridge_detect() function returning? Can you add a print for (val & HPD_DEBOUNCED_STATE)?
The ti_sn_bridge_detect() function should print that value on hotplug or post kmsxxtest run.
Also, before each kmsxxtest run, can you share the logs of `modetest -D 30220000.dss`
Hi Expert,
I will ask HW people check 51K series resistor next week.
The dts file is here:
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/*
* Device Tree file for the AM62P5-SK
* Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
*
* Schematics: https://www.ti.com/lit/zip/sprr487
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "k3-am62p5.dtsi"
/ {
compatible = "ti,am62p5-sk", "ti,am62p5";
model = "Texas Instruments AM62P5 SK";
aliases {
serial2 = &main_uart0; /* UART0 */
serial3 = &main_uart1; /* RS-485 */
mmc0 = &sdhci0; /* eMMC */
mmc1 = &sdhci1; /* SD Card */
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2800000 root=/dev/mmcblk1p2 rw rootfstype=ext4 rootwait";
stdout-path = &main_uart0;
framebuffer0: framebuffer@0 {
compatible = "simple-framebuffer";
power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>,
<&k3_pds 243 TI_SCI_PD_EXCLUSIVE>, /* OLDI0 */
<&k3_pds 244 TI_SCI_PD_EXCLUSIVE>; /* OLDI1 */
clocks = <&k3_clks 186 6>,
<&dss0_vp1_clk>,
<&k3_clks 186 2>;
display = <&dss0>;
status = "disabled";
};
};
memory@80000000 {
/* 1GB RAM */
reg = <0x00000000 0x80000000 0x00000000 0x40000000>,
<0x00000008 0x80000000 0x00000000 0x00000000>;
device_type = "memory";
bootph-pre-ram;
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x00 0x0C000000>;
linux,cma-default;
};
rtos_ipc_memory_region: rtos-ipc-memory@9b500000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b500000 0x00 0x00300000>;
no-map;
};
mcu_r5fss0_core0_dma_memory_region: mcu-r5fss-dma-memory-region@9b800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b800000 0x00 0x00100000>;
no-map;
};
mcu_r5fss0_core0_memory_region: mcu-r5fss-memory-region@9b900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9b900000 0x00 0x00f00000>;
no-map;
};
wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c800000 0x00 0x00100000>;
no-map;
};
wkup_r5fss0_core0_memory_region: r5f-memory@9c900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c900000 0x00 0x01e00000>;
no-map;
};
secure_tfa_ddr: tfa@9e780000 {
reg = <0x00 0x9e780000 0x00 0x80000>;
no-map;
};
secure_ddr: optee@9e800000 {
reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
no-map;
};
AVM_shared: AVM_shared-memories@a0000000 {
compatible = "shared-dma-pool";
reg = <0x00 0xa0000000 0x00 0x02000000>;
no-map;
};
};
main_12v: regulator-0 {
/* Main Supply */
compatible = "regulator-fixed";
regulator-name = "main_12v";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
pinctrl-names = "default";
pinctrl-0 = <&main_pwr_en_default>;
standby-gpios = <&main_gpio0 73 1>;
enable-gpios = <&main_gpio0 75 1>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
bootph-all;
};
vcc_5v0: regulator-1 {
/* Output of LMR33630CQRNXTQ1 */
compatible = "regulator-fixed";
regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&main_12v>;
regulator-always-on;
regulator-boot-on;
bootph-all;
};
vcc_3v3_main: regulator-4 {
/* Output of LM64460BPPQRYFRQ1 */
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_main";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&main_12v>;
regulator-always-on;
regulator-boot-on;
};
vdd_mmc1: regulator-2 {
/* TPS22918DBVR */
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3_main>;
regulator-always-on;
regulator-boot-on;
bootph-all;
};
vddshv_sdio: regulator-3 {
compatible = "regulator-gpio";
regulator-name = "vddshv_sdio";
pinctrl-names = "default";
pinctrl-0 = <&vddshv_sdio_pins_default>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
states = <1800000 0x0>,
<3300000 0x1>;
bootph-all;
};
cam_9v0: regulator-5 {
compatible = "regulator-fixed";
regulator-name = "cam_9v0";
regulator-min-microvolt = <9000000>;
regulator-max-microvolt = <9000000>;
vin-supply = <&main_12v>;
regulator-always-on;
regulator-boot-on;
};
vdd_sn65_1v2: regulator-6 {
compatible = "regulator-fixed";
regulator-name = "vdd_sn65_1v2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
vin-supply = <&vcc_3v3_main>;
regulator-always-on;
regulator-boot-on;
};
edp_refclk: clock-edp-refclk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <19200000>;
};
deser_clock: clock-deser-clock {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
};
dp0_pwr_3v3: fixedregulator-dp0-prw {
compatible = "regulator-fixed";
regulator-name = "dp0-pwr";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
pinctrl-names = "default";
pinctrl-0 = <&main_dp0_pwr_en_pins_default>;
gpio = <&main_gpio0 88 GPIO_ACTIVE_HIGH>; /* gpio0_88 (D16) */
enable-active-high;
regulator-always-on;
regulator-boot-on;
};
dp0: dp0-connector {
compatible = "dp-connector";
label = "DP0";
type = "full-size";
dp-pwr-supply = <&dp0_pwr_3v3>;
port {
dp0_connector_in: endpoint {
remote-endpoint = <&edp_bridge_out>;
};
};
};
transceiver: can-phy0 {
compatible = "ti,tcan1043";
#phy-cells = <0>;
max-bitrate = <5000000>;
//pinctrl-names = "default";
//pinctrl-0 = <&main_pwr_en_default>;
//standby-gpios = <&main_gpio0 73 GPIO_ACTIVE_LOW>;
//enable-gpios = <&main_gpio0 75 GPIO_ACTIVE_HIGH>;
//enable-active-high;
};
opp-table {
/* Add 1.4GHz OPP for am62p5-sk board. Requires VDD_CORE at 0v85 */
opp-1400000000 {
opp-hz = /bits/ 64 <1400000000>;
opp-supported-hw = <0x01 0x0004>;
clock-latency-ns = <6000000>;
};
};
};
&main_gpio0 {
bootph-all;
};
&main_gpio1 {
bootph-all;
};
&main_pmx0 {
bootph-all;
/* Camera Serial Interface, CSI */
main_i2c0_pins_default: main-i2c0-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */
AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */
>;
};
/* Display Serial Interface, DSI */
main_i2c2_pins_default: main-i2c2-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (T22) GPMC0_CSn2.I2C2_SCL */
AM62PX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (U25) GPMC0_CSn3.I2C2_SDA */
>;
};
/* Camera PWR */
main_i2c3_pins_default: main-i2c3-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A23) UART0_CTSN.I2C3_SCL */
AM62PX_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (C22) UART0_RTSN.I2C3_SDA */
>;
};
/* MicroSD */
main_mmc1_pins_default: main-mmc1-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */
AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */
AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */
AM62PX_IOPAD(0x022c, PIN_INPUT_PULLUP, 0) /* (H23) MMC1_DAT1 */
AM62PX_IOPAD(0x0228, PIN_INPUT_PULLUP, 0) /* (H22) MMC1_DAT2 */
AM62PX_IOPAD(0x0224, PIN_INPUT_PULLUP, 0) /* (H25) MMC1_DAT3 */
AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */
>;
bootph-all;
};
/* Main UART for console use */
main_uart0_pins_default: main-uart0-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */
AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */
>;
bootph-all;
};
/* RS-485 */
main_uart1_pins_default: main-uart1-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (E25) MCASP0_AXR2.UART1_RTSn */
AM62PX_IOPAD(0x01e8, PIN_INPUT, 1) /* (C24) I2C1_SCL.UART1_RXD */
AM62PX_IOPAD(0x01ec, PIN_OUTPUT, 1) /* (B24) I2C1_SDA.UART1_TXD */
>;
bootph-all;
};
/* 3v3/1v8 SD Card IO Supply */
vddshv_sdio_pins_default: vddshvr-sdio-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x007c, PIN_INPUT, 7) /* (Y25) GPMC0_CLK.GPIO0_31 */
>;
bootph-all;
};
main_dp0_pwr_en_pins_default: main_dp0_pwr_en_pins_default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x168, PIN_OUTPUT, 7) /* gpio0_88 (D16) */
>;
};
main_pwr_en_default: main-pwr-en-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x134, PIN_OUTPUT, 7) /* (A18) gpio0_75 */
AM62PX_IOPAD(0x12C, PIN_OUTPUT, 7) /* (B18) gpio0_73 */
>;
};
main_gpio0_default:main-gpio0-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x144, PIN_INPUT, 7) /* gpio0_79 (A15) */
AM62PX_IOPAD(0x148, PIN_INPUT, 7) /* gpio0_80 (A16) */
AM62PX_IOPAD(0x13C, PIN_INPUT, 7) /* gpio0_77 (A17) */
AM62PX_IOPAD(0x140, PIN_INPUT, 7) /* gpio0_78 (C16) */
AM62PX_IOPAD(0x138, PIN_INPUT, 7) /* gpio0_76 (C17) */
AM62PX_IOPAD(0x0158, PIN_INPUT, 7) /* (B14) RGMII1_RD3 gpio0_84 */
AM62PX_IOPAD(0x0154, PIN_INPUT, 7) /* (A14) RGMII1_RD2 gpio0_83 */
AM62PX_IOPAD(0x0150, PIN_INPUT, 7) /* (B16) RGMII1_RD1 gpio0_82 */
AM62PX_IOPAD(0x014C, PIN_INPUT, 7) /* (B15) RGMII1_RD0 gpio0_81 */
>;
};
main_gpio1_default: main-gpio1-default-pins {
pinctrl-single,pins = <
AM62PX_IOPAD(0x184, PIN_OUTPUT, 7) /* gpio1_3 (E19) */
AM62PX_IOPAD(0x188, PIN_INPUT, 7) /* gpio1_4 (E16) */
>;
};
};
&main_gpio0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_gpio0_default>;
};
&main_gpio1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_gpio1_default>;
};
&main_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;
deser@30 {
compatible = "ti,ds90ub960-q1";
reg = <0x30>;
clock-names = "refclk";
clocks = <&deser_clock>;
#powerdown-gpios = <&main_gpio0 82 GPIO_ACTIVE_LOW>;
i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
ds90ub960_0_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
/* CSI-2 TX */
port@4 {
reg = <4>;
ds90ub960_0_csi_out: endpoint {
data-lanes = <1 2 3 4>;
clock-lanes = <0>;
link-frequencies = /bits/ 64 <800000000>;
remote-endpoint = <&csi2_phy0>;
};
};
};
ds90ub960_0_links: links {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
&main_i2c1 {
status = "disabled";
};
&main_i2c2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c2_pins_default>;
clock-frequency = <400000>;
bridge_dsi86: bridge@2c {
compatible = "ti,sn65dsi86";
reg = <0x2c>;
enable-gpios = <&main_gpio0 84 GPIO_ACTIVE_HIGH>;
//suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>;
interrupts-extended = <&main_gpio0 83 IRQ_TYPE_EDGE_FALLING>;
vccio-supply = <&buck3>;
vcca-supply = <&vdd_sn65_1v2>;
vpll-supply = <&buck3>;
vcc-supply = <&vdd_sn65_1v2>;
clock-names = "refclk";
clocks = <&edp_refclk>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
edp_bridge_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
port@1 {
reg = <1>;
edp_bridge_out: endpoint {
data-lanes = <0 1 2 3>;
lane-polarities = <0 0 0 0>;
remote-endpoint = <&dp0_connector_in>;
};
};
};
};
};
&main_i2c3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c3_pins_default>;
clock-frequency = <400000>;
#address-cells = <1>;
#size-cells = <0>;
regulator_20086: regulator@28 {
compatible = "maxim,max20086";
reg = <0x28>;
in-supply = <&cam_9v0>;
vdd-supply = <&vcc_3v3_main>;
enable-gpios = <&main_gpio1 3 GPIO_ACTIVE_LOW>;
regulators {
OUT1 {
regulator-name = "VOUT1";
};
OUT2 {
regulator-name = "VOUT2";
};
OUT3 {
regulator-name = "VOUT3";
};
OUT4 {
regulator-name = "VOUT4";
};
};
};
};
&mcu_mcan0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcu_mcan0_pins_default>;
phys = <&transceiver>;
//status = "disabled";
};
&sdhci0 {
status = "okay";
ti,driver-strength-ohm = <50>;
disable-wp;
bootph-all;
};
&sdhci1 {
status = "okay";
vmmc-supply = <&vdd_mmc1>;
vqmmc-supply = <&vddshv_sdio>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
disable-wp;
bootph-all;
};
&sdhci2 {
status = "disabled";
};
&ospi0 {
status = "disabled";
};
&cpsw3g {
status = "disabled";
};
&cpsw3g_mdio {
status = "disabled";
};
&cpsw_port1 {
status = "disabled";
};
&cpsw_port2 {
status = "disabled";
};
&usb0 {
status = "disabled";
};
&usb1 {
status = "disabled";
};
&mcasp0 {
status = "disabled";
};
&mcasp1 {
status = "disabled";
};
&usbss0 {
status = "disabled";
ti,vbus-divider;
};
&usbss1 {
status = "disabled";
ti,vbus-divider;
};
&fss {
bootph-all;
};
&mailbox0_cluster0 {
mbox_r5_0: mbox-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&mailbox0_cluster1 {
mbox_mcu_r5_0: mbox-mcu-r5-0 {
ti,mbox-rx = <0 0 0>;
ti,mbox-tx = <1 0 0>;
};
};
&wkup_r5fss0 {
status = "okay";
};
&wkup_r5fss0_core0 {
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
<&wkup_r5fss0_core0_memory_region>;
};
&mcu_r5fss0 {
status = "okay";
};
&mcu_r5fss0_core0 {
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
};
&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
interrupts-extended = <&gic500 GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
<&main_pmx0 0x1c8>; /* (D14) UART0_RXD PADCONFIG114 */
interrupt-names = "irq", "wakeup";
status = "okay";
bootph-all;
};
&main_uart1 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
rs485-rts-active-low;
linux,rs485-enabled-at-boot-time;
rs485-rts-delay = <100 100>;
status = "okay";
bootph-all;
};
&main_uart2 {
status = "disabled";
};
&mcu_pmx0 {
bootph-all;
pmic_irq_pins_default: pmic-irq-default-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (B10) MCU_GPIO0_0 */
>;
};
wkup_i2c0_pins_default: wkup-i2c0-default-pins {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x04c, PIN_INPUT, 0) /* (A13) WKUP_I2C0_SCL */
AM62PX_MCU_IOPAD(0x050, PIN_INPUT, 0) /* (C11) WKUP_I2C0_SDA */
>;
};
mcu_mcan0_pins_default: mcu_mcan0_pins_default-pin {
pinctrl-single,pins = <
AM62PX_MCU_IOPAD(0x034, PIN_INPUT, 0) /* (E8) mcu_mcan0_tx */
AM62PX_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D6) mcu_mcan0_rx */
>;
};
};
&wkup_uart0 {
status = "disabled";
};
/* PMIC I2C */
&wkup_i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <400000>;
tps65224: pmic@48 {
compatible = "ti,tps65224-q1";
reg = <0x48>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_irq_pins_default>;
interrupt-parent = <&mcu_gpio0>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
ti,primary-pmic;
gpio-controller;
#gpio-cells = <2>;
buck12-supply = <&vcc_3v3_main>;
buck3-supply = <&vcc_3v3_main>;
buck4-supply = <&vcc_3v3_main>;
ldo1-supply = <&vcc_3v3_main>;
ldo2-supply = <&vcc_3v3_main>;
ldo3-supply = <&buck3>;
regulators {
buck12: buck12 {
regulator-name = "vcc_core_buck12";
regulator-min-microvolt = <715000>;
regulator-max-microvolt = <895000>;
regulator-boot-on;
regulator-always-on;
};
buck3: buck3 {
regulator-name = "vcc1v8_sys_buck3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
buck4: buck4 {
regulator-name = "vcc1v1_buck4";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-boot-on;
regulator-always-on;
};
ldo1: ldo1 {
regulator-name = "vdda1v8_ldo1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo2: ldo2 {
regulator-name = "dvdd3v3_ldo2";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ldo3: ldo3 {
regulator-name = "vcc_0v85_ldo3";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
&mcu_gpio0 {
status = "okay";
};
&mcu_gpio_intr {
status = "okay";
};
&dss_oldi_io_ctrl {
status = "disabled";
bootph-all;
};
//&dss0 {
// bootph-all;
// status = "okay";
// pinctrl-names = "default";
// pinctrl-0 = <&main_dpi_pins_default>;
//};
//&dss0_ports {
/* DSS0-VP2: DPI/HDMI Output */
// hdmi0_dss: port@1 {
// reg = <1>;
// dss0_dpi1_out: endpoint {
// remote-endpoint = <&sii9022_in>;
// };
// };
//};
&dss1 {
bootph-all;
status = "okay";
};
&dss1_ports {
#address-cells = <1>;
#size-cells = <0>;
/* DSS1-VP1: DSI Output */
port@1 {
reg = <1>;
dss1_dpi1_out: endpoint {
remote-endpoint = <&dsi0_in>;
};
};
};
&dsi0 {
status = "okay";
//#address-cells = <1>;
//#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi0_out: endpoint {
remote-endpoint = <&edp_bridge_in>;
};
};
port@1 {
reg = <1>;
dsi0_in: endpoint {
remote-endpoint = <&dss1_dpi1_out>;
};
};
};
};
&cdns_csi2rx0 {
ports {
#address-cells = <1>;
#size-cells = <0>;
csi0_port0: port@0 {
reg = <0>;
status = "okay";
csi2_phy0: endpoint {
remote-endpoint = <&ds90ub960_0_csi_out>;
data-lanes = <1 2 3 4>;
clock-lanes = <0>;
link-frequencies = /bits/ 64 <800000000>;
};
};
};
};
&ti_csi2rx0 {
status = "okay";
};
&dphy0 {
status = "okay";
};
&dphy_tx0 {
status = "okay";
};
For debug ti_sn_bridge_detect(), I modify it as:
static enum drm_connector_status ti_sn_bridge_detect(struct drm_bridge *bridge)
{
struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge);
int val = 0;
/*
* Runtime reference is grabbed in ti_sn_bridge_hpd_enable()
* as the chip won't report HPD just after being powered on.
* HPD_DEBOUNCED_STATE reflects correct state only after the
* debounce time (~100-400 ms).
*/
regmap_read(pdata->regmap, SN_HPD_DISABLE_REG, &val);
printk("ti_sn_bridge_detect: %d\n", val & HPD_DEBOUNCED_STATE);
return val & HPD_DEBOUNCED_STATE ? connector_status_connected
: connector_status_disconnected;
}
And got this at boot time
root@am62pxx-evm:~# dmesg | grep ti_sn_bridge_detect
[ 11.615312] ti_sn_bridge_detect: 16
[ 11.620401] ti_sn_bridge_detect: 16
[ 11.831758] ti_sn_bridge_detect: 16
[ 11.835598] ti_sn_bridge_detect: 16
And got this log when I test for kmsxxtest by the process:
1. run modetest
2. run kmsxxtest -> show color blocks in screen
3. unplug & plug -> didn't get ti_sn_bridge_detect msg, show nothing in screen
4. stop kmsxxtest -> show nothing
5. run modetest
6. run kmsxxtest -> show color blocks
root@am62pxx-evm:~# modetest -D 30220000.dss
trying to open device 'i915'...done
[ 166.332954] ti_sn_bridge_detect: 16
[ 166.339472] ti_sn_bridge_detect: 16
Encoders:
id crtc type possible crtcs possible clones
40 39 none 0x00000001 0x00000001
Connectors:
id encoder status name size (mm) modes encoders
41 40 connected DP-1 700x390 17 40
modes:
index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot
#0 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: preferred, driver
#1 4096x2160 30.00 4096 4184 4272 4400 2160 2168 2178 2250 297000 flags: phsync, pvsync; type: driver
#2 4096x2160 29.97 4096 4184 4272 4400 2160 2168 2178 2250 296703 flags: phsync, pvsync; type: driver
#3 2560x1440 60.00 2560 2608 2640 2720 1440 1442 1447 1481 241700 flags: nhsync, nvsync; type: driver
#4 1920x1080 120.00 1920 2008 2052 2200 1080 1084 1089 1125 297000 flags: phsync, pvsync; type: driver
#5 1920x1080 119.88 1920 2008 2052 2200 1080 1084 1089 1125 296703 flags: phsync, pvsync; type: driver
#6 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
#7 1920x1080 30.00 1920 2008 2052 2200 1080 1084 1089 1125 74250 flags: phsync, pvsync; type: driver
#8 1920x1080 29.97 1920 2008 2052 2200 1080 1084 1089 1125 74176 flags: phsync, pvsync; type: driver
#9 1280x720 120.00 1280 1390 1430 1650 720 725 730 750 148500 flags: phsync, pvsync; type: driver
#10 1280x720 119.88 1280 1390 1430 1650 720 725 730 750 148352 flags: phsync, pvsync; type: driver
#11 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
#12 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
#13 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
#14 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver
#15 640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver
#16 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
props:
1 EDID:
flags: immutable blob
blobs:
value:
00ffffffffffff002157312116b13401
1021010380462778022895a7554ea326
0f5054210800d1c081c0010001000100
010001000100023a801871382d40582c
4500c48e2100001e000000fd0018901e
de1e000a202020202020000000fc0048
444d4920544f205553420a2000000010
0000000000000000000000000000012d
0203327250101f2249203f4004133e3d
3c2f295f6423090707830100006e030c
001000003c20008001020304e50e6160
66656a5e00a0a0a0295030202500b013
3200000019640080a3a02c50b0103510
b0133200000000000000000000000000
00000000000000000000000000000000
000000000000000000000000000000f4
2 DPMS:
flags: enum
enums: On=0 Standby=1 Suspend=2 Off=3
value: 0
5 link-status:
flags: enum
enums: Good=0 Bad=1
value: 0
6 non-desktop:
flags: immutable range
values: 0 1
value: 0
4 TILE:
flags: immutable blob
blobs:
value:
CRTCs:
id fb pos size
39 50 (0,0) (1920x1080)
#0 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: preferred, driver
props:
24 VRR_ENABLED:
flags: range
values: 0 1
value: 0
27 CTM:
flags: blob
blobs:
value:
28 GAMMA_LUT:
flags: blob
blobs:
value:
29 GAMMA_LUT_SIZE:
flags: immutable range
values: 0 4294967295
value: 256
Planes:
id crtc fb CRTC x,y x,y gamma size possible crtcs
32 39 50 0,0 0,0 0 0x00000001
formats: AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 1
30 IN_FORMATS:
flags: immutable blob
blobs:
value:
01000000000000001d00000018000000
01000000900000004152313241423132
52413132524731364247313641523135
41423135415232344142323452413234
42413234524732344247323441523330
41423330585231325842313252583132
58523135584231355852323458423234
52583234425832345852333058423330
59555956555956594e56313200000000
ffffff1f000000000000000000000000
0000000000000000
in_formats blob decoded:
AR12: LINEAR(0x0)
AB12: LINEAR(0x0)
RA12: LINEAR(0x0)
RG16: LINEAR(0x0)
BG16: LINEAR(0x0)
AR15: LINEAR(0x0)
AB15: LINEAR(0x0)
AR24: LINEAR(0x0)
AB24: LINEAR(0x0)
RA24: LINEAR(0x0)
BA24: LINEAR(0x0)
RG24: LINEAR(0x0)
BG24: LINEAR(0x0)
AR30: LINEAR(0x0)
AB30: LINEAR(0x0)
XR12: LINEAR(0x0)
XB12: LINEAR(0x0)
RX12: LINEAR(0x0)
XR15: LINEAR(0x0)
XB15: LINEAR(0x0)
XR24: LINEAR(0x0)
XB24: LINEAR(0x0)
RX24: LINEAR(0x0)
BX24: LINEAR(0x0)
XR30: LINEAR(0x0)
XB30: LINEAR(0x0)
YUYV: LINEAR(0x0)
UYVY: LINEAR(0x0)
NV12: LINEAR(0x0)
34 zpos:
flags: range
values: 0 1
value: 0
35 COLOR_ENCODING:
flags: enum
enums: ITU-R BT.601 YCbCr=0 ITU-R BT.709 YCbCr=1
value: 0
36 COLOR_RANGE:
flags: enum
enums: YCbCr limited range=0 YCbCr full range=1
value: 1
37 alpha:
flags: range
values: 0 65535
value: 65535
38 pixel blend mode:
flags: enum
enums: Pre-multiplied=0 Coverage=1
value: 0
42 0 0 0,0 0,0 0 0x00000001
formats: AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 0
30 IN_FORMATS:
flags: immutable blob
blobs:
value:
01000000000000001d00000018000000
01000000900000004152313241423132
52413132524731364247313641523135
41423135415232344142323452413234
42413234524732344247323441523330
41423330585231325842313252583132
58523135584231355852323458423234
52583234425832345852333058423330
59555956555956594e56313200000000
ffffff1f000000000000000000000000
0000000000000000
in_formats blob decoded:
AR12: LINEAR(0x0)
AB12: LINEAR(0x0)
RA12: LINEAR(0x0)
RG16: LINEAR(0x0)
BG16: LINEAR(0x0)
AR15: LINEAR(0x0)
AB15: LINEAR(0x0)
AR24: LINEAR(0x0)
AB24: LINEAR(0x0)
RA24: LINEAR(0x0)
BA24: LINEAR(0x0)
RG24: LINEAR(0x0)
BG24: LINEAR(0x0)
AR30: LINEAR(0x0)
AB30: LINEAR(0x0)
XR12: LINEAR(0x0)
XB12: LINEAR(0x0)
RX12: LINEAR(0x0)
XR15: LINEAR(0x0)
XB15: LINEAR(0x0)
XR24: LINEAR(0x0)
XB24: LINEAR(0x0)
RX24: LINEAR(0x0)
BX24: LINEAR(0x0)
XR30: LINEAR(0x0)
XB30: LINEAR(0x0)
YUYV: LINEAR(0x0)
UYVY: LINEAR(0x0)
NV12: LINEAR(0x0)
44 zpos:
flags: range
values: 0 1
value: 1
45 COLOR_ENCODING:
flags: enum
enums: ITU-R BT.601 YCbCr=0 ITU-R BT.709 YCbCr=1
value: 0
46 COLOR_RANGE:
flags: enum
enums: YCbCr limited range=0 YCbCr full range=1
value: 1
47 alpha:
flags: range
values: 0 65535
value: 65535
48 pixel blend mode:
flags: enum
enums: Pre-multiplied=0 Coverage=1
value: 0
Frame buffers:
id size pitch
root@am62pxx-evm:~# modetest -D 30220000.dssroot@am62pxx-evm:~# kmsxxtest
[ 170.866326] ti_sn_bridge_detect: 16
[ 170.870071] ti_sn_bridge_detect: 16
Connector 0/@41: DP-1
Crtc 0/@39: 1920x1080@60.00 148.500 1920/88/44/148/+ 1080/4/5/36/+ 60 (60.00) P|D
Plane 0/@32: 0,0-1920x1080
Fb 52 1920x1080-XR24
press enter to exit
root@am62pxx-evm:~# kmsxxtest modetest -D 30220000.dss
trying to open device 'i915'...done
[ 200.257467] ti_sn_bridge_detect: 16
[ 200.263979] ti_sn_bridge_detect: 16
Encoders:
id crtc type possible crtcs possible clones
40 39 none 0x00000001 0x00000001
Connectors:
id encoder status name size (mm) modes encoders
41 40 connected DP-1 700x390 17 40
modes:
index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot
#0 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: preferred, driver
#1 4096x2160 30.00 4096 4184 4272 4400 2160 2168 2178 2250 297000 flags: phsync, pvsync; type: driver
#2 4096x2160 29.97 4096 4184 4272 4400 2160 2168 2178 2250 296703 flags: phsync, pvsync; type: driver
#3 2560x1440 60.00 2560 2608 2640 2720 1440 1442 1447 1481 241700 flags: nhsync, nvsync; type: driver
#4 1920x1080 120.00 1920 2008 2052 2200 1080 1084 1089 1125 297000 flags: phsync, pvsync; type: driver
#5 1920x1080 119.88 1920 2008 2052 2200 1080 1084 1089 1125 296703 flags: phsync, pvsync; type: driver
#6 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver
#7 1920x1080 30.00 1920 2008 2052 2200 1080 1084 1089 1125 74250 flags: phsync, pvsync; type: driver
#8 1920x1080 29.97 1920 2008 2052 2200 1080 1084 1089 1125 74176 flags: phsync, pvsync; type: driver
#9 1280x720 120.00 1280 1390 1430 1650 720 725 730 750 148500 flags: phsync, pvsync; type: driver
#10 1280x720 119.88 1280 1390 1430 1650 720 725 730 750 148352 flags: phsync, pvsync; type: driver
#11 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver
#12 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver
#13 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver
#14 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver
#15 640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver
#16 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver
props:
1 EDID:
flags: immutable blob
blobs:
value:
00ffffffffffff002157312116b13401
1021010380462778022895a7554ea326
0f5054210800d1c081c0010001000100
010001000100023a801871382d40582c
4500c48e2100001e000000fd0018901e
de1e000a202020202020000000fc0048
444d4920544f205553420a2000000010
0000000000000000000000000000012d
0203327250101f2249203f4004133e3d
3c2f295f6423090707830100006e030c
001000003c20008001020304e50e6160
66656a5e00a0a0a0295030202500b013
3200000019640080a3a02c50b0103510
b0133200000000000000000000000000
00000000000000000000000000000000
000000000000000000000000000000f4
2 DPMS:
flags: enum
enums: On=0 Standby=1 Suspend=2 Off=3
value: 0
5 link-status:
flags: enum
enums: Good=0 Bad=1
value: 0
6 non-desktop:
flags: immutable range
values: 0 1
value: 0
4 TILE:
flags: immutable blob
blobs:
value:
CRTCs:
id fb pos size
39 50 (0,0) (1920x1080)
#0 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: preferred, driver
props:
24 VRR_ENABLED:
flags: range
values: 0 1
value: 0
27 CTM:
flags: blob
blobs:
value:
28 GAMMA_LUT:
flags: blob
blobs:
value:
29 GAMMA_LUT_SIZE:
flags: immutable range
values: 0 4294967295
value: 256
Planes:
id crtc fb CRTC x,y x,y gamma size possible crtcs
32 39 50 0,0 0,0 0 0x00000001
formats: AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 1
30 IN_FORMATS:
flags: immutable blob
blobs:
value:
01000000000000001d00000018000000
01000000900000004152313241423132
52413132524731364247313641523135
41423135415232344142323452413234
42413234524732344247323441523330
41423330585231325842313252583132
58523135584231355852323458423234
52583234425832345852333058423330
59555956555956594e56313200000000
ffffff1f000000000000000000000000
0000000000000000
in_formats blob decoded:
AR12: LINEAR(0x0)
AB12: LINEAR(0x0)
RA12: LINEAR(0x0)
RG16: LINEAR(0x0)
BG16: LINEAR(0x0)
AR15: LINEAR(0x0)
AB15: LINEAR(0x0)
AR24: LINEAR(0x0)
AB24: LINEAR(0x0)
RA24: LINEAR(0x0)
BA24: LINEAR(0x0)
RG24: LINEAR(0x0)
BG24: LINEAR(0x0)
AR30: LINEAR(0x0)
AB30: LINEAR(0x0)
XR12: LINEAR(0x0)
XB12: LINEAR(0x0)
RX12: LINEAR(0x0)
XR15: LINEAR(0x0)
XB15: LINEAR(0x0)
XR24: LINEAR(0x0)
XB24: LINEAR(0x0)
RX24: LINEAR(0x0)
BX24: LINEAR(0x0)
XR30: LINEAR(0x0)
XB30: LINEAR(0x0)
YUYV: LINEAR(0x0)
UYVY: LINEAR(0x0)
NV12: LINEAR(0x0)
34 zpos:
flags: range
values: 0 1
value: 0
35 COLOR_ENCODING:
flags: enum
enums: ITU-R BT.601 YCbCr=0 ITU-R BT.709 YCbCr=1
value: 0
36 COLOR_RANGE:
flags: enum
enums: YCbCr limited range=0 YCbCr full range=1
value: 1
37 alpha:
flags: range
values: 0 65535
value: 65535
38 pixel blend mode:
flags: enum
enums: Pre-multiplied=0 Coverage=1
value: 0
42 0 0 0,0 0,0 0 0x00000001
formats: AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12
props:
8 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 0
30 IN_FORMATS:
flags: immutable blob
blobs:
value:
01000000000000001d00000018000000
01000000900000004152313241423132
52413132524731364247313641523135
41423135415232344142323452413234
42413234524732344247323441523330
41423330585231325842313252583132
58523135584231355852323458423234
52583234425832345852333058423330
59555956555956594e56313200000000
ffffff1f000000000000000000000000
0000000000000000
in_formats blob decoded:
AR12: LINEAR(0x0)
AB12: LINEAR(0x0)
RA12: LINEAR(0x0)
RG16: LINEAR(0x0)
BG16: LINEAR(0x0)
AR15: LINEAR(0x0)
AB15: LINEAR(0x0)
AR24: LINEAR(0x0)
AB24: LINEAR(0x0)
RA24: LINEAR(0x0)
BA24: LINEAR(0x0)
RG24: LINEAR(0x0)
BG24: LINEAR(0x0)
AR30: LINEAR(0x0)
AB30: LINEAR(0x0)
XR12: LINEAR(0x0)
XB12: LINEAR(0x0)
RX12: LINEAR(0x0)
XR15: LINEAR(0x0)
XB15: LINEAR(0x0)
XR24: LINEAR(0x0)
XB24: LINEAR(0x0)
RX24: LINEAR(0x0)
BX24: LINEAR(0x0)
XR30: LINEAR(0x0)
XB30: LINEAR(0x0)
YUYV: LINEAR(0x0)
UYVY: LINEAR(0x0)
NV12: LINEAR(0x0)
44 zpos:
flags: range
values: 0 1
value: 1
45 COLOR_ENCODING:
flags: enum
enums: ITU-R BT.601 YCbCr=0 ITU-R BT.709 YCbCr=1
value: 0
46 COLOR_RANGE:
flags: enum
enums: YCbCr limited range=0 YCbCr full range=1
value: 1
47 alpha:
flags: range
values: 0 65535
value: 65535
48 pixel blend mode:
flags: enum
enums: Pre-multiplied=0 Coverage=1
value: 0
Frame buffers:
id size pitch
root@am62pxx-evm:~# modetest -D 30220000.dssroot@am62pxx-evm:~# kmsxxtest
[ 205.794137] ti_sn_bridge_detect: 16
[ 205.797892] ti_sn_bridge_detect: 16
Connector 0/@41: DP-1
Crtc 0/@39: 1920x1080@60.00 148.500 1920/88/44/148/+ 1080/4/5/36/+ 60 (60.00) P|D
Plane 0/@32: 0,0-1920x1080
Fb 52 1920x1080-XR24
press enter to exit
root@am62pxx-evm:~#
BR,
Jeff
Hi Jeff,
I see a few differences w.r.t. https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/arch/arm64/boot/dts/ti/k3-j722s-evm.dts?h=ti-linux-6.12.y#n836 in your dts like gpios and lane-polarity/data-lanes. Can you share the reason for these.
Also, I see that post unplug/re-plug of DP cable, your hotplug seems not to work while there is an already running application or if you run something for the next time. but it does work on the second time.
To understand your issue in more detail, can you share:
1. Once kmsxxtest starts working post hotplug, does it keep working for all subsequent kmsxxtest runs (not just 1, say 5 to 10) reliably, or it works only randomly?
2. Does it seem to be a delayed hotplug detection? As in, if you have kmsxxtest running, and perform hotplug, does kmsxxtest start working in approximately the same time in which you ran your second kmsxxtest in above experiment?
3. Or, does it seem to only work (reliably) after second kmsxxtest run?
3a. What if you do not have kmsxxtest running in background, perform hotplug, run kmsxxtest twice and it starts working after second run?
4. Do you have any other driver related changes in your kernel related to the DP/DSI bridge or DSS driver?
Hi Expert,
1. For 51K series resistor, we follow the document:
2. For HPD signal. It is 0v when unplug, and it is around 1.8v when plug.
3. It is customized board, so we set gpio for our condition:
4. For lane-polarity/data-lanes, we copy them from sample. Shall we remove them?
5. For Q1 in previous ticket. I test and get result as:
test process: run kmsxxtest -> replug -> stop kmsxxtest -> run kmsxxtest 5 times. and test 5 times totally.
"O" means: it shows color blocks in display, otherwise, it shows black screen.
"Red" means: it should show something, but it didn't
So it seems kmsxxtest is not reliable.
6. For Q2 in previous ticket. I don't really understand "second kmsxxtest", but you can see picture in No.5, running kmsxxtest at the first time always works after unplug.
7. For Q3 in previous ticket. See No.6.
8. For Q3a in previous ticket. See picture in No.5.
BR,
Jeff
Hi,
Your non-working cases seem to be random which may indicate an underlying hardware issue.
After the hotplug, does the HPD signal ever go back to 0 especially during non-working cases?
Can you checkout the following thread and see if you are seeing any error codes on the bridge side: SN65DSI86-Q1: Hot-plugging may fail when connecting to a standard DP monitor
Hi Expert,
For Q1: After the hotplug, the HPD signal keep to 1 even during non-working cases.
For Q2: for the process: boot on, clear sn65dsi86's register, print sn65dsi86's register, run kmsxxtest (fail), print sn65dsi86's register
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x21
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
kmsxxtest
Connector 0/@41: DP-1
Crtc 0/@39: 1920x1080@60.00 148.500 1920/88/44/148/+ 1080/4/5/36/+ 60 (60.00) P|D
Plane 0/@32: 0,0-1920x1080
Fb 52 1920x1080-XR24
press enter to exit
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x21
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x40
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
0x40 in 0xF6 indicates LOSS_OF_DP_SYNC_LOCK_ERR. Any suggestion?
BR,
Jeff
Hi,
If you are getting this error: LOSS_OF_DP_SYNC_LOCK_ERR, I would expect that you also get it without hotplugging as well.
Can you try adding the following logs:diff --git a/drivers/phy/cadence/cdns-dphy.c b/drivers/phy/cadence/cdns-dphy.c
index 8f57919cd74e..6f20b8925d5e 100644
--- a/drivers/phy/cadence/cdns-dphy.c
+++ b/drivers/phy/cadence/cdns-dphy.c
@@ -153,8 +153,11 @@ static int cdns_dphy_get_pll_cfg(struct cdns_dphy *dphy,
cfg->hs_clk_rate = div_u64((u64)pll_ref_hz * cfg->pll_fbdiv,
2 * cfg->pll_opdiv * cfg->pll_ipdiv);
+ trace_printk("DT: cfg->pll_ipdiv : %d, cfg->pll_opdiv : %d, cfg->pll_fbdiv : %lld, dlane_bps : %lld, pll_ref_hz : %lld cfg->hs_clk_rate : %lld\n", cfg->pll_ipdiv, cfg->pll_opdiv, cfg->pll_fbdiv, dlane_bps, pll_ref_hz, cfg->hs_clk_rate); `
* ` return 0; `
}
index 8f57919cd74e..6f20b8925d5e 100644
--- a/drivers/phy/cadence/cdns-dsi-core.c
+++ b/drivers/phy/cadence/cdns-dsi-core.c
@@ -929,6 +952,7 @@ static long cdns_dsi_round_pclk(struct cdns_dsi *dsi, unsigned long pclk)
ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &phy_opts);
if (ret)
return ret;
+ trace_printk("orig pclk : %lld, calc pck : %lld hs_clk_rate : %lld", pclk, div_u64((u64)phy_opts.mipi_dphy.hs_clk_rate * nlanes, bitspp), (u64)phy_opts.mipi_dphy.hs_clk_rate);
return div_u64((u64)phy_opts.mipi_dphy.hs_clk_rate * nlanes, bitspp);
Patch will need to be applied manually.
We may need to add extra blanking periods within the sn65dsi86 driver with trial and error.
Also, can try using your setup with a monitor of different brand?
Hi Expert,
For patch, we got: "DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893750000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000"
And our structure of display is: board (DP port) -> DP to HDMI converter -> HDMI capture -> PC. It sometimes also fail on board (DP port) -> DP to HDMI converter -> HDMI monitor. Here are the value of register:
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x21
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x62
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
BR,
Jeff
Hi,
1. Please share the output of `+ trace_printk("orig pclk : %lld, calc pck : %lld hs_clk_rate : %lld", pclk, div_u64((u64)phy_opts.mipi_dphy.hs_clk_rate * nlanes, bitspp), (u64)phy_opts.mipi_dphy.hs_clk_rate);` as well.
2. For current debugging, please use DP port directly.
3. What happens when you connect a different brand monitor with DP on your board?
Hi, Expert
1. add this code to cdns_dsi_round_pclk() in cdns-dsi-core.c ?
With using DP to HDMI converter, we got
orig pclk : 148958000, calc pck : 148958333 hs_clk_rate : 893750000
DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
With connecting to DP monitor directly, we got
orig pclk : 241666000, calc pck : 241666666 hs_clk_rate : 1450000000
DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
2. see 1.
3. kmsxxtest still sometimes show black screen. I query the register in this condition:
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x02
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x20
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x42
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
Additionally, our major problem is "the application can't auto resume the display after replug", are these testing helpful?
BR,
Jeff
Hi Jeff,
Additionally, our major problem is "the application can't auto resume the display after replug", are these testing helpful?
You getting the LOSS_OF_DP_SYNC_LOCK_ERR or HSYNC error indicates a mismatch in clock specs and sn65bridge not being able to lock onto the different clock.
The logs that you shared are for the working or the non-working kmsxxtest case? can you also share the other case logs as well, it will help to see if there is a delta that we can fix easily.
Hi Expert,
Ok, I re-do the test. Please see:
#use DP to HDMI converter
#boot
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x02
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
#run kmsxxtest, stop kmsxxtest
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x21
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x02
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
#repeat running kmsxxtest until it show black screen, then stop
root@am62pxx-evm:~# kmsxxtest
[ 299.384416] ti_sn_bridge_detect: 16
[ 299.388143] ti_sn_bridge_detect: 16
Connector 0/@41: DP-1
[ 299.613157] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
Crtc 0/@39: 1920x1080@60.00 148.500 1920/88/44/148/+ 1080/4/5/[ 299.628192] orig pclk : 148958000, calc pck : 148958333 hs_clk_rate : 893750000
36/+ 60 (60.00) P|D
Plane 0/@32: 0,0-1920x1080
Fb 52 19[ 299.628206] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
20x1080-XR24
[ 299.666864] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
[ 299.680473] orig pclk : 148958000, calc pck : 148958333 hs_clk_rate : 893750000
[ 299.680486] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
[ 299.701601] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
[ 299.715184] orig pclk : 148958000, calc pck : 148958333 hs_clk_rate : 893750000
[ 299.715196] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
[ 299.736440] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893750000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
press enter to exit
[ 308.377628] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
[ 308.391255] orig pclk : 148958000, calc pck : 148958333 hs_clk_rate : 893750000
[ 308.391268] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
[ 308.426432] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
[ 308.440082] orig pclk : 148958000, calc pck : 148958333 hs_clk_rate : 893750000
[ 308.440094] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 2, cfg->pll_fbdiv : 286, dlane_bps : 893748000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 893750000
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x21
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x42
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
#connect to DP monitor directly
#boot
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x02
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x02
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
#repeat running kmsxxtest until it show black screen, then stop
root@am62pxx-evm:~# kmsxxtest
[ 74.149592] ti_sn_bridge_detect: 16
[ 74.153392] ti_sn_bridge_detect: 16
Connector 0/@41: DP-1
Crtc 0/@39: 2560x1440@59.95 241.500 2560/48/32/80/+ 1440/3/5/3[ 74.485803] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
3/- 60 (59.95) D
Plane 0/@32: 0,0-2560x1440
Fb 52 2560x[ 74.504743] orig pclk : 241666000, calc pck : 241666666 hs_clk_rate : 1450000000
1440-XR24
[ 74.504755] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
[ 74.549134] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
[ 74.562919] orig pclk : 241666000, calc pck : 241666666 hs_clk_rate : 1450000000
[ 74.562932] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
[ 74.584271] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
[ 74.598037] orig pclk : 241666000, calc pck : 241666666 hs_clk_rate : 1450000000
[ 74.598048] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
[ 74.619546] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1450000000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
press enter to exit
[ 78.550379] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
[ 78.564179] orig pclk : 241666000, calc pck : 241666666 hs_clk_rate : 1450000000
[ 78.564192] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
[ 78.605719] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
[ 78.619551] orig pclk : 241666000, calc pck : 241666666 hs_clk_rate : 1450000000
[ 78.619566] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf0
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf1
0x02
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf2
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf3
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf4
0x01
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf5
0x20
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf6
0x42
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf7
0x00
root@am62pxx-evm:~# i2cget -y -f 2 0x2c 0xf8
0x01
BR,
Jeff
Hi Expert,
After it shows something, get the modetest result:
modetest -D 30220000.dss trying to open device 'i915'...done [ 2410.233192] ti_sn_bridge_detect: 16 [ 2410.239700] ti_sn_bridge_detect: 16 Encoders: id crtc type possible crtcs possible clones 40 39 none 0x00000001 0x00000001 Connectors: id encoder status name size (mm) modes encoders 41 40 connected DP-1 710x400 21 40 modes: index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot #0 2560x1440 59.95 2560 2608 2640 2720 1440 1443 1448 1481 241500 flags: phsync, nvsync; type: driver #1 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver #2 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver #3 1600x900 60.00 1600 1624 1704 1800 900 901 904 1000 108000 flags: phsync, pvsync; type: driver #4 1280x1024 75.02 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags: phsync, pvsync; type: driver #5 1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver #6 1280x800 59.81 1280 1352 1480 1680 800 803 809 831 83500 flags: nhsync, pvsync; type: driver #7 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver #8 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver #9 1024x768 75.03 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver #10 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver #11 832x624 74.55 832 864 928 1152 624 625 628 667 57284 flags: nhsync, nvsync; type: driver #12 800x600 75.00 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver #13 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver #14 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver #15 720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver #16 720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver #17 640x480 75.00 640 656 720 840 480 481 484 500 31500 flags: nhsync, nvsync; type: driver #18 640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver #19 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver #20 720x400 70.08 720 738 846 900 400 412 414 449 28320 flags: nhsync, pvsync; type: driver props: 1 EDID: flags: immutable blob blobs: value: 00ffffffffffff004a8b188045540000 10180104b54728783e7690a8544d9f25 0e5054a56b80d1c081c081008180a9c0 b300010101014dd000a0f0703e803020 3500c48f2100001a000000ff004d6f6e 69746f720a2020202020000000fd0032 4c1ea03c000a202020202020000000fc 004d6f6e69746f720a202020202001e3 020322f14fe15f040302011112131406 0715161f230907078301000065030c00 2000023a801871382d40582c4500c48f 2100001e011d8018711c1620582c2500 c48f2100009e011d007251d01e206e28 5500c48f2100001e8c0ad08a20e02d10 103e9600c48f21000018565e00a0a0a0 295030203500c48f2100001a000000ba 2 DPMS: flags: enum enums: On=0 Standby=1 Suspend=2 Off=3 value: 0 5 link-status: flags: enum enums: Good=0 Bad=1 value: 0 6 non-desktop: flags: immutable range values: 0 1 value: 0 4 TILE: flags: immutable blob blobs: value: CRTCs: id fb pos size 39 50 (0,0) (2560x1440) #0 2560x1440 59.95 2560 2608 2640 2720 1440 1443 1448 1481 241500 flags: phsync, nvsync; type: driver props: 24 VRR_ENABLED: flags: range values: 0 1 value: 0 27 CTM: flags: blob blobs: value: 28 GAMMA_LUT: flags: blob blobs: value: 29 GAMMA_LUT_SIZE: flags: immutable range values: 0 4294967295 value: 256 Planes: id crtc fb CRTC x,y x,y gamma size possible crtcs 32 39 50 0,0 0,0 0 0x00000001 formats: AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12 props: 8 type: fl[ 2410.631095] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000 ags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 va[ 2410.647054] orig pclk : 241666000, calc pck : 241666666 hs_clk_rate : 1450000000 lue: 1 30 IN_FORMATS: flags: immutable blob blobs: [ 2410.647066] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000 value: 01000000000000001d00000018000000 01000000900000004152313241423132 52413132524731364247313641523135 41423135415232344142323452413234 42413234524732344247323441523330 41423330585231325842313252583132 58523135584231355852323458423234 52583234425832345852333058423330 59555956555956594e56313200000000 ffffff1f000000000000000000000000 0000000000000000 in_formats blob decoded: AR12: LINEAR(0x0) AB12: LINEAR(0x0) RA12: LINEAR(0x0) RG16: LINEAR(0x0) BG16: LINEAR(0x0) AR15: LINEAR(0x0) AB15: LINEAR(0x0) AR24: LINEAR(0x0) AB24: LINEAR(0x0) RA24: LINEAR(0x0) BA24: LINEAR(0x0) RG24: LINEAR(0x0) BG24: LINEAR(0x0) AR30: LINEAR(0x0) AB30: LINEAR(0x0) XR12: LINEAR(0x0) XB12: LINEAR(0x0) RX12: LINEAR(0x0) XR15: LINEAR(0x0) XB15: LINEAR(0x0) XR24: LINEAR(0x0) XB24: LINEAR(0x0) RX24: LINEAR(0x0) BX24: LINEAR(0x0) XR30: LINEAR(0x0) XB30: LINEAR(0x0) YUYV: LINEAR(0x0) UYVY: LINEAR(0x0) NV12: LINEAR(0x0) 34 zpos: flags: range values: 0 1 value: 0 35 COLOR_ENCODING: flags: enum enums: ITU-R BT.601 YCbCr=0 ITU-R BT.709 YCbCr=1 value: 0 36 COLOR_RANGE: flags: enum enums: YCbCr limited range=0 YCbCr full range=1 value: 1 37 alpha: flags: range values: 0 65535 value: 65535 38 pixel blend mode: flags: enum enums: Pre-multiplied=0 Coverage=1 value: 0 42 0 0 0,0 0,0 0 0x00000001 formats: AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12 props: 8 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 0 30 IN_FORMATS: flags: immutable blob blobs: value: 01000000000000001d00000018000000 01000000900000004152313241423132 52413132524731364247313641523135 41423135415232344142323452413234 42413234524732344247323441523330 41423330585231325842313252583132 58523135584231355852323458423234 52583234425832345852333058423330 59555956555956594e56313200000000 ffffff1f000000000000000000000000 0000000000000000 in_formats blob decoded: AR12: LINEAR(0x0) AB12: LINEAR(0x0) RA12: LINEAR(0x0) RG16: LINEAR(0x0) BG16: LINEAR(0x0) AR15: LINEAR(0x0) AB15: LINEAR(0x0) AR24: LINEAR(0x0) AB24: LINEAR(0x0) RA24: LINEAR(0x0) BA24: LINEAR(0x0) RG24: LINEAR(0x0) BG24: LINEAR(0x0) AR30: LINEAR(0x0) AB30: LINEAR(0x0) XR12: LINEAR(0x0) XB12: LINEAR(0x0) RX12: LINEAR(0x0) XR15: LINEAR(0x0) XB15: LINEAR(0x0) XR24: LINEAR(0x0) XB24: LINEAR(0x0) RX24: LINEAR(0x0) BX24: LINEAR(0x0) XR30: LINEAR(0x0) XB30: LINEAR(0x0) YUYV: LINEAR(0x0) UYVY: LINEAR(0x0) NV12: LINEAR(0x0) 44 zpos: flags: range values: 0 1 value: 1 45 COLOR_ENCODING: flags: enum enums: ITU-R BT.601 YCbCr=0 ITU-R BT.709 YCbCr=1 value: 0 46 COLOR_RANGE: flags: enum enums: YCbCr limited range=0 YCbCr full range=1 value: 1 47 alpha: flags: range values: 0 65535 value: 65535 48 pixel blend mode: flags: enum enums: Pre-multiplied=0 Coverage=1 value: 0 Frame buffers: id size pitch root@am62pxx-evm:~#
After it fails, get the modetest result:
trying to open device 'i915'...done [ 2533.337214] ti_sn_bridge_detect: 16 [ 2533.343722] ti_sn_bridge_detect: 16 Encoders: id crtc type possible crtcs possible clones 40 39 none 0x00000001 0x00000001 Connectors: id encoder status name size (mm) modes encoders 41 40 connected DP-1 710x400 21 40 modes: index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot #0 2560x1440 59.95 2560 2608 2640 2720 1440 1443 1448 1481 241500 flags: phsync, nvsync; type: driver #1 1920x1080 60.00 1920 2008 2052 2200 1080 1084 1089 1125 148500 flags: phsync, pvsync; type: driver #2 1920x1080 59.94 1920 2008 2052 2200 1080 1084 1089 1125 148352 flags: phsync, pvsync; type: driver #3 1600x900 60.00 1600 1624 1704 1800 900 901 904 1000 108000 flags: phsync, pvsync; type: driver #4 1280x1024 75.02 1280 1296 1440 1688 1024 1025 1028 1066 135000 flags: phsync, pvsync; type: driver #5 1280x1024 60.02 1280 1328 1440 1688 1024 1025 1028 1066 108000 flags: phsync, pvsync; type: driver #6 1280x800 59.81 1280 1352 1480 1680 800 803 809 831 83500 flags: nhsync, pvsync; type: driver #7 1280x720 60.00 1280 1390 1430 1650 720 725 730 750 74250 flags: phsync, pvsync; type: driver #8 1280x720 59.94 1280 1390 1430 1650 720 725 730 750 74176 flags: phsync, pvsync; type: driver #9 1024x768 75.03 1024 1040 1136 1312 768 769 772 800 78750 flags: phsync, pvsync; type: driver #10 1024x768 60.00 1024 1048 1184 1344 768 771 777 806 65000 flags: nhsync, nvsync; type: driver #11 832x624 74.55 832 864 928 1152 624 625 628 667 57284 flags: nhsync, nvsync; type: driver #12 800x600 75.00 800 816 896 1056 600 601 604 625 49500 flags: phsync, pvsync; type: driver #13 800x600 60.32 800 840 968 1056 600 601 605 628 40000 flags: phsync, pvsync; type: driver #14 720x576 50.00 720 732 796 864 576 581 586 625 27000 flags: nhsync, nvsync; type: driver #15 720x480 60.00 720 736 798 858 480 489 495 525 27027 flags: nhsync, nvsync; type: driver #16 720x480 59.94 720 736 798 858 480 489 495 525 27000 flags: nhsync, nvsync; type: driver #17 640x480 75.00 640 656 720 840 480 481 484 500 31500 flags: nhsync, nvsync; type: driver #18 640x480 60.00 640 656 752 800 480 490 492 525 25200 flags: nhsync, nvsync; type: driver #19 640x480 59.94 640 656 752 800 480 490 492 525 25175 flags: nhsync, nvsync; type: driver #20 720x400 70.08 720 738 846 900 400 412 414 449 28320 flags: nhsync, pvsync; type: driver props: 1 EDID: flags: immutable blob blobs: value: 00ffffffffffff004a8b188045540000 10180104b54728783e7690a8544d9f25 0e5054a56b80d1c081c081008180a9c0 b300010101014dd000a0f0703e803020 3500c48f2100001a000000ff004d6f6e 69746f720a2020202020000000fd0032 4c1ea03c000a202020202020000000fc 004d6f6e69746f720a202020202001e3 020322f14fe15f040302011112131406 0715161f230907078301000065030c00 2000023a801871382d40582c4500c48f 2100001e011d8018711c1620582c2500 c48f2100009e011d007251d01e206e28 5500c48f2100001e8c0ad08a20e02d10 103e9600c48f21000018565e00a0a0a0 295030203500c48f2100001a000000ba 2 DPMS: flags: enum enums: On=0 Standby=1 Suspend=2 Off=3 value: 0 5 link-status: flags: enum enums: Good=0 Bad=1 value: 0 6 non-desktop: flags: immutable range values: 0 1 value: 0 4 TILE: flags: immutable blob blobs: value: CRTCs: id fb pos size 39 50 (0,0) (2560x1440) #0 2560x1440 59.95 2560 2608 2640 2720 1440 1443 1448 1481 241500 flags: phsync, nvsync; type: driver props: 24 VRR_ENABLED: flags: range values: 0 1 value: 0 27 CTM: flags: blob blobs: value: 28 GAMMA_LUT: flags: blob blobs: value: 29 GAMMA_LUT_SIZE: flags: immutable range values: 0 4294967295 value: 256 Planes: id crtc fb CRTC x,y x,y gamma size possible crtcs 32 39 50 0,0 0,0 0 0x00000001 formats: AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12 props: 8 type: fl[ 2533.734714] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000 ags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 va[ 2533.750832] orig pclk : 241666000, calc pck : 241666666 hs_clk_rate : 1450000000 lue: 1 30 IN_FORMATS: flags: immutable blob blobs: [ 2533.750848] DT: cfg->pll_ipdiv : 2, cfg->pll_opdiv : 1, cfg->pll_fbdiv : 232, dlane_bps : 1449996000, pll_ref_hz : 25000000 cfg->hs_clk_rate : 1450000000 value: 01000000000000001d00000018000000 01000000900000004152313241423132 52413132524731364247313641523135 41423135415232344142323452413234 42413234524732344247323441523330 41423330585231325842313252583132 58523135584231355852323458423234 52583234425832345852333058423330 59555956555956594e56313200000000 ffffff1f000000000000000000000000 0000000000000000 in_formats blob decoded: AR12: LINEAR(0x0) AB12: LINEAR(0x0) RA12: LINEAR(0x0) RG16: LINEAR(0x0) BG16: LINEAR(0x0) AR15: LINEAR(0x0) AB15: LINEAR(0x0) AR24: LINEAR(0x0) AB24: LINEAR(0x0) RA24: LINEAR(0x0) BA24: LINEAR(0x0) RG24: LINEAR(0x0) BG24: LINEAR(0x0) AR30: LINEAR(0x0) AB30: LINEAR(0x0) XR12: LINEAR(0x0) XB12: LINEAR(0x0) RX12: LINEAR(0x0) XR15: LINEAR(0x0) XB15: LINEAR(0x0) XR24: LINEAR(0x0) XB24: LINEAR(0x0) RX24: LINEAR(0x0) BX24: LINEAR(0x0) XR30: LINEAR(0x0) XB30: LINEAR(0x0) YUYV: LINEAR(0x0) UYVY: LINEAR(0x0) NV12: LINEAR(0x0) 34 zpos: flags: range values: 0 1 value: 0 35 COLOR_ENCODING: flags: enum enums: ITU-R BT.601 YCbCr=0 ITU-R BT.709 YCbCr=1 value: 0 36 COLOR_RANGE: flags: enum enums: YCbCr limited range=0 YCbCr full range=1 value: 1 37 alpha: flags: range values: 0 65535 value: 65535 38 pixel blend mode: flags: enum enums: Pre-multiplied=0 Coverage=1 value: 0 42 0 0 0,0 0,0 0 0x00000001 formats: AR12 AB12 RA12 RG16 BG16 AR15 AB15 AR24 AB24 RA24 BA24 RG24 BG24 AR30 AB30 XR12 XB12 RX12 XR15 XB15 XR24 XB24 RX24 BX24 XR30 XB30 YUYV UYVY NV12 props: 8 type: flags: immutable enum enums: Overlay=0 Primary=1 Cursor=2 value: 0 30 IN_FORMATS: flags: immutable blob blobs: value: 01000000000000001d00000018000000 01000000900000004152313241423132 52413132524731364247313641523135 41423135415232344142323452413234 42413234524732344247323441523330 41423330585231325842313252583132 58523135584231355852323458423234 52583234425832345852333058423330 59555956555956594e56313200000000 ffffff1f000000000000000000000000 0000000000000000 in_formats blob decoded: AR12: LINEAR(0x0) AB12: LINEAR(0x0) RA12: LINEAR(0x0) RG16: LINEAR(0x0) BG16: LINEAR(0x0) AR15: LINEAR(0x0) AB15: LINEAR(0x0) AR24: LINEAR(0x0) AB24: LINEAR(0x0) RA24: LINEAR(0x0) BA24: LINEAR(0x0) RG24: LINEAR(0x0) BG24: LINEAR(0x0) AR30: LINEAR(0x0) AB30: LINEAR(0x0) XR12: LINEAR(0x0) XB12: LINEAR(0x0) RX12: LINEAR(0x0) XR15: LINEAR(0x0) XB15: LINEAR(0x0) XR24: LINEAR(0x0) XB24: LINEAR(0x0) RX24: LINEAR(0x0) BX24: LINEAR(0x0) XR30: LINEAR(0x0) XB30: LINEAR(0x0) YUYV: LINEAR(0x0) UYVY: LINEAR(0x0) NV12: LINEAR(0x0) 44 zpos: flags: range values: 0 1 value: 1 45 COLOR_ENCODING: flags: enum enums: ITU-R BT.601 YCbCr=0 ITU-R BT.709 YCbCr=1 value: 0 46 COLOR_RANGE: flags: enum enums: YCbCr limited range=0 YCbCr full range=1 value: 1 47 alpha: flags: range values: 0 65535 value: 65535 48 pixel blend mode: flags: enum enums: Pre-multiplied=0 Coverage=1 value: 0 Frame buffers: id size pitch root@am62pxx-evm:~#
BR,
Jeff
Hi,
Thanks for sharing.
Can you try the following:
Modify the sn65dsi86 driver, such that when you read the EDID, you increase all the blanking parameters (like hsync, vsync, etc) gradually, atleast by 10 each and see if it helps.
This process will help in reduce some clock mismatch and hsync errors you are seeing.
Hi,
For lane-polarity/data-lanes, we copy them from sample. Shall we remove them?
Can you remove those lines and retry?
Hi Expert,
I removed those lines and retried.
For Board -> DP -> DP to HDMI converter -> Capture -> PC, it still fails to resume the display while running kmsxxtest after replug.
For Board -> DP -> DP Monitor, I will test it next week because the DP Monitor was borrowed.
BR,
Jeff
Hi Expert,
I removed those line and test:
For Board -> DP -> DP Monitor, kmsxxtest sometimes fail to show display without hotplug. Also, it fails to resume the display while running kmsxxtest after hotplug.
BR,
Jeff
Hi Jeff,
Can you try testing with 11.2 SDK kernel?
It isn't release yet, but you can access that from within the ti-linux-kernel repo with:
git fetch origin git checkout 11.02.03
Hi Expert,
I patch it to our current code and get same situation: 1.Can't resume the display when I replug DP cable while running kmsxxtest. 2.Run kmsxxtest several times, and it display nothing sometimes.
BR,
Jeff
Okay, let me run a few tests on my end. We do not have this bridge capability on AM62P, but I'll check with another SoC that has the same DSS on the same kernel and let you know.
Hi Jeff,
I have been able to replicate your issue at my end with AM67 (DSS same as AM62P).
I see the following:
1. Video stream doesn't continue after hotplug.
2. Sn65 register status goes like this for me:
{f5,f6}={0x02,0x02} on boot
{f5,f6}={0x20/0x27,0x66/0x62} upon multiple kmstest runs
Even after error status in sn65 registers, kmstest sometimes works and sometimes doesn't.
I am registering this bug internally, though this is not a trivial debug and will take time. Will keep you posted when we have updates.
Hi Expert,
Understood. But in our product, it is necessary to be able to switch display port in run time. Please help us as soon as possible. Thanks.
BR,
Jeff
Hi Jeff,
Our dev team is working internally to fix these bugs, but we wanted to know your usecase of having re-plug continue the application. In a generic setup with embedded systems, we would expect the DP link to be always connected and wouldn't need to be physically replugged.
Your usecase will help us drive internal alignment on this.
Also, as a hack, will it suffice if the DP link always remains on, even if h e plug is removed, this may increase unnecessary power consumption when display is not connected.