AM625: DDR4 bit swapping validation

Yes, this looks good to me.  It appears that you only swapped DQ signals within a byte, which is acceptable.

Be sure to use the DDR Register configuration tool : https://dev.ti.com/sysconfig/?product=Processor_DDR_Config&device=AM62x to define this swapping for the software driver

Regards,

James

Thanks! Did something change? There are multiple threads saying that software changes aren't needed (looks like you were the commenter)

e2e.ti.com/.../am623-ddr4-data-bit-swapping

e2e.ti.com/.../4838857

Yes, originally, the tool did not have the capability to define the pin swapping.  For normal DDR4 operation, this is ok, since the training is performed over the address signals, and swapping DQ bits within a byte for normal data transactions would not be an issue (writing swizzled data would just read back with the same swizzle)

But if you wanted to try to read MR registers or other functions which require understanding of data bit swapping, then you would need to define the bits, so this capability was added.

So depending on your needs, you can choose to ignore the swizzle definition.

Regards,

James

That is great context. Thank you!