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Original question:

DRA821U-Q1: DRA821 eMMC Booting FAIL

DRA821U: EMMC failed under -15 °C with HS400ES

Ning Li
Intellectual 990 points

Part Number: DRA821U
Other Parts Discussed in Thread: DRA821, TDA4VM

Dear Ti

        EMMC failed under -15 °C with HS400ES, but works ok with HS400 and HS200.HS400ES.txt HS400.txt panic_20251118091816.txt 

 

  • 0
    Intellectual 990 points

    Fullscreen panic_20251118091816.txt Download 
    <Message HEAD> <boot_id:0xed> <time_stamp:1970-01-01 00:00:07>
[    0.     0] Booting Linux on physical CPU 0x0000000000 [0x411fd080]
[    0.     0] Linux version 5.10.0-1.h1.AOS3.2.aarch64 (oe-user@oe-host) (aarch64-aos-linux-gcc (iAOS BiSheng CPU 3.0.0.B017) 7.3.0, GNU ld (iAOS BiSheng CPU 3.0.0.B017) 2.38) #1 SMP PREEMPT Mon Nov 27 17:56:16 UTC 2023
[    0.     0] Kernel Tag Ver: 5.10.0-60.18.0.50.oe2203-h4.ias.iaos.r799
[    0.     0] Machine model: Texas Instruments K3 J7200 SoC
[    0.     0] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
[    0.     0] printk: bootconsole [ns16550a0] enabled
[    0.     0] efi: UEFI not found.
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a2000000, size 1 MiB
[    0.     0] OF: reserved mem: initialized node r5f-dma-memory@a2000000, compatible id shared-dma-pool
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a2100000, size 0 MiB
[    0.     0] OF: reserved mem: initialized node r5f-memory@a2100000, compatible id shared-dma-pool
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a3000000, size 1 MiB
[    0.     0] OF: reserved mem: initialized node r5f-dma-memory@a3000000, compatible id shared-dma-pool
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a3100000, size 1 MiB
[    0.     0] OF: reserved mem: initialized node r5f-memory@a3100000, compatible id shared-dma-pool
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a3200000, size 1 MiB
[    0.     0] OF: reserved mem: initialized node r5f-dma-memory@a3200000, compatible id shared-dma-pool
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a3300000, size 1 MiB
[    0.     0] OF: reserved mem: initialized node r5f-memory@a3300000, compatible id shared-dma-pool
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a4800000, size 32 MiB
[    0.     0] OF: reserved mem: initialized node r5f-shm-memory@a4800000, compatible id shared-dma-pool
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a6800000, size 2 MiB
[    0.     0] OF: reserved mem: initialized node r5f-virtual-eth-queues@a6800000, compatible id shared-dma-pool
[    0.     0] Reserved memory: created DMA memory pool at 0x00000000a6a00000, size 30 MiB
[    0.     0] OF: reserved mem: initialized node r5f-virtual-eth-buffers@a6a00000, compatible id shared-dma-pool
[    0.     0] NUMA: No NUMA configuration found
[    0.     0] NUMA: Faking a node at [mem 0x0000000080000000-0x00000000f1afffff]
[    0.     0] NUMA: NODE_DATA [mem 0xf1784ac0-0xf1786fff]
[    0.     0] Zone ranges:
[    0.     0]   DMA      [mem 0x0000000080000000-0x00000000f1afffff]
[    0.     0]   DMA32    empty
[    0.     0]   Normal   empty
[    0.     0] Movable zone start for each node
[    0.     0] Early memory node ranges
[    0.     0]   node   0: [mem 0x0000000080000000-0x000000009bffffff]
[    0.     0]   node   0: [mem 0x000000009c000000-0x000000009d5fffff]
[    0.     0]   node   0: [mem 0x000000009d600000-0x000000009e7fffff]
[    0.     0]   node   0: [mem 0x000000009e800000-0x00000000a34fffff]
[    0.     0]   node   0: [mem 0x00000000a3500000-0x00000000a3ffffff]
[    0.     0]   node   0: [mem 0x00000000a4000000-0x00000000a87fffff]
[    0.     0]   node   0: [mem 0x00000000a8800000-0x00000000f1afffff]
[    0.     0] Initmem setup node 0 [mem 0x0000000080000000-0x00000000f1afffff]
[    0.     0] On node 0 totalpages: 465664
[    0.     0]   DMA zone: 7276 pages used for memmap
[    0.     0]   DMA zone: 0 pages reserved
[    0.     0]   DMA zone: 465664 pages, LIFO batch:63
[    0.     0] On node 0, zone DMA: 256 pages in unavailable ranges
[    0.     0] cma: Reserved 400 MiB at 0x00000000d6000000
[    0.     0] psci: probing for conduit method from DT.
[    0.     0] psci: PSCIv1.1 detected in firmware.
[    0.     0] psci: Using standard PSCI v0.2 function IDs
[    0.     0] psci: MIGRATE_INFO_TYPE not supported.
[    0.     0] psci: SMC Calling Convention v1.2
[    0.     0] percpu: Embedded 53 pages/cpu s178264 r8192 d30632 u217088
[    0.     0] pcpu-alloc: s178264 r8192 d30632 u217088 alloc=53*4096
[    0.     0] pcpu-alloc: [0] 0 [0] 1 
[    0.     0] Detected PIPT I-cache on CPU0
[    0.     0] CPU features: detected: GIC system register CPU interface
[    0.     0] CPU features: detected: EL2 vector hardening
[    0.     0] CPU features: detected: ARM errata 1165522, 1319367, or 1530923
[    0.     0] CPU features: detected: Spectre-BHB
[    0.     0] Fallback order for Node 0: 0 
[    0.     0] Built 1 zonelists, mobility grouping on.  Total pages: 458388
[    0.     0] Policy zone: DMA
[    0.     0] Kernel command line: devmem=relaxed console=ttyS2,115200n8 loglevel=0 earlycon=ns16550a,mmio32,0x02800000 creat-dm-sign=1 initrd=0x88080000,104857600 root=/dev/ram rw rdinit=/etc/init.sh rootfstype=ext4 rootwait
[    0.     0] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[    0.     0] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear)
[    0.     0] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.     0] Memory: 1086228K/1862656K available (14272K kernel code, 2200K rwdata, 5260K rodata, 4480K init, 5417K bss, 366828K reserved, 409600K cma-reserved)
[    0.     0] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.     0] kmemleak: Kernel memory leak detector disabled
[    0.     0] ftrace: allocating 41223 entries in 162 pages
[    0.     0] ftrace: allocated 162 pages with 3 groups
[    0.     0] rcu: Preemptible hierarchical RCU implementation.
[    0.     0] rcu: 	RCU event tracing is enabled.
[    0.     0] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=2.
[    0.     0] 	Trampoline variant of Tasks RCU enabled.
[    0.     0] 	Rude variant of Tasks RCU enabled.
[    0.     0] 	Tracing variant of Tasks RCU enabled.
[    0.     0] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[    0.     0] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
[    0.     0] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.     0] GICv3: GIC: Using split EOI/Deactivate mode
[    0.     0] GICv3: 960 SPIs implemented
[    0.     0] GICv3: 0 Extended SPIs implemented
[    0.     0] GICv3: Distributor has no Range Selector support
[    0.     0] GICv3: 16 PPIs implemented
[    0.     0] GICv3: CPU0: found redistributor 0 region 0:0x0000000001900000
[    0.     0] ITS [mem 0x01820000-0x0182ffff]
[    0.     0] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[    0.     0] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[    0.     0] ITS@0x0000000001820000: allocated 524288 Devices @80800000 (flat, esz 8, psz 64K, shr 0)
[    0.     0] ITS: using cache flushing for cmd queue
[    0.     0] GICv3: using LPI property table @0x0000000080190000
[    0.     0] GIC: using cache flushing for LPI property table
[    0.     0] GICv3: CPU0: using allocated LPI pending table @0x00000000801a0000
[    0.     0] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[    0.     0] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[    0.     2] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[    0.   133] Console: colour dummy device 80x25
[    0.   203] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=800000)
[    0.   210] pid_max: default: 32768 minimum: 301
[    0.   331] LSM: Security Framework initializing
[    0.   373] SELinux:  Initializing.
[    0.   434] zta_lsm: Initializing.
[    0.   484] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.   497] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.  1628] rcu: Hierarchical SRCU implementation.
[    0.  2106] Platform MSI: msi-controller@1820000 domain created
[    0.  2202] PCI/MSI: /bus@100000/interrupt-controller@1800000/msi-controller@1820000 domain created
[    0.  2231] EFI services will not be available.
[    0.  2390] smp: Bringing up secondary CPUs ...
[    0.  3100] Detected PIPT I-cache on CPU1
[    0.  3125] GICv3: CPU1: found redistributor 1 region 0:0x0000000001920000
[    0.  3138] GICv3: CPU1: using allocated LPI pending table @0x00000000801b0000
[    0.  3188] CPU1: Booted secondary processor 0x0000000001 [0x411fd080]
[    0.  3259] smp: Brought up 1 node, 2 CPUs
[    0.  3263] SMP: Total of 2 processors activated.
[    0.  3267] CPU features: detected: 32-bit EL0 Support
[    0.  3271] CPU features: detected: CRC32 instructions
[    0. 11810] CPU: All CPU(s) started at EL2
[    0. 11834] alternatives: patching kernel code
[    0. 12440] devtmpfs: initialized
[    0. 16845] KASLR disabled due to lack of seed
[    0. 16972] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[    0. 16984] futex hash table entries: 512 (order: 3, 32768 bytes, linear)
[    0. 21972] pinctrl core: initialized pinctrl subsystem
[    0. 22269] DMI not present or invalid.
[    0. 22283] [kbox] the config 0x7f is ok
[    0. 22285] [kbox] Product: Unknown
[    0. 22805] [kbox] -------- load OK --------
[    0. 22904] [xpc drv] no xpc compatible node, skip
[    0. 23294] NET: Registered protocol family 16
[    0. 24255] DMA: preallocated 256 KiB GFP_KERNEL pool for atomic allocations
[    0. 24341] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[    0. 24438] DMA: preallocated 256 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0. 24478] audit: initializing netlink subsys (disabled)
[    0. 24617] audit: type=2000 audit(0.024:1): state=initialized audit_enabled=0 res=1
[    0. 24967] thermal_sys: Registered thermal governor 'step_wise'
[    0. 25292] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0. 25335] ASID allocator initialised with 65536 entries
[    0. 25340] HugeTLB: can optimize 4095 vmemmap pages for hugepages-1048576kB
[    0. 25343] HugeTLB: can optimize 127 vmemmap pages for hugepages-32768kB
[    0. 25345] HugeTLB: can optimize 7 vmemmap pages for hugepages-2048kB
[    0. 25348] HugeTLB: can optimize 0 vmemmap pages for hugepages-64kB
[    0. 25462] Serial: AMBA PL011 UART driver
[    0. 32954] [kbox drv] check kboxdriver param success
[    0. 32959] [kbox drv] -------- init start --------
[    0. 32962] [kbox drv] num of online cpus: 2
[    0. 32965] [kbox drv] cannot find sctrl register address, operation of setting sctrl register will be ignored
[    0. 32971] [kbox drv] ioremap success
[    0. 32973] [kbox drv] addr init success.
[    0. 32976] [kbox drv] manage area init success
[    0. 33101] [kbox drv] dev init success
[    0. 33105] [kbox drv] start proc init
[    0. 33114] [kbox drv] -------- load OK --------
[    0. 36194] HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[    0. 36200] HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
[    0. 36203] HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[    0. 36206] HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
[    0. 36997] cryptd: max_cpu_qlen set to 1000
[    0. 58617] k3-chipinfo 43000014.chipid: Family:J7200 rev:SR2.0 JTAGID[0x1bb6d02f] Detected
[    0. 58885] vsys_3v3: supplied by evm_12v0
[    0. 59145] vsys_5v0: supplied by evm_12v0
[    0. 59724] iommu: Default domain type: Translated 
[    0. 59921] SCSI subsystem initialized
[    0. 60017] pps_core: LinuxPPS API ver. 1 registered
[    0. 60019] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0. 60026] PTP clock support registered
[    0. 60043] EDAC MC: Ver: 3.0.0
[    0. 60458] FPGA manager framework
[    0. 61076] clocksource: Switched to clocksource arch_sys_counter
[    0.272839] VFS: Disk quotas dquot_6.6.0
[    0.272883] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[    0.276418] NET: Registered protocol family 2
[    0.276587] IP idents hash table entries: 32768 (order: 6, 262144 bytes, linear)
[    0.277240] tcp_listen_portaddr_hash hash table entries: 1024 (order: 2, 16384 bytes, linear)
[    0.277292] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.277300] TCP established hash table entries: 16384 (order: 5, 131072 bytes, linear)
[    0.277357] TCP bind hash table entries: 16384 (order: 6, 262144 bytes, linear)
[    0.277466] TCP: Hash tables configured (established 16384 bind 16384)
[    0.277585] UDP hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.277612] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.277720] NET: Registered protocol family 1
[    0.278127] RPC: Registered named UNIX socket transport module.
[    0.278131] RPC: Registered udp transport module.
[    0.278133] RPC: Registered tcp transport module.
[    0.278136] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.278145] PCI: CLS 0 bytes, default 64
[    0.278244] Trying to unpack rootfs image as initramfs...
[    0.739078] rootfs image is not initramfs (invalid magic at start of compressed archive); looks like an initrd
[    0.886945] Freeing initrd memory: 102400K
[    0.887327] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
[    0.889731] modsign: There is no certification file
[    0.889737] Initialise system trusted keyrings
[    0.889840] workingset: timestamp_bits=42 max_order=19 bucket_order=0
[    0.893426] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.893844] NFS: Registering the id_resolver key type
[    0.893865] Key type id_resolver registered
[    0.893868] Key type id_legacy registered
[    0.893983] 9p: Installing v9fs 9p2000 file system support
[    0.894337] cms cbb init
[    0.894452] modsign: create major 244 for module crl devs
[    0.894462] Key type asymmetric registered
[    0.894465] Asymmetric key parser 'x509' registered
[    0.894481] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
[    0.894485] io scheduler mq-deadline registered
[    0.894488] io scheduler kyber registered
[    0.895268] pinctrl-single 4301c000.pinctrl: 13 pins, size 52
[    0.895367] pinctrl-single 4301c038.pinctrl: 2 pins, size 8
[    0.895493] pinctrl-single 4301c068.pinctrl: 59 pins, size 236
[    0.895562] pinctrl-single 4301c174.pinctrl: 8 pins, size 32
[    0.895712] pinctrl-single 11c000.pinctrl: 67 pins, size 268
[    0.895777] pinctrl-single 11c11c.pinctrl: 3 pins, size 12
[    0.899672] Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled
[    0.901172] Serial: AMBA driver
[    0.906479] brd: module loaded
[    0.909659] loop: module loaded
[    0.910027] megasas: 07.714.04.00-rc1
[    0.911697] tun: Universal TUN/TAP device driver, 1.6
[    0.911828] CAN device driver interface
[    0.911958] igbvf: Intel(R) Gigabit Virtual Function Network Driver
[    0.911960] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
[    0.911990] sky2: driver version 1.30
[    0.912187] VFIO - User Level meta-driver version: 0.3
[    0.912572] i2c /dev entries driver
[    0.912975] sdhci: Secure Digital Host Controller Interface driver
[    0.912978] sdhci: Copyright(c) Pierre Ossman
[    0.913035] sdhci-pltfm: SDHCI platform and OF driver helper
[    0.913470] ledtrig-cpu: registered to indicate activity on CPUs
[    0.913680] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[    0.914832] NET: Registered protocol family 17
[    0.914872] can: controller area network core
[    0.914914] NET: Registered protocol family 29
[    0.914918] can: raw protocol
[    0.914922] can: broadcast manager protocol
[    0.914927] can: netlink gateway - max_hops=1
[    0.915024] 8021q: 802.1Q VLAN Support v1.8
[    0.915092] 9pnet: Installing 9P2000 support
[    0.915128] Key type dns_resolver registered
[    0.915306] Loading compiled-in X.509 certificates
[    0.920156] ti-sci 44083000.dmsc: ABI: 3.1 (firmware rev 0x0015 '21.9.2-v2021.09b (Terrific Llam')
[    0.963686] ti-sci-intr bus@100000:bus@28380000:interrupt-controller2: Interrupt Router 137 domain created
[    0.963903] ti-sci-intr bus@100000:interrupt-controller0: Interrupt Router 131 domain created
[    0.964037] ti-sci-intr bus@100000:bus@30000000:interrupt-controller1: Interrupt Router 213 domain created
[    0.964236] ti-sci-inta 33d00000.msi-controller: Interrupt Aggregator domain 209 created
[    0.965856] k3-ringacc 2b800000.ringacc: Ring Accelerator probed rings:286, gp-rings[96,32] sci-dev-id:235
[    0.965862] k3-ringacc 2b800000.ringacc: dma-ring-reset-quirk: disabled
[    0.965865] k3-ringacc 2b800000.ringacc: RA Proxy rev. 66349100, num_proxies:64
[    0.968924] k3-ringacc 3c000000.ringacc: Ring Accelerator probed rings:1024, gp-rings[120,200] sci-dev-id:211
[    0.968930] k3-ringacc 3c000000.ringacc: dma-ring-reset-quirk: disabled
[    0.968934] k3-ringacc 3c000000.ringacc: RA Proxy rev. 66349100, num_proxies:64
[    0.974659] 40a00000.serial: ttyS1 at MMIO 0x40a00000 (irq = 23, base_baud = 6000000) is a 8250
[    0.975472] 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 26, base_baud = 3000000) is a 8250
[    0.975506] printk: console [ttyS2] enabled
[    0.975509] printk: bootconsole [ns16550a0] disabled
[    0.976258] 2810000.serial: ttyS3 at MMIO 0x2810000 (irq = 27, base_baud = 3000000) is a 8250
[    0.986331] ti-udma 285c0000.dma-controller: Channels: 26 (tchan: 13, rchan: 13, gp-rflow: 8)
[    0.994758] ti-udma 31150000.dma-controller: Channels: 50 (tchan: 25, rchan: 25, gp-rflow: 8)
[    0.996296] debugfs: Directory 'pd:240' with parent 'pm_genpd' already present!
[    1. 14666] random: crng init done
[    1. 17141] SDEI NMI watchdog: Bind interrupt failed. Firmware may not support SDEI !
[    1. 20661] Freeing unused kernel memory: 4480K
[    1. 20738] Run /etc/init.sh as init process
[    1. 20741]   with arguments:
[    1. 20744]     /etc/init.sh
[    1. 20746]   with environment:
[    1. 20749]     HOME=/
[    1. 20751]     TERM=linux
[    1. 20753]     creat-dm-sign=1
[    1. 32129] i2c_omap: loading out-of-tree module taints kernel.
[    1. 39551] omap_i2c 2040000.i2c: bus 0 rev0.12 at 400 kHz
[    1. 54691] sdhci-am654 4f80000.mmc: Relock CAL 1 times
[    1. 55751] mmc0: CQHCI version 5.10
[    1. 57111] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1. 89635] mmc0: SDHCI controller on 4f80000.mmc [4f80000.mmc] using ADMA 64-bit
[    1.101468] device-mapper: ioctl: 4.43.0-ioctl (2020-10-01) initialised: dm-devel@redhat.com
[    1.158948] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.161277] mmc0: error -110 whilst initialising MMC card
[    1.161282] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.163583] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.276529] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.278853] mmc0: error -110 whilst initialising MMC card
[    1.278864] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.281130] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.403608] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.405312] mmc0: error -110 whilst initialising MMC card
[    1.405319] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.407620] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.577039] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.580732] mmc0: Command Queue Engine enabled
[    1.580741] mmc0: new HS400 Enhanced strobe MMC card at address 0001
[    1.581127] mmcblk0: mmc0:0001 DG4016 14.7 GiB 
[    1.581250] mmcblk0boot0: mmc0:0001 DG4016 partition 1 4.00 MiB
[    1.581371] mmcblk0boot1: mmc0:0001 DG4016 partition 2 4.00 MiB
[    1.581492] mmcblk0rpmb: mmc0:0001 DG4016 partition 3 4.00 MiB, chardev (236:0)
[    1.582194] mmc0: running CQE recovery
[    1.582648] mmc0: cache flush error -110
[    1.582657] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.586227] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.660443] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.662383] mmc0: tried to HW reset card, got error -110
[    1.662424] mmc0: running CQE recovery
[    1.662654] mmc0: cache flush error -74
[    1.662660] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.666216] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.740972] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.743293] mmc0: tried to HW reset card, got error -110
[    1.743331] mmc0: running CQE recovery
[    1.743510] blk_update_request: I/O error, dev mmcblk0, sector 0 op 0x0:(READ) flags 0x0 phys_seg 1 prio class 0
[    1.743517] Buffer I/O error on dev mmcblk0, logical block 0, async page read
[    1.743610] mmc0: cache flush error -74
[    1.743616] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.747173] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.824440] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.826353] mmc0: tried to HW reset card, got error -110
[    1.826390] mmc0: running CQE recovery
[    1.826620] mmc0: cache flush error -74
[    1.826626] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.830181] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    1.906265] sdhci-am654 4f80000.mmc: Enhanced Strobe value after change 0
[    7.687395] /dev/mapper/vfs: Can't open blockdev
[    7.709732] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000100
[    7.709742] CPU: 1 PID: 1 Comm: switch_root Tainted: G           O      5.10.0-1.h1.AOS3.2.aarch64 #1
[    7.709745] Hardware name: Texas Instruments K3 J7200 SoC (DT)
[    7.709748] Call trace:
[    7.709761]  dump_backtrace+0x0/0x210
[    7.709766]  show_stack+0x2c/0x38
[    7.709772]  dump_stack+0x124/0x1a0
[    7.709776]  panic+0x1c0/0x3f4
[    7.709780]  do_exit+0x794/0xb38
[    7.709782]  do_group_exit+0x40/0xa0
[    7.709785]  __arm64_sys_exit_group+0x24/0x28
[    7.709791]  do_el0_svc+0x9c/0x278
[    7.709793]  el0_svc+0x1c/0x28
[    7.709796]  el0_sync_handler+0x94/0x128
[    7.709799]  el0_sync+0x168/0x180
[    7.709804] SMP: stopping secondary CPUs
[    7.709812] [kbox] unable to set sctrl register, maybe the domain is not SD, continue
[    7.709814] [kbox] catch panic event, panic reason:Attempted to kill init! exitcode=0x00000100
[    7.709818] [kbox] catch panic event, start logging
[    7.709826] CPU: 1 PID: 1 Comm: switch_root Tainted: G           O      5.10.0-1.h1.AOS3.2.aarch64 #1
[    7.709828] Hardware name: Texas Instruments K3 J7200 SoC (DT)
[    7.709830] Call trace:
[    7.709833]  dump_backtrace+0x0/0x210
[    7.709836]  show_stack+0x2c/0x38
[    7.709840]  dump_stack+0x124/0x1a0
[    7.709845]  kbox_panic_notifier_callback+0x1e4/0x338
[    7.709849]  notifier_call_chain+0x78/0x148
[    7.709852]  atomic_notifier_call_chain+0x40/0x60
[    7.709855]  panic+0x1f4/0x3f4
[    7.709858]  do_exit+0x794/0xb38
[    7.709861]  do_group_exit+0x40/0xa0
[    7.709864]  __arm64_sys_exit_group+0x24/0x28
[    7.709867]  do_el0_svc+0x9c/0x278
[    7.709870]  el0_svc+0x1c/0x28
[    7.709872]  el0_sync_handler+0x94/0x128
[    7.709875]  el0_sync+0x168/0x180
[    7.709877] [kbox] stack:
[    7.709881] [kbox] stack grow from: 0xffff800011f2c000 to 0xffff800011f2bb60
[    7.709886] [kbox] <ffff800011f2bb78>    ffff800010a94a38		kbox_show_stack_info+0x20/0x30
[    7.709889] [kbox] <ffff800011f2bb98>    ffff800010a95478		kbox_panic_notifier_callback+0x1f8/0x338
[    7.709893] [kbox] <ffff800011f2bbb8>    ffff80001007b238		notifier_call_chain+0x78/0x148
[    7.709896] [kbox] <ffff800011f2bbe8>    ffff80001007b5f8		atomic_notifier_call_chain+0x40/0x60
[    7.709899] [kbox] <ffff800011f2bc38>    ffff80001007b5e0		atomic_notifier_call_chain+0x28/0x60
[    7.709903] [kbox] <ffff800011f2bc48>    ffff800010c75ec4		panic+0x1f4/0x3f4
[    7.709906] [kbox] <ffff800011f2bcc8>    ffff800010053db4		do_exit+0x794/0xb38
[    7.709910] [kbox] <ffff800011f2bd98>    ffff8000100541f0		do_group_exit+0x40/0xa0
[    7.709913] [kbox] <ffff800011f2bdf8>    ffff800010054274		__arm64_sys_exit_group+0x24/0x28
[    7.709916] [kbox] <ffff800011f2be28>    ffff800010028a04		do_el0_svc+0x9c/0x278
[    7.709919] [kbox] <ffff800011f2be38>    ffff800010c7d688		el0_ia+0x60/0xc8
[    7.709922] [kbox] <ffff800011f2be48>    ffff800010c7d59c		el0_svc+0x1c/0x28
[    7.709925] [kbox] <ffff800011f2be78>    ffff800010c7dd84		el0_sync_handler+0x94/0x128
[    7.709928] [kbox] <ffff800011f2be98>    ffff800010011c68		el0_sync+0x168/0x180
[    7.709932] [kbox] start to collect

  • 0 in reply to Ning Li
    TI__Genius 16550 points

    Hi Ning Li,

     Our Expert is out of office. Kindly accept delay in response for 2 days.

    Regards,

    Karthik

  • 0 in reply to Karthikeyan S
    TI__Guru**** 171240 points

    Hello, 

    Is the EMMC part expected to work in HS400ES mode at -15C?

    Best Regards,

    Keerthy 

  • 0 in reply to Keerthy J
    TI__Mastermind 19080 points

    Thanks keerthy for jumping in.

    Ning, just to add-on to this, by default HS400ES speed mode is not supported .

    Best regards

    Gokul Praveen

  • 0 in reply to Keerthy J
    Intellectual 990 points

    Hello Keerthy

        Yes, The EMMC can work for -40C to 110C, and the feedback from sandisk is so too.

    thanks!

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    Hi Ning,

    • Can you help us with which SDK version you are using?
    • Can you test with the latest SDK version?
    • Are you using TI EVM or custom board?
      • If custom board, can you check if this same issue is being reproduced in TI EVM?

    Best Regards

    Gokul Praveen

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul 

    1. SDK Version: pdk_jacinto_08_06_00_31,

    3. Custom board, and found that not all of the custom board has the issue, only found 2 board has the issue.

    2. About the latest SDK  version, how about only upgrade the mmc/sdhci_am654 driver? It is importable to upgrade all of the SDK due to we use Huawei AOS instead of default TI rootfs.

    thanks!

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    HI Ning,

    Ning Li said:
    About the latest SDK  version, how about only upgrade the mmc/sdhci_am654 driver? It is importable to upgrade all of the SDK due to we use Huawei AOS instead of default TI rootfs.

    Actually, just changing the sdhci_am654 driver will not suffice.

    A more robust solution would be to use the latest linux kernel image while generating the app image. 

    Alos, is HS400ES mode working at normal temperature.

    Regards

    Gokul Praveen

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul

           How about change the legacy? If it make sense, so how to change it?

    	main_sdhci0: mmc@4f80000 {
		compatible = "ti,j7200-sdhci-8bit", "ti,j721e-sdhci-8bit";
		reg = <0x00 0x04f80000 0x00 0x260>, <0x00 0x4f88000 0x00 0x134>;
		interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
		power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
		clock-names = "clk_ahb", "clk_xin";
		clocks = <&k3_clks 91 0>, <&k3_clks 91 3>;
		assigned-clocks = <&k3_clks 91 3>;
		assigned-clock-parents = <&k3_clks 91 5>;
		ti,otap-del-sel-legacy = <0x0>;
		ti,otap-del-sel-mmc-hs = <0x0>;
		ti,otap-del-sel-ddr52 = <0x6>;
		ti,otap-del-sel-hs200 = <0x8>;
		ti,otap-del-sel-hs400 = <0x5>;
		ti,itap-del-sel-legacy = <0x10>;
		ti,itap-del-sel-mmc-hs = <0xa>;
		ti,strobe-sel = <0x77>;
		ti,clkbuf-sel = <0x7>;
		ti,trm-icp = <0x8>;
		bus-width = <8>;
		mmc-ddr-1_8v;
		mmc-hs200-1_8v;
		mmc-hs400-1_8v;
		mmc-hs400-enhanced-strobe;
		dma-coherent;
	};

    Like this?

    --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -629,9 +629,10 @@ main_sdhci0: mmc@4f80000 {
         ti,otap-del-sel-mmc-hs = <0x0>;
         ti,otap-del-sel-ddr52 = <0x6>;
         ti,otap-del-sel-hs200 = <0x8>;
-        ti,otap-del-sel-hs400 = <0x5>;
+        ti,otap-del-sel-hs400 = <0xf>;
         ti,itap-del-sel-legacy = <0x10>;
         ti,itap-del-sel-mmc-hs = <0xa>;
+        ti,driver-strength-ohm = <100>;
         ti,strobe-sel = <0x77>;
         ti,clkbuf-sel = <0x7>;
         ti,trm-icp = <0x8>;

    thanks

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    Hi Ning,

    Ning Li said:
    3. Custom board, and found that not all of the custom board has the issue, only found 2 board has the issue.

    I don't think it is a software issue because as per your response only 2 boards has this issue.

    Secondly, since it is HS400 ES , the response clock is provided by the EMMC. Hence, it is highly likely that the response provided by the eMMC device is not able to be synced properly with the STROBE clock signal provided by the eMMC device. 

    Anyway, I will just loop in the hardware expert expert as well to get their suggestions on this.

    Gokul Praveen said:
    Alos, is HS400ES mode working at normal temperature.

    Can you help me with this as well? Is HS400 ES working at normal temperatures on all boards.

    Regards

    Gokul Praveen

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul 

    Gokul Praveen said:
    Can you help me with this as well? Is HS400 ES working at normal temperatures on all boards.

    Yes, HS400ES works ok at normal temperatures so far as I know.

    thanks！

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    Hi Ning,

    Thank you for the info.

    Gokul Praveen said:

    Secondly, since it is HS400 ES , the response clock is provided by the EMMC. Hence, it is highly likely that the response provided by the eMMC device is not able to be synced properly with the STROBE clock signal provided by the eMMC device. 

    Anyway, I will just loop in the hardware expert expert as well to get their suggestions on this.

    I have also notified the hardware expert regarding this . Thanks in advance for your patience.

     In the meantime, can you also check if HS400ES mode is working on TI EVM at low temperatures?

    Regards

    Gokul Praveen

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul

    Gokul Praveen said:

     In the meantime, can you also check if HS400ES mode is working on TI EVM at low temperatures?

    We don't have dra821 EVM now, they are broken or lost, just have TDA4VM EVM.

    Do you have any iDea to workaround this issue and RPMB issue, if there is no issue with RPMB, it is ok with HS400, even with HS200.

    As I test, there is RPMB issue even with HS200.

    thanks!

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    Hi Ning,

    Ning Li said:
    Do you have any iDea to workaround this issue and RPMB issue, if there is no issue with RPMB, it is ok with HS400, even with HS200.

    First Suggestion:

    Ideally, all speed modes which does not involve tuning (ie: all speed modes except HS200 and HS400) will not cause the RPMB issue.That is one suggestion, which is to switch to speed modes lower than HS200.

    Second suggestion:

    Avoid using the RPMB partition and then HS200 and HS400 speed modes will not cause any issue.

    Third Suggestion:

    This would be to discuss with the emmc IP vendors on why HS400ES does not work at -15 degrees while I have parallely informed the hardware expert to look into the same. 

    Also , can you provided the command response signals , if possible in the non-working case.

    Best Regards

    Gokul Praveen

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul

        Thank you for your suggestions at first.

    Gokul Praveen said:

    Also , can you provided the command response signals , if possible in the non-working case.

        The two boards are both sealed, need time to cut them open.

    Found that we spread the clock to 192MHZ from 200M for eMMC due to MMC test requirement. 

    And after roll back to 200M, the issue disappear.

    Does it mean that it must 200M for HS400ES? Or some else that need change for the code if we use 192MHZ? 

    --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -623,6 +623,8 @@ main_sdhci0: mmc@4f80000 {
         power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
         clock-names = "clk_ahb", "clk_xin";
         clocks = <&k3_clks 91 0>, <&k3_clks 91 3>;
+        assigned-clocks = <&k3_clks 91 3>;
+        assigned-clock-parents = <&k3_clks 91 5>;
         ti,otap-del-sel-legacy = <0x0>;
         ti,otap-del-sel-mmc-hs = <0x0>;
         ti,otap-del-sel-ddr52 = <0x6>;

    thanks！

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    Hi Ning,

    Ning Li said:

    Found that we spread the clock to 192MHZ from 200M for eMMC due to MMC test requirement. 

    And after roll back to 200M, the issue disappear.

    Great that you were able to find the root cause.

    So basically, if the clock frequency is changed the otap-sel-sel parameter will be different for a different clock-frequency as they are chosen initially after stress testing(using multiple reads and writes) at different temperature for a specific clock-frequency.

    Hence, it is ideal to use 200MHZ clock itself , as using a different clock frequency could cause data inconsistencies , especially for higher frequencies like HS400 ES.

    Best regards

    Gokul Praveen

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul

          It seems works ok under 192MHZ after adjust some parameters. Do we need to do some eye diagram tests before use them?

    --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -625,13 +625,14 @@ main_sdhci0: mmc@4f80000 {
         clocks = <&k3_clks 91 0>, <&k3_clks 91 3>;
         assigned-clocks = <&k3_clks 91 3>;
         assigned-clock-parents = <&k3_clks 91 5>;
+        max-frequency=<192000000>;
         ti,otap-del-sel-legacy = <0x0>;
         ti,otap-del-sel-mmc-hs = <0x0>;
         ti,otap-del-sel-ddr52 = <0x6>;
-        ti,otap-del-sel-hs200 = <0x8>;
-        ti,otap-del-sel-hs400 = <0x5>;
+        ti,otap-del-sel-hs200 = <0x9>;
+        ti,otap-del-sel-hs400 = <0x7>;
         ti,itap-del-sel-legacy = <0x10>;
-        ti,itap-del-sel-mmc-hs = <0xa>;
+        ti,itap-del-sel-mmc-hs = <0xb>;
         ti,strobe-sel = <0x77>;
         ti,clkbuf-sel = <0x7>;
         ti,trm-icp = <0x8>;

    thanks!

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    Hi Ning,

    Eye diagram tests would be needed, but we cannot gurantee that these parameters changes will work at all temperatures. Ideally, a stress testing will have to be done from your side to confirm on the same.

    Just as a suggestion Ning , 200 Mhz clock frequency would be a more robust solution as it has already been tested before.

    Best regards,

    Gokul Praveen

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul 

        It works ok just add “max-frequency=<192000000>;” seems not need change other parameters.

    So how to understand these? As the requirement to change clock to 192MHZ, we got patch like this, and it works from oscilloscope.

             assigned-clocks = <&k3_clks 91 3>;
         assigned-clock-parents = <&k3_clks 91 5>;

    thanks！

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul 

    1. Now that "assigned-clocks" and "assigned-clock-parents" limit the hardware clock to 192MHZ, the max-frequency should not more than 192MHZ, that is , it should not according to  "max-frequency" instead of the real hardware clock(192MHZ), right?

    		assigned-clocks = <&k3_clks 91 3>;
		assigned-clock-parents = <&k3_clks 91 5>;
        max-frequency=<192000000>;

    2. Whatever, it should change the otap-sel-sel parameters if we change clock to 192MHZ?

    thanks！

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    Hi Ning,

    Ning Li said:
    1. Now that "assigned-clocks" and "assigned-clock-parents" limit the hardware clock to 192MHZ, the max-frequency should not more than 192MHZ, that is , it should not according to  "max-frequency" instead of the real hardware clock(192MHZ), right?

    Yes, you are right, Ning,.

    Regards

    Gokul Praveen

  • 0 in reply to Gokul Praveen
    Intellectual 990 points

    Hello Gokul 

          But it confused me that why "max-frequency = 1920000000" can avoid emmc -110 timeout issue at low degree?

    The EMMC vender said that the emmc we chose is a little weak in ECC verification in low degree, but it meet the standard.

    thanks！

  • 0 in reply to Ning Li
    TI__Mastermind 19080 points

    Hi Ning,

    Ning Li said:
          But it confused me that why "max-frequency = 1920000000" can avoid emmc -110 timeout issue at low degree?

    As per my understanding, the max-frequency parameter is specific to the device(ie:emmc) and is like a safety measure I believe to strictly limit the emmc to operate in 192 Mhz , Ning. 

    So, basically, even if you are sure that the clocks operate at a specific frequency, the max-frequency parameter must still be used as it double confirms that the frequence is set to that for the device.

    It could be that 

    Regards

    Gokul Praveen