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AM2431: Parallel NOR Flash with GPMC

Part Number: AM2431
Other Parts Discussed in Thread: SYSCONFIG

Hi experts,

The customer is considering the AM2431 and is planning the following configuration:

  • QSPI: For SBL(Infineon S25FL064LABMFI000)
  • GPMC: For firmware storage(Macronix MX29LV160D)

We would like to ask the following questions.

Q1:Is it possible to connect and use the above devices with this configuration?
Based on the documents listed below, we believe that there should be no issue with the connection itself, but we would like to confirm this to be sure.
AM243x MCU+ SDK: Adding Support For a Custom Flash Device 
(+) [FAQ] MCU-PLUS-SDK-AM62X: How to interface QSPI Flash Part - Processors forum - Processors - TI E2E support forums 
(+) [FAQ] MCU-PLUS-SDK-AM243X: [FAQ] How to debug/develop/migrate the flash driver for custom flash on non-TI EVM (OSPI/xSPI) ? - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums 

Q2:When connecting a NOR Flash to the GPMC, is it correct to configure it as “PSRAM” in SysConfig?
The MX29LV160D is an asynchronous device.
image.png

Q3:Are there any plans to support SBL booting via GPMC?
If there are any updates to the thread below, please let us know.
(+) AM2432: GPMC NOR Flash application questions - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums 

We understand that, at present, there is no software support for loading programs from Flash connected via GPMC.
As a first step, we would like to verify that the above configuration works correctly, and then consider unifying the design to use either QSPI or GPMC going forward.

Best regards,
O.H

  • Hi experts,

    Sorry for rush you. Is there any update?

    Q4: As an additional question, is there a tool that can write to Flash connected to GPMC? Can it only be written using the sample code base? 
    AM243x MCU+ SDK: Flashing Tools

    Best regards,
    O.H

  • Hi,

    Regarding your question-1, yes, it is possible to use the QSPI device(S25FL064LABMFI000) which you have mentioned. The documents which you have linked should be sufficient. Please let me know if you are facing any issues or have any questions regarding QSPI Flash device or the QSPI Interface.

    Regards,

    Aryamaan Chaurasia

  • Hi Aryamaan Chaurasia,

    Thank you for your reply. I understood about Q1.

    How about Q2, 3, 4?

    Best reagrads,
    O.H

  • Hi,

    Regarding questions 2,3,4, I have assigned this thread to the GPMC expert. Please expect a response by next week,since he is on business travel.

    Thanks and Regards,

    Aryamaan Chaurasia

  • Hi Aryamaan Chaurasia,

    Sorry for rush you. Is there any update?

    Best regards,
    O.H

  • Hi,

    I apologize for the delay in response. I have followed up with our GPMC expert and requested that they provide an update as soon as possible.

    Regards,

    Aryamaan Chaurasia

  • Hello OH,

    In the MCU+SDK, we don't officially support NOR flash memory on GPMC. However, with some modifications, the existing PSRAM driver infrastructure can be adapted to work with NOR flash.

    You can try the following steps:

    1. Generate the code for PSRAM using SysConfig
    2. Copy the generated code into a new file to create a separate NOR driver, then remove the PSRAM configuration from SysConfig
    3. Set the device type to NOR memory (GPMC_DEVICETYPE_NORLIKE), Mode either it is synchronous or Asynch and Timing parameters .
    4. Implement the erase function, which is not present in the PSRAM driver. NOR flash requires sector/chip erase before programming, using command sequences specific to your device (MX29LV160D)
    5. For read operations, you can use the same functionality as PSRAM since NOR memory is memory-mapped and read works directly
    6. For write/program operations, you cannot use direct memory writes like PSRAM. NOR flash requires CFI command sequences to program data. This involves sending an unlock sequence  followed by the program command  then writing the actual data to the target address, and finally polling for completion. The existing GPMC_norWriteData() function can be used to send these individual command writes, but you need to implement the proper command sequence wrapper for programming.

    To read and write via GPMC, there are no dedicated tools available. You will need to use the GPMC examples as reference for implementing your read and write operations.

    Also, there are currently no plans to support GPMC-based Secondary Boot Loader (SBL).

    Regards,

    Anil.

  • Hi Anil,

    Thank you for your kind supports.

    1. Generate the code for PSRAM using SysConfig
    2. Copy the generated code into a new file to create a separate NOR driver, then remove the PSRAM configuration from SysConfig

    I understood. I'll try extracting just the GPMC settings from "ti_drivers_config.c" generated by .syscfg and customizing them for NOR.

    3. Set the device type to NOR memory (GPMC_DEVICETYPE_NORLIKE), Mode either it is synchronous or Asynch and Timing parameters .

    Just to be sure, is "GPMC_MEM_TYPE_NORLIKE" an explicit definition for users?
    In "gpmc.h", PSRAM and NORLIKE are treated the same.
    I understand that changing it to "GPMC_MEM_TYPE_NORLIKE" will not change the APIs and variables referenced by the software.

    #define GPMC_MEM_TYPE_NAND                           (0)
    #define GPMC_MEM_TYPE_PSRAM                          (1)
    #define GPMC_MEM_TYPE_NORLIKE                        (1)    //Same as pSRAM
    Best regards,
    O.H
  • Hello OH,

    The device type macro is the same for both NOR and PSRAM memories (GPMC_MEM_TYPE_NORLIKE = GPMC_MEM_TYPE_PSRAM = 1).

    Therefore, if the device type is already initialized as PSRAM, there is no need to set it again for NOR memory. This step can be skipped.

    Regards,

    Anil.

  • Hello Anil,

    Sorry for late reply, and thank you for your reply. I understood.
    If I have additional questions during the implementation, I will create a new thread.

    Best regards,
    O.H