Part Number: DRA829J
Hello TI team,
I'm facing some performance issues in these ethernet ports configured via CPSW library in MCU2_0:
- ENET_MAC_PORT_5, phyAddr = 1, Tx and Rx is very poor
- ENET_MAC_PORT_6, phyAddr = 2, Tx and Rx is very poor
- ENET_MAC_PORT_8, phyAddr = 3, Tx and Rx is good, not the fastest but more stable.
This configuration is using the PSDK10, attached are the configuration parameters being used. psdk10_settings.txt
The thing is that using psdk 7 the performance is good for all the 3 ports.
The test I did was using the same HW and just changing the FW from PSDK7 to PSDK10. I first noticed different values in the Tx and RX delays but even by using the same delays the PSDK10 does not work properly. Playing a little bit with the delays I was able to reach a better performance for the ports, however, when I tested using other device I noticed some inestability, requiring manually calibration of those delays again. Looks like this delay part is not stable, I wonder If there is something new in psdk10 that should be configured to avoid these performance issues.
The 3 ports are mapped to Linux, the tests were done using iperf3 tool.
