• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 98 subscribers
  • Views 395 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3505 LPDDR Errata, suggested work around

Jimmy Fung
Intellectual 575 points
Other Parts Discussed in Thread: AM3505

Based on another thread regarding the AM3505 LPDDR errata, http://e2e.ti.com/support/dsp/sitara_arm174_microprocessors/f/416/t/162505.aspx, we have questions on the errata and the work around.

1. What are some of the identified "worst case silicon conditions"?  We have designed according to the datasheet specs and need to know how we can avoid conditions that prompted this errata advisory.  Was it temperature, power supply irregularities, position of the LPDDR relative to the AM3505 on a board, etc?

2. Work around - Is the use of the external strobe and following the guidelines in the data manual and SPRAAV0 the only things necessary to ensure there we account for all the worst case silicon conditions?  If there are other suggestions, please let us know.

We need to make sure that our boxes do not fail in the field after manufacturing and programming because they will be sitting in the outdoors in very hot conditions and for over 10 years.

  • 0
    TI__Genius 9190 points

    hello,

    Jimmy Fung said:

    1. What are some of the identified "worst case silicon conditions"?  We have designed according to the datasheet specs and need to know how we can avoid conditions that prompted this errata advisory.  Was it temperature, power supply irregularities, position of the LPDDR relative to the AM3505 on a board, etc?

    This is refering to Silicon process variations.  When we were characterizing across corner process node devices we found that it is much more robust to use external strobe with LPDDR. 

    Jimmy Fung said:

    2. Work around - Is the use of the external strobe and following the guidelines in the data manual and SPRAAV0 the only things necessary to ensure there we account for all the worst case silicon conditions?  If there are other suggestions, please let us know.

    Yes, please follow all routing guidelines and use external strobe with LPDDR.  You can also run IBIS model simulations, but it is critical to do this properly because it is easy to get incorrect results from simulations. 
     
  • 0 in reply to Jeff Culverhouse
    Intellectual 575 points

    Under what conditions does a design using internal stobe gating failures occur?  We have already completed our layout and have a working board.

  • 0 in reply to Jimmy Fung
    TI__Genius 9190 points

    Hello,

    We have seen failures at low tempatures on our test platform and design found that timing budgets indicate internal strobe does not work for all worst case conditions.  This is why we have the requirement for external strobe on LPDDR.