AM5728: AM5728 U-boot 2019 version issue with UART3

Part Number: AM5728
Other Parts Discussed in Thread: PMP

Hi,

My custom board is based on AM5728 .

Earlier i was using u-boot version 2016 and its works fine .

but now i wanted to use u-boot 2019 version, i did the same configuration as did in 2016 version but i wont able to see the debug u-boot logs on port.

image.png

I changed ChangesFile.txt in these files.

# 1. Set your 32-bit ARM environment variables
export ARCH=arm
export CROSS_COMPILE=arm-linux-gnueabihf-

# 2. Deep clean the source tree (wipes out the stuck 64-bit files)
make distclean

# 3. Load your specific Branson AM57xx board configuration
make am57xx_branson_defconfig

# 4. Compile using 4 CPU cores
make -j4
  • This is defconfig file

    CONFIG_ARM=y
    CONFIG_ARCH_OMAP2PLUS=y
    CONFIG_TI_COMMON_CMD_OPTIONS=y
    CONFIG_SYS_MALLOC_F_LEN=0x2000
    CONFIG_OMAP54XX=y
    CONFIG_TARGET_AM57XX_EVM=y
    CONFIG_DM=y
    CONFIG_DM_SERIAL=y
    CONFIG_SERIAL_PRESENT=y
    CONFIG_SYS_NS16550=y
    CONFIG_DRA7_DSPEVE_OPP_HIGH=y
    CONFIG_DRA7_IVA_OPP_HIGH=y
    CONFIG_DRA7_GPU_OPP_HIGH=y
    CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
    CONFIG_SPL=y
    CONFIG_SPL_SPI_FLASH_SUPPORT=y
    CONFIG_SPL_SPI_SUPPORT=y
    CONFIG_ARMV7_LPAE=y
    CONFIG_AHCI=y
    CONFIG_DISTRO_DEFAULTS=y
    CONFIG_NR_DRAM_BANKS=2
    CONFIG_SPL_LOAD_FIT=y
    CONFIG_OF_BOARD_SETUP=y
    CONFIG_USE_BOOTARGS=y
    CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board"
    # CONFIG_USE_BOOTCOMMAND is not set
    CONFIG_SYS_CONSOLE_INFO_QUIET=y
    # CONFIG_MISC_INIT_R is not set
    CONFIG_VERSION_VARIABLE=y
    CONFIG_BOARD_EARLY_INIT_F=y
    CONFIG_SPL_SYS_MALLOC_SIMPLE=y
    CONFIG_SPL_SEPARATE_BSS=y
    CONFIG_SPL_DMA=y
    # CONFIG_SPL_NAND_SUPPORT is not set
    CONFIG_SPL_OS_BOOT=y
    CONFIG_SPL_DM_RESET=y
    CONFIG_SPL_REMOTEPROC=y
    CONFIG_SPL_SPI_LOAD=y
    CONFIG_SPL_YMODEM_SUPPORT=y
    CONFIG_CMD_SPL=y
    # CONFIG_CMD_FLASH is not set
    # CONFIG_CMD_SETEXPR is not set
    # CONFIG_CMD_PMIC is not set
    CONFIG_OF_CONTROL=y
    CONFIG_SPL_OF_CONTROL=y
    CONFIG_DEFAULT_DEVICE_TREE="am572x-idk"
    CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am5729-beagleboneai am572x-idk am571x-idk am574x-idk"
    CONFIG_ENV_IS_IN_MMC=y
    CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
    CONFIG_DM=y
    CONFIG_SPL_DM=y
    CONFIG_SPL_DM_SEQ_ALIAS=y
    CONFIG_SPL_REGMAP=y
    CONFIG_SPL_SYSCON=y
    CONFIG_SPL_OF_TRANSLATE=y
    CONFIG_DWC_AHCI=y
    CONFIG_DFU_MMC=y
    CONFIG_DFU_RAM=y
    CONFIG_DFU_SF=y
    CONFIG_USB_FUNCTION_FASTBOOT=y
    CONFIG_FASTBOOT_BUF_ADDR=0x82000000
    CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
    CONFIG_FASTBOOT_USB_DEV=1
    CONFIG_FASTBOOT_FLASH=y
    CONFIG_FASTBOOT_FLASH_MMC_DEV=1
    CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
    CONFIG_DM_GPIO=y
    CONFIG_DM_I2C=y
    CONFIG_MISC=y
    CONFIG_FS_LOADER=y
    CONFIG_DM_MMC=y
    CONFIG_MMC_OMAP_HS=y
    CONFIG_DM_SPI_FLASH=y
    CONFIG_SPI_FLASH=y
    CONFIG_SPI_FLASH_SPANSION=y
    CONFIG_PHY_MICREL=y
    CONFIG_PHY_MICREL_KSZ90X1=y
    #CONFIG_DM_ETH=y
    CONFIG_MII=y
    CONFIG_DRIVER_TI_CPSW=y
    CONFIG_PHY=y
    CONFIG_PIPE3_PHY=y
    CONFIG_OMAP_USB2_PHY=y
    CONFIG_DM_PMIC=y
    CONFIG_PMIC_PALMAS=y
    CONFIG_DM_REGULATOR=y
    CONFIG_DM_REGULATOR_PALMAS=y
    CONFIG_REMOTEPROC_TI_IPU=y
    CONFIG_DM_RESET=y
    CONFIG_RESET_DRA7=y
    CONFIG_DM_SCSI=y
    CONFIG_DM_SERIAL=y
    CONFIG_SPI=y
    CONFIG_DM_SPI=y
    CONFIG_TI_QSPI=y
    CONFIG_USB=y
    CONFIG_DM_USB=y
    CONFIG_DM_USB_GADGET=y
    CONFIG_SPL_DM_USB_GADGET=y
    CONFIG_USB_XHCI_HCD=y
    CONFIG_USB_XHCI_DWC3=y
    CONFIG_USB_DWC3=y
    CONFIG_USB_DWC3_GADGET=y
    CONFIG_USB_DWC3_GENERIC=y
    CONFIG_USB_GADGET=y
    CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
    CONFIG_USB_GADGET_VENDOR_NUM=0x0451
    CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
    CONFIG_CLK=y
    CONFIG_CLK_CDCE9XX=y

  • Hi Hanmant,

    Can you please check if you are using proper UART port in custom board according to 2019 u-boot version?

    Regards,

    Anil

  • Hi Anil,

    Thank you for responding.

    What do you mean by Uart Port?

    Where to check that 

    I already using 2016 version that works fine on my custom board.

    //in Mux.h file

    const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = {

     {GPMC_A0, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a0.vin4b_d0 */

     {GPMC_A1, (M6 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */

     {GPMC_A2, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a2.vin4b_d2 */

     {GPMC_A3, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a3.vin4b_d3 */

     {GPMC_A4, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a4.vin4b_d4 */

     {GPMC_A5, (M6 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a5.vin4b_d5 */

     {GPMC_A6, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a6.vin4b_d6 */

     {GPMC_A7, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a7.vin4b_d7 */

     {GPMC_A8, (M6 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a8.vin4b_hsync1 */

     {GPMC_A9, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a9.vin4b_vsync1 */

     {GPMC_A10, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a10.vin4b_clk1 */

     {GPMC_A11, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a11.vin4b_de1 */

     {GPMC_A12, (M6 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a12.vin4b_fld1 */

     {GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */

     {GPMC_A14, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */

     {GPMC_A15, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */

     {GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */

     {GPMC_A17, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */

     {GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */

     {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */

     {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */

     {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */

     {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */

     {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */

     {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */

     {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */

     {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */

     {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */

     {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */

     {GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */

     {VIN1A_D5, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d5.gpio3_9 */

     {VIN1A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d6.gpio3_10 */

     {VIN1A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d7.gpio3_11 */

     {VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d8.gpio3_12 */

     {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */

     {VIN1A_D12, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d12.gpio3_16 */

     {VIN1A_D13, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d13.gpio3_17 */

     {VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d14.gpio3_18 */

     {VIN1A_D15, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d15.gpio3_19 */

     {VIN1A_D17, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d17.gpio3_21 */

     {VIN1A_D18, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d18.gpio3_22 */

     {VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d19.gpio3_23 */

     {VIN1A_D22, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d22.gpio3_26 */

     {VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_clk0.gpio3_28 */

     {VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_de0.gpio3_29 */

     {VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_fld0.gpio3_30 */

     {VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.gpio3_31 */

     {VIN2A_VSYNC0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_vsync0.gpio4_0 */

     {VIN2A_D0, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d0.pr1_uart0_rxd */

     {VIN2A_D1, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d1.pr1_uart0_txd */

     {VIN2A_D2, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d2.ecap1 */

     {VIN2A_D3, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.gpio4_4 */

     {VIN2A_D4, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d4.gpio4_5 */

     {VIN2A_D5, (M13 | PIN_INPUT_PULLDOWN)}, /* vin2a_d5.pr1_pru1_gpo2 */

     {VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.pr1_mii_mt1_clk */

     {VIN2A_D7, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.pr1_mii_mii1_txen */

     {VIN2A_D8, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.pr1_mii_mii1_txd3 */

     {VIN2A_D9, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.pr1_mii_mii1_txd2 */

     {VIN2A_D10, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */

     {VIN2A_D11, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d11.pr1_mdio_data */

     {VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */

     {VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */

     {VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */

     {VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */

     {VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */

     {VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */

     {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */

     {VIN2A_D19, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */

     {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */

     {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */

     {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */

     {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */

     {VOUT1_CLK, (M0 | PIN_OUTPUT)}, /* vout1_clk.vout1_clk */

     {VOUT1_DE, (M0 | PIN_OUTPUT)}, /* vout1_de.vout1_de */

     {VOUT1_FLD, (M14 | PIN_INPUT)}, /* vout1_fld.gpio4_21 */

     {VOUT1_HSYNC, (M0 | PIN_OUTPUT)}, /* vout1_hsync.vout1_hsync */

     {VOUT1_VSYNC, (M0 | PIN_OUTPUT)}, /* vout1_vsync.vout1_vsync */

     {VOUT1_D0, (M0 | PIN_OUTPUT)}, /* vout1_d0.vout1_d0 */

     {VOUT1_D1, (M0 | PIN_OUTPUT)}, /* vout1_d1.vout1_d1 */

     {VOUT1_D2, (M0 | PIN_OUTPUT)}, /* vout1_d2.vout1_d2 */

     {VOUT1_D3, (M0 | PIN_OUTPUT)}, /* vout1_d3.vout1_d3 */

     {VOUT1_D4, (M0 | PIN_OUTPUT)}, /* vout1_d4.vout1_d4 */

     {VOUT1_D5, (M0 | PIN_OUTPUT)}, /* vout1_d5.vout1_d5 */

     {VOUT1_D6, (M0 | PIN_OUTPUT)}, /* vout1_d6.vout1_d6 */

     {VOUT1_D7, (M0 | PIN_OUTPUT)}, /* vout1_d7.vout1_d7 */

     {VOUT1_D8, (M0 | PIN_OUTPUT)}, /* vout1_d8.vout1_d8 */

     {VOUT1_D9, (M0 | PIN_OUTPUT)}, /* vout1_d9.vout1_d9 */

     {VOUT1_D10, (M0 | PIN_OUTPUT)}, /* vout1_d10.vout1_d10 */

     {VOUT1_D11, (M0 | PIN_OUTPUT)}, /* vout1_d11.vout1_d11 */

     {VOUT1_D12, (M0 | PIN_OUTPUT)}, /* vout1_d12.vout1_d12 */

     {VOUT1_D13, (M0 | PIN_OUTPUT)}, /* vout1_d13.vout1_d13 */

     {VOUT1_D14, (M0 | PIN_OUTPUT)}, /* vout1_d14.vout1_d14 */

     {VOUT1_D15, (M0 | PIN_OUTPUT)}, /* vout1_d15.vout1_d15 */

     {VOUT1_D16, (M0 | PIN_OUTPUT)}, /* vout1_d16.vout1_d16 */

     {VOUT1_D17, (M0 | PIN_OUTPUT)}, /* vout1_d17.vout1_d17 */

     {VOUT1_D18, (M0 | PIN_OUTPUT)}, /* vout1_d18.vout1_d18 */

     {VOUT1_D19, (M0 | PIN_OUTPUT)}, /* vout1_d19.vout1_d19 */

     {VOUT1_D20, (M0 | PIN_OUTPUT)}, /* vout1_d20.vout1_d20 */

     {VOUT1_D21, (M0 | PIN_OUTPUT)}, /* vout1_d21.vout1_d21 */

     {VOUT1_D22, (M0 | PIN_OUTPUT)}, /* vout1_d22.vout1_d22 */

     {VOUT1_D23, (M0 | PIN_OUTPUT)}, /* vout1_d23.vout1_d23 */

     {MDIO_MCLK, (M0 | PIN_INPUT_PULLUP)}, /* mdio_mclk.mdio_mclk */

     {MDIO_D, (M0 | PIN_INPUT_PULLUP)}, /* mdio_d.mdio_d */

     {RMII_MHZ_50_CLK, (M13 | PIN_INPUT_PULLDOWN)}, /* RMII_MHZ_50_CLK.pr2_pru1_gpo2 */

     {UART3_RXD, (M11 | PIN_INPUT_PULLDOWN)}, /* uart3_rxd.pr1_mii0_rxdv */

     {UART3_TXD, (M11 | PIN_INPUT_PULLDOWN)}, /* uart3_txd.rp1_mii_mr0_clk */

     {RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */

     {RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */

     {RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */

     {RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */

     {RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */

     {RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */

     {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */

     {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */

     {RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */

     {RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */

     {RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */

     {RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */

     {USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb1_drvvbus.usb1_drvvbus */

     {USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)}, /* usb2_drvvbus.usb2_drvvbus */

     {GPIO6_14, (M14 | PIN_OUTPUT_PULLUP)}, /* gpio6_14.gpio6_14 */

     {GPIO6_15, (M0 | PIN_OUTPUT_PULLUP)}, /* gpio6_15.gpio6_15 */

     {GPIO6_16, (M0 | PIN_INPUT_PULLDOWN)}, /* gpio6_16.gpio6)_16 */

     {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */

     {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */

     {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.i6_19 */

     {XREF_CLK3, (M9 | PIN_INPUT_PULLDOWN)}, /* xref_clk3.clkout3 */

     {MCASP1_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */

     {MCASP1_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_fsx.pr2_mdio_data */

     {MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.gpio5_0 */

     {MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.gpio5_1 */

     {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */

     {MCASP1_AXR1, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr1.pr2_mii_mt0_clk */

     {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */

     {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */

     {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */

     {MCASP1_AXR5, (M14 | PIN_OUTPUT_PULLUP)}, /* mcasp1_axr5.gpio5_7 */

     {MCASP1_AXR6, (M14 | PIN_OUTPUT_PULLUP)}, /* mcasp1_axr6.gpio5_8 */

     {MCASP1_AXR7, (M14 | PIN_OUTPUT_PULLUP)}, /* mcasp1_axr7.gpio5_9 */

     {MCASP1_AXR8, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr8.pr2_mii0_txen */

     {MCASP1_AXR9, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr9.pr2_mii0_txd3 */

     {MCASP1_AXR10, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr10.pr2_mii0_txd2 */

     {MCASP1_AXR11, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr11.pr2_mii0_txd1 */

     {MCASP1_AXR12, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr12.pr2_mii0_txd0 */

     {MCASP1_AXR13, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr13.pr2_mii_mr0_clk */

     {MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp1_axr14.pr2_mii0_rxdv */

     {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */

     {MCASP2_ACLKX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */

     {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */

     {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */

     {MCASP2_AXR3, (M11 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* mcasp2_axr3.pr2_mii0_rxlink */

     {MCASP2_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr4.gpio1_4 */

     {MCASP2_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr5.gpio6_7 */

     {MCASP2_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr6.gpio2_29 */

     {MCASP2_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp2_axr7.gpio1_5 */

     {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */

     {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */

     {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */

     {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */

     {MCASP4_ACLKX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_aclkx.spi3_sclk */

     {MCASP4_FSX, (M2 | PIN_INPUT_PULLDOWN)}, /* mcasp4_fsx.spi3_d1 */

     {MCASP4_AXR1, (M2 | PIN_INPUT_PULLUP)}, /* mcasp4_axr1.spi3_cs0 */

     {MCASP5_ACLKX, (M13 | PIN_INPUT_PULLDOWN)}, /* mcasp5_aclkx.pr2_pru1_gpo1 */

     {MCASP5_FSX, (M12 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},/* mcasp5_fsx.pr2_pru1_gpi2 */

     {MCASP5_AXR0, (M13 | PIN_INPUT_PULLDOWN)}, /* mcasp5_axr0.pr2_pru1_gpo3 */

     {MCASP5_AXR1, (M13 | PIN_INPUT_PULLDOWN)}, /* mcasp5_axr1.pr2_pru1_gpo4 */

     {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */

     {GPIO6_11, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */

     {MMC3_CLK, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */

     {MMC3_CMD, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */

     {MMC3_DAT0, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */

     {MMC3_DAT1, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */

     {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */

     {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */

     {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */

     {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */

     {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */

     {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */

     {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */

     {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */

     {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */

     {SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */

     {SPI1_CS1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs1.gpio7_11 */

     {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */

     {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */

     {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */

     {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */

     {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */

     {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */

     {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)}, /* mmc1_sdcd.gpio6_27 */

     {MMC1_SDWP, (M14 | PIN_OUTPUT)}, /* mmc1_sdwp.gpio6_28 */

     {SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_cs2.gpio7_12 */

     {SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */

     {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */

     {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */

     {UART3_RXD, (M0 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */

     {UART3_TXD, (M0 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */

     {UART1_RXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart1_rxd.gpio7_22 */

     {UART1_TXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart3_txd.gpio7_23 */

     {I2C2_SDA, (M1 | PIN_INPUT)}, /* i2c2_sda.hdmi1_ddc_scl */

     {I2C2_SCL, (M1 | PIN_INPUT)}, /* i2c2_scl.hdmi1_ddc_sda */

     {ON_OFF, (M1 | PIN_OUTPUT_PULLUP)}, /* on_off.on_off */

     {RTC_PORZ, (M0 | PIN_OUTPUT_PULLDOWN)}, /* rtc_porz.rtc_porz */

     {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */

     {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */

     {TDO, (M0 | PIN_INPUT_PULLUP)}, /* tdo.tdo */

     {TCLK, (M0 | PIN_INPUT_PULLUP)}, /* tclk.tclk */

     {TRSTN, (M0 | PIN_INPUT_PULLDOWN)}, /* trstn.trstn */

     {RTCK, (M0 | PIN_INPUT)}, /* rtck.rtck */

     {EMU0, (M0 | PIN_INPUT_PULLUP)}, /* emu0.emu0 */

     {EMU1, (M0 | PIN_INPUT_PULLUP)}, /* emu1.emu1 */

     {RESETN, (M0 | PIN_OUTPUT_PULLUP)}, /* resetn.resetn */

     {RSTOUTN, (M0 | PIN_OUTPUT_PULLDOWN)}, /* rstoutn.rstoutn */

    };

    //in am57xx-idk-common.dtsi file

    &dra7_pmx_core {

     dcan1_pins_default: dcan1_pins_default {

      pinctrl-single,pins = <

       DRA7XX_CORE_IOPAD(0x364C, PIN_OUTPUT_PULLUP | MUX_MODE1) /* dcan1_tx */

       DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_PULLUP | MUX_MODE1) /* dcan1_rx */

      >;

     };

     dcan1_pins_sleep: dcan1_pins_sleep {

      pinctrl-single,pins = <

       DRA7XX_CORE_IOPAD(0x364C, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */

       DRA7XX_CORE_IOPAD(0x3648, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */

      >;

     };

    };

    &uart3 {

     status = "okay";

     interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH

              &dra7_pmx_core 0x248>;

    };

    Check this configuration.

    Can you tell me what is wrong in this .

    Can you please suggest me where to change in uboot source code

  •   any update on this.

  • Hi Hanmant,

    Uart port means, in new 2019 u-boot version, we need to check whether we are configuring the UART3_txd and UART3_rxd pins for console log.

    Can you please compare the files you shared with the older version(2016 u-boot source file)

    am57xx-idk-common.dtsi,  Mux.h ?

    Regards,

    Anil

  •  ,

    am57xx-idk-common.dtsi,  Mux.h 

    Please check shared configuration. Those pin configuration same as what i used in 2016 u-boot version.

    Can please these configuration is correct or not

    &dra7_pmx_core {
    u-boot,dm-pre-reloc; /* ← THIS is what's missing */

    uart3_pins_default: uart3_pins_default {
    u-boot,dm-pre-reloc; /* ← AND THIS */
    pinctrl-single,pins =
    DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT | MUX_MODE0) /* uart3_rxd */
    DRA7XX_CORE_IOPAD(0x364c, PIN_OUTPUT | MUX_MODE0) /* uart3_txd */
    >;
    };
    };

    &uart3 {
    status = "okay";
    u-boot,dm-pre-reloc;
    pinctrl-names = "default";
    pinctrl-0 = <&uart3_pins_default>;
    interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
    &dra7_pmx_core 0x248>;
    };

    and mux.h 

    {UART3_RXD, (M0 | PIN_INPUT)}, 
    {UART3_TXD, (M0 | PIN_OUTPUT)}, 

    Can you confirm from your side is this correct? also what else i need to check

  •  

    waiting for your ans.

    Thanks

  • Hi Hanmant,

    Can you please include this in early_padconf structure in the mux_data.h file, rebuild and test.

    {UART3_RXD, (PIN_INPUT_SLEW | M0)}, /* UART3_RXD */
    {UART3_TXD, (PIN_INPUT_SLEW | M0)}, /* UART3_TXD */

    Note: 

    I see in the schematics of AM572x_IDK : 

    UART3_Txd : Y1

    UART3_Rxd: V2 

    Which is correct. But as I don't have the exact schematics you shared, Not able to see SN74LVC device.

    Can you please share me the schematics that you are using.

    Regards,

    Anil

  • Hi  ,

    same early_padconf  im using but there is no debug logs.

    UART3_Txd : Y1

    UART3_Rxd: V2  correct im using these balls.

    apart from this do i need to change anywhere ?

  • dcan1_pins_sleep: dcan1_pins_sleep {

      pinctrl-single,pins = <

       DRA7XX_CORE_IOPAD(0x364C, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */

       DRA7XX_CORE_IOPAD(0x3648, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */

      >;

    and we should not use MODE15 for 

    UART_Txd and UART_Rxd pins.

    If there is no change in the "am57xx-idk-common.dtsi" and "Mux.h" the older version and newer version, It should work. 

    Regards,

    Anil

  • Hi  ,

    Check these files,

    CONFIG_ARM=y
    CONFIG_OMAP54XX=y
    CONFIG_TARGET_AM57XX_EVM=y
    CONFIG_DM_SERIAL=y
    CONFIG_DM_GPIO=y
    CONFIG_SPL_STACK_R_ADDR=0x82000000
    CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15"
    CONFIG_SPL=y
    CONFIG_SPL_STACK_R=y
    CONFIG_HUSH_PARSER=y
    CONFIG_CMD_BOOTZ=y
    # CONFIG_CMD_IMLS is not set
    CONFIG_CMD_ASKENV=y
    # CONFIG_CMD_FLASH is not set
    CONFIG_CMD_MMC=y
    CONFIG_CMD_SPI=y
    CONFIG_CMD_I2C=y
    CONFIG_CMD_USB=y
    CONFIG_CMD_GPIO=y
    # CONFIG_CMD_SETEXPR is not set
    CONFIG_CMD_DHCP=y
    CONFIG_CMD_MII=y
    CONFIG_CMD_PING=y
    CONFIG_CMD_EXT2=y
    CONFIG_CMD_EXT4=y
    CONFIG_CMD_EXT4_WRITE=y
    CONFIG_CMD_FAT=y
    CONFIG_CMD_FS_GENERIC=y
    CONFIG_OF_CONTROL=y
    CONFIG_DM=y
    CONFIG_DM_MMC=y
    CONFIG_SPI_FLASH=y
    CONFIG_SPI_FLASH_BAR=y
    CONFIG_SYS_NS16550=y
    CONFIG_FIT=y
    CONFIG_SPL_OF_LIBFDT=y
    CONFIG_SPL_LOAD_FIT=y
    CONFIG_OF_LIST="am57xx-beagle-x15 am572x-idk am571x-idk"
    CONFIG_OF_BOARD_SETUP=y
    CONFIG_DRA7_DSPEVE_OPP_HIGH=y
    CONFIG_DRA7_IVA_OPP_HIGH=y
    CONFIG_DRA7_GPU_OPP_HIGH=y
    CONFIG_DISK=y
    CONFIG_DWC_AHCI=y
    #CONFIG_DM_ETH=y
    CONFIG_CMD_TIME=y
    CONFIG_DM_I2C=y
    CONFIG_DM_SPI=y
    CONFIG_DM_SPI_FLASH=y
    CONFIG_SPI_FLASH_SPANSION=y
    CONFIG_TI_QSPI=y
    CONFIG_CMD_SF=y
    
    CONFIG_ARM=y
    CONFIG_ARCH_OMAP2PLUS=y
    CONFIG_TI_COMMON_CMD_OPTIONS=y
    CONFIG_SYS_MALLOC_F_LEN=0x2000
    CONFIG_OMAP54XX=y
    CONFIG_TARGET_AM57XX_EVM=y
    CONFIG_DRA7_DSPEVE_OPP_HIGH=y
    CONFIG_DRA7_IVA_OPP_HIGH=y
    CONFIG_DRA7_GPU_OPP_HIGH=y
    CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
    CONFIG_SPL=y
    CONFIG_SPL_SPI_FLASH_SUPPORT=y
    CONFIG_SPL_SPI_SUPPORT=y
    CONFIG_ARMV7_LPAE=y
    CONFIG_AHCI=y
    CONFIG_DISTRO_DEFAULTS=y
    CONFIG_NR_DRAM_BANKS=2
    CONFIG_SPL_LOAD_FIT=y
    CONFIG_OF_BOARD_SETUP=y
    CONFIG_USE_BOOTARGS=y
    CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board"
    # CONFIG_USE_BOOTCOMMAND is not set
    CONFIG_SYS_CONSOLE_INFO_QUIET=y
    # CONFIG_MISC_INIT_R is not set
    CONFIG_VERSION_VARIABLE=y
    CONFIG_BOARD_EARLY_INIT_F=y
    CONFIG_SPL_SYS_MALLOC_SIMPLE=y
    CONFIG_SPL_SEPARATE_BSS=y
    CONFIG_SPL_DMA=y
    # CONFIG_SPL_NAND_SUPPORT is not set
    CONFIG_SPL_OS_BOOT=y
    CONFIG_SPL_DM_RESET=y
    CONFIG_SPL_REMOTEPROC=y
    CONFIG_SPL_SPI_LOAD=y
    CONFIG_SPL_YMODEM_SUPPORT=y
    CONFIG_CMD_SPL=y
    # CONFIG_CMD_FLASH is not set
    # CONFIG_CMD_SETEXPR is not set
    # CONFIG_CMD_PMIC is not set
    CONFIG_OF_CONTROL=y
    CONFIG_SPL_OF_CONTROL=y
    CONFIG_DEFAULT_DEVICE_TREE="am572x-idk"
    CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am5729-beagleboneai am572x-idk am571x-idk am574x-idk"
    CONFIG_ENV_IS_IN_MMC=y
    CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
    CONFIG_DM=y
    CONFIG_SPL_DM=y
    CONFIG_SPL_DM_SEQ_ALIAS=y
    CONFIG_SPL_REGMAP=y
    CONFIG_SPL_SYSCON=y
    CONFIG_SPL_OF_TRANSLATE=y
    CONFIG_DWC_AHCI=y
    CONFIG_DFU_MMC=y
    CONFIG_DFU_RAM=y
    CONFIG_DFU_SF=y
    CONFIG_USB_FUNCTION_FASTBOOT=y
    CONFIG_FASTBOOT_BUF_ADDR=0x82000000
    CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
    CONFIG_FASTBOOT_USB_DEV=1
    CONFIG_FASTBOOT_FLASH=y
    CONFIG_FASTBOOT_FLASH_MMC_DEV=1
    CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
    CONFIG_DM_GPIO=y
    CONFIG_DM_I2C=y
    CONFIG_MISC=y
    CONFIG_FS_LOADER=y
    CONFIG_DM_MMC=y
    CONFIG_MMC_OMAP_HS=y
    CONFIG_DM_SPI_FLASH=y
    CONFIG_SPI_FLASH=y
    CONFIG_SPI_FLASH_SPANSION=y
    CONFIG_PHY_MICREL=y
    CONFIG_PHY_MICREL_KSZ90X1=y
    CONFIG_DM_ETH=y
    CONFIG_MII=y
    CONFIG_DRIVER_TI_CPSW=y
    CONFIG_PHY=y
    CONFIG_PIPE3_PHY=y
    CONFIG_OMAP_USB2_PHY=y
    CONFIG_DM_PMIC=y
    CONFIG_PMIC_PALMAS=y
    CONFIG_DM_REGULATOR=y
    CONFIG_DM_REGULATOR_PALMAS=y
    CONFIG_REMOTEPROC_TI_IPU=y
    CONFIG_DM_RESET=y
    CONFIG_RESET_DRA7=y
    CONFIG_DM_SCSI=y
    CONFIG_DM_SERIAL=y
    CONFIG_SPI=y
    CONFIG_DM_SPI=y
    CONFIG_TI_QSPI=y
    CONFIG_USB=y
    CONFIG_DM_USB=y
    CONFIG_DM_USB_GADGET=y
    CONFIG_SPL_DM_USB_GADGET=y
    CONFIG_USB_XHCI_HCD=y
    CONFIG_USB_XHCI_DWC3=y
    CONFIG_USB_DWC3=y
    CONFIG_USB_DWC3_GADGET=y
    CONFIG_USB_DWC3_GENERIC=y
    CONFIG_USB_GADGET=y
    CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
    CONFIG_USB_GADGET_VENDOR_NUM=0x0451
    CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
    CONFIG_CLK=y
    CONFIG_CLK_CDCE9XX=y
    
    /*
     * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    
    #include "am57xx-industrial-grade.dtsi"
    
    / {
    	aliases {
    		serial0 = &uart1;
    		serial1 = &uart2;
    		serial2 = &uart3;
    		rtc0 = &tps659038_rtc;
    		rtc1 = &rtc;
    	};
    
    	chosen {
    		stdout-path = &uart3;
    	};
    
    	vmain: fixedregulator-vmain {
    		compatible = "regulator-fixed";
    		regulator-name = "VMAIN";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	v3_3d: fixedregulator-v3_3d {
    		compatible = "regulator-fixed";
    		regulator-name = "V3_3D";
    		vin-supply = <&smps9_reg>;
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vtt_fixed: fixedregulator-vtt {
    		/* TPS51200 */
    		compatible = "regulator-fixed";
    		regulator-name = "vtt_fixed";
    		vin-supply = <&v3_3d>;
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	leds-iio {
    		status = "disabled";
    		compatible = "gpio-leds";
    		led-out0 {
    			label = "out0";
    			gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-out1 {
    			label = "out1";
    			gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-out2 {
    			label = "out2";
    			gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-out3 {
    			label = "out3";
    			gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-out4 {
    			label = "out4";
    			gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-out5 {
    			label = "out5";
    			gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-out6 {
    			label = "out6";
    			gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    
    		led-out7 {
    			label = "out7";
    			gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
    			default-state = "off";
    		};
    	};
    };
    &dra7_pmx_core {
    		uart3_pins_default: uart3_pins_default {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0)	/* uart3_rxd */
    			DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0)	/* uart3_txd */
    		>;
    	};
    };
    
    &uart3 {
    	status = "okay";
    	interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
    			      <&dra7_pmx_core 0x248>;
    
    	pinctrl-names = "default";
    	pinctrl-0 = <&uart3_pins_default>;
    };
    
    &i2c1 {
    	status = "okay";
    	clock-frequency = <400000>;
    
    	tps659038: tps659038@58 {
    		compatible = "ti,tps659038";
    		reg = <0x58>;
    		interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
    			       &dra7_pmx_core 0x418>;
    		#interrupt-cells = <2>;
    		interrupt-controller;
    		ti,system-power-controller;
    		ti,palmas-override-powerhold;
    
    		tps659038_pmic {
    			compatible = "ti,tps659038-pmic";
    
    			smps12-in-supply = <&vmain>;
    			smps3-in-supply = <&vmain>;
    			smps45-in-supply = <&vmain>;
    			smps6-in-supply = <&vmain>;
    			smps7-in-supply = <&vmain>;
    			smps8-in-supply = <&vmain>;
    			smps9-in-supply = <&vmain>;
    			ldo1-in-supply = <&vmain>;
    			ldo2-in-supply = <&vmain>;
    			ldo3-in-supply = <&vmain>;
    			ldo4-in-supply = <&vmain>;
    			ldo9-in-supply = <&vmain>;
    			ldoln-in-supply = <&vmain>;
    			ldousb-in-supply = <&vmain>;
    			ldortc-in-supply = <&vmain>;
    
    			regulators {
    				smps12_reg: smps12 {
    					/* VDD_MPU */
    					regulator-name = "smps12";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps3_reg: smps3 {
    					/* VDD_DDR EMIF1 EMIF2 */
    					regulator-name = "smps3";
    					regulator-min-microvolt = <1350000>;
    					regulator-max-microvolt = <1350000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps45_reg: smps45 {
    					/* VDD_DSPEVE on AM572 */
    					/* VDD_IVA + VDD_DSP on AM571 */
    					regulator-name = "smps45";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps6_reg: smps6 {
    					/* VDD_GPU */
    					regulator-name = "smps6";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps7_reg: smps7 {
    					/* VDD_CORE */
    					regulator-name = "smps7";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1150000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps8_reg: smps8 {
    					/* 5728 - VDD_IVAHD */
    					/* 5718 - N.C. test point */
    					regulator-name = "smps8";
    				};
    
    				smps9_reg: smps9 {
    					/* VDD_3_3D */
    					regulator-name = "smps9";
    					regulator-min-microvolt = <3300000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo1_reg: ldo1 {
    					/* VDDSHV8 - VSDMMC  */
    					/* NOTE: on rev 1.3a, data supply */
    					regulator-name = "ldo1";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-boot-on;
    					regulator-always-on;
    				};
    
    				ldo2_reg: ldo2 {
    					/* VDDSH18V */
    					regulator-name = "ldo2";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo3_reg: ldo3 {
    					/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
    					regulator-name = "ldo3";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo4_reg: ldo4 {
    					/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
    					regulator-name = "ldo4";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				/* LDO5-8 unused */
    
    				ldo9_reg: ldo9 {
    					/* VDD_RTC  */
    					regulator-name = "ldo9";
    					regulator-min-microvolt = <840000>;
    					regulator-max-microvolt = <1160000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldoln_reg: ldoln {
    					/* VDDA_1V8_PLL */
    					regulator-name = "ldoln";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldousb_reg: ldousb {
    					/* VDDA_3V_USB: VDDA_USBHS33 */
    					regulator-name = "ldousb";
    					regulator-min-microvolt = <3300000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldortc_reg: ldortc {
    					/* VDDA_RTC  */
    					regulator-name = "ldortc";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				regen1: regen1 {
    					/* VDD_3V3_ON */
    					regulator-name = "regen1";
    					regulator-boot-on;
    					regulator-always-on;
    				};
    
    				regen2: regen2 {
    					/* Needed for PMIC internal resource */
    					regulator-name = "regen2";
    					regulator-boot-on;
    					regulator-always-on;
    				};
    			};
    		};
    
    		tps659038_rtc: tps659038_rtc {
    			compatible = "ti,palmas-rtc";
    			interrupt-parent = <&tps659038>;
    			interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
    			wakeup-source;
    		};
    
    		tps659038_pwr_button: tps659038_pwr_button {
    			compatible = "ti,palmas-pwrbutton";
    			interrupt-parent = <&tps659038>;
    			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
    			wakeup-source;
    			ti,palmas-long-press-seconds = <12>;
    		};
    
    		tps659038_gpio: tps659038_gpio {
    			compatible = "ti,palmas-gpio";
    			gpio-controller;
    			#gpio-cells = <2>;
    		};
    
    		extcon_usb2: tps659038_usb {
    			compatible = "ti,palmas-usb-vid";
    			ti,enable-vbus-detection;
    			ti,enable-id-detection;
    			/* ID & VBUS GPIOs provided in board dts */
    		};
    	};
    
    	tpic2810: tpic2810@60 {
    		compatible = "ti,tpic2810";
    		reg = <0x60>;
    		gpio-controller;
    		#gpio-cells = <2>;
    	};
    };
    
    &mcspi3 {
    	status = "okay";
    	ti,pindir-d0-out-d1-in;
    
    	sn65hvs882: sn65hvs882@0 {
    		compatible = "pisosr-gpio";
    		gpio-controller;
    		#gpio-cells = <2>;
    
    		reg = <0>;
    		spi-max-frequency = <1000000>;
    		spi-cpol;
    	};
    };
    
    
    
    &rtc {
    	status = "okay";
    	ext-clk-src;
    };
    
    &mac {
    	status = "okay";
    	dual_emac;
    };
    
    &cpsw_emac0 {
    	phy_id = <&davinci_mdio>, <0>;
    	phy-mode = "rgmii";
    	dual_emac_res_vlan = <1>;
    };
    
    &cpsw_emac1 {
    	phy_id = <&davinci_mdio>, <1>;
    	phy-mode = "rgmii";
    	dual_emac_res_vlan = <2>;
    };
    
    &usb2_phy1 {
    	phy-supply = <&ldousb_reg>;
    };
    
    &usb2_phy2 {
    	phy-supply = <&ldousb_reg>;
    };
    
    &usb1 {
    	dr_mode = "host";
    };
    
    &usb2 {
    	dr_mode = "peripheral";
    };
    
    &mmc1 {
    	status = "okay";
    	vmmc-supply = <&v3_3d>;
    	vqmmc-supply = <&ldo1_reg>;
    	bus-width = <4>;
    	cd-gpios = <&gpio6 27 GPIO_ACTIVE_HIGH>; /* gpio 219 */
    	no-1-8-v;
    };
    
    &mmc2 {
    	status = "okay";
    	vmmc-supply = <&v3_3d>;
    	bus-width = <8>;
    	ti,non-removable;
    	max-frequency = <96000000>;
    	no-1-8-v;
    	/delete-property/ mmc-hs200-1_8v;
    };
    
    
    
    &qspi {
    	status = "okay";
    
    	spi-max-frequency = <76800000>;
    	m25p80@0 {
    		compatible = "s25fl256s1", "jedec,spi-nor";
    		spi-max-frequency = <76800000>;
    		reg = <0>;
    		spi-tx-bus-width = <1>;
    		spi-rx-bus-width = <4>;
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		/* MTD partition table.
    		 * The ROM checks the first four physical blocks
    		 * for a valid file to boot and the flash here is
    		 * 64KiB block size.
    		 */
    		partition@0 {
    			label = "QSPI.SPL";
    			reg = <0x00000000 0x000040000>;
    		};
    		partition@1 {
    			label = "QSPI.u-boot";
    			reg = <0x00040000 0x00100000>;
    		};
    		partition@2 {
    			label = "QSPI.u-boot-spl-os";
    			reg = <0x00140000 0x00080000>;
    		};
    		partition@3 {
    			label = "QSPI.u-boot-env";
    			reg = <0x001c0000 0x00010000>;
    		};
    		partition@4 {
    			label = "QSPI.u-boot-env.backup1";
    			reg = <0x001d0000 0x0010000>;
    		};
    		partition@5 {
    			label = "QSPI.kernel";
    			reg = <0x001e0000 0x0800000>;
    		};
    		partition@6 {
    			label = "QSPI.file-system";
    			reg = <0x009e0000 0x01620000>;
    		};
    	};
    };
    

  • and also we need to remove the following lines from core_padconf_array_essential_am572x_idk[] structure in Mux.h file

    {UART3_RXD, (M11 | PIN_INPUT_PULLDOWN)}, /* uart3_rxd.pr1_mii0_rxdv */

     {UART3_TXD, (M11 | PIN_INPUT_PULLDOWN)}, /* uart3_txd.rp1_mii_mr0_clk */

    Regards,

    Anil

  • checked after removing these lines as still there is no output.

  • can you please share me the 2016 .dtsi file.

  • /*
     * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    
    / {
    	aliases {
    		rtc0 = &tps659038_rtc;
    		rtc1 = &rtc;
    	};
    
    	vmain: fixedregulator-vmain {
    		compatible = "regulator-fixed";
    		regulator-name = "VMAIN";
    		regulator-min-microvolt = <5000000>;
    		regulator-max-microvolt = <5000000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	v3_3d: fixedregulator-v3_3d {
    		compatible = "regulator-fixed";
    		regulator-name = "V3_3D";
    		vin-supply = <&smps9_reg>;
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    
    	vtt_fixed: fixedregulator-vtt {
    		/* TPS51200 */
    		compatible = "regulator-fixed";
    		regulator-name = "vtt_fixed";
    		vin-supply = <&v3_3d>;
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    	};
    };
    
    &i2c1 {
    	status = "okay";
    	clock-frequency = <400000>;
    
    	tps659038: tps659038@58 {
    		compatible = "ti,tps659038";
    		reg = <0x58>;
    		interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
    			       &dra7_pmx_core 0x418>;
    		#interrupt-cells = <2>;
    		interrupt-controller;
    		ti,system-power-controller;
    
    		tps659038_pmic {
    			compatible = "ti,tps659038-pmic";
    			regulators {
    				smps12_reg: smps12 {
    					/* VDD_MPU */
    					vin-supply = <&vmain>;
    					regulator-name = "smps12";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps3_reg: smps3 {
    					/* VDD_DDR EMIF1 EMIF2 */
    					vin-supply = <&vmain>;
    					regulator-name = "smps3";
    					regulator-min-microvolt = <1350000>;
    					regulator-max-microvolt = <1350000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps45_reg: smps45 {
    					/* VDD_DSPEVE on AM572 */
    					/* VDD_IVA + VDD_DSP on AM571 */
    					vin-supply = <&vmain>;
    					regulator-name = "smps45";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps6_reg: smps6 {
    					/* VDD_GPU */
    					vin-supply = <&vmain>;
    					regulator-name = "smps6";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps7_reg: smps7 {
    					/* VDD_CORE */
    					vin-supply = <&vmain>;
    					regulator-name = "smps7";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1150000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps8_reg: smps8 {
    					/* 5728 - VDD_IVAHD */
    					/* 5718 - N.C. test point */
    					vin-supply = <&vmain>;
    					regulator-name = "smps8";
    				};
    
    				smps9_reg: smps9 {
    					/* VDD_3_3D */
    					vin-supply = <&vmain>;
    					regulator-name = "smps9";
    					regulator-min-microvolt = <3300000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo1_reg: ldo1 {
    					/* VDDSHV8 - VSDMMC  */
    					/* NOTE: on rev 1.3a, data supply */
    					vin-supply = <&vmain>;
    					regulator-name = "ldo1";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-boot-on;
    					regulator-always-on;
    				};
    
    				ldo2_reg: ldo2 {
    					/* VDDSH18V */
    					vin-supply = <&vmain>;
    					regulator-name = "ldo2";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo3_reg: ldo3 {
    					/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
    					vin-supply = <&vmain>;
    					regulator-name = "ldo3";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo4_reg: ldo4 {
    					/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
    					vin-supply = <&vmain>;
    					regulator-name = "ldo4";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				/* LDO5-8 unused */
    
    				ldo9_reg: ldo9 {
    					/* VDD_RTC  */
    					vin-supply = <&vmain>;
    					regulator-name = "ldo9";
    					regulator-min-microvolt = <840000>;
    					regulator-max-microvolt = <1160000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldoln_reg: ldoln {
    					/* VDDA_1V8_PLL */
    					vin-supply = <&vmain>;
    					regulator-name = "ldoln";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldousb_reg: ldousb {
    					/* VDDA_3V_USB: VDDA_USBHS33 */
    					vin-supply = <&vmain>;
    					regulator-name = "ldousb";
    					regulator-min-microvolt = <3300000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldortc_reg: ldortc {
    					/* VDDA_RTC  */
    					vin-supply = <&vmain>;
    					regulator-name = "ldortc";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				regen1: regen1 {
    					/* VDD_3V3_ON */
    					regulator-name = "regen1";
    					regulator-boot-on;
    					regulator-always-on;
    				};
    
    				regen2: regen2 {
    					/* Needed for PMIC internal resource */
    					regulator-name = "regen2";
    					regulator-boot-on;
    					regulator-always-on;
    				};
    			};
    		};
    
    		tps659038_rtc: tps659038_rtc {
    			compatible = "ti,palmas-rtc";
    			interrupt-parent = <&tps659038>;
    			interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
    			wakeup-source;
    		};
    
    		tps659038_pwr_button: tps659038_pwr_button {
    			compatible = "ti,palmas-pwrbutton";
    			interrupt-parent = <&tps659038>;
    			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
    			wakeup-source;
    			ti,palmas-long-press-seconds = <12>;
    		};
    
    		tps659038_gpio: tps659038_gpio {
    			compatible = "ti,palmas-gpio";
    			gpio-controller;
    			#gpio-cells = <2>;
    		};
    	};
    };
    
    &uart3 {
    	status = "okay";
    	interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
    			       &dra7_pmx_core 0x248>;
    };
    
    &rtc {
    	status = "okay";
    	ext-clk-src;
    };
    
    &mac {
    	status = "okay";
    	dual_emac;
    };
    
    &cpsw_emac0 {
    	phy_id = <&davinci_mdio>, <0>;
    	phy-mode = "rgmii";
    	dual_emac_res_vlan = <1>;
    };
    
    &cpsw_emac1 {
    	phy_id = <&davinci_mdio>, <1>;
    	phy-mode = "rgmii";
    	dual_emac_res_vlan = <2>;
    };
    
    &usb2_phy1 {
    	phy-supply = <&ldousb_reg>;
    };
    
    &usb2_phy2 {
    	phy-supply = <&ldousb_reg>;
    };
    
    &usb1 {
    	dr_mode = "host";
    };
    
    &usb2 {
    	dr_mode = "otg";
    };
    
    &mmc1 {
    	status = "okay";
    	vmmc-supply = <&v3_3d>;
    	vmmc_aux-supply = <&ldo1_reg>;
    	bus-width = <4>;
    	cd-gpios = <&gpio6 27 GPIO_ACTIVE_HIGH>; /* gpio 219 */
    	max-frequency = <192000000>;
    };
    
    &mmc2 {
    	status = "okay";
    	vmmc-supply = <&v3_3d>;
    	bus-width = <8>;
    	ti,non-removable;
    	max-frequency = <96000000>;
    	/*
    	 * eMMC on AM57xx IDK boards cannot support HS200 mode because
    	 * the IO voltage is tied to 3.3V
    	 */
    	/delete-property/ mmc-hs200-1_8v;
    };
    
    &qspi {
    	status = "okay";
    
    	spi-max-frequency = <76800000>;
    	m25p80@0 {
    		compatible = "s25fl256s1","spi-flash";
    		spi-max-frequency = <76800000>;
    		reg = <0>;
    		spi-tx-bus-width = <1>;
    		spi-rx-bus-width = <4>;
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		/* MTD partition table.
    		 * The ROM checks the first four physical blocks
    		 * for a valid file to boot and the flash here is
    		 * 64KiB block size.
    		 */
    		partition@0 {
    			label = "QSPI.SPL";
    			reg = <0x00000000 0x000040000>;
    		};
    		partition@1 {
    			label = "QSPI.u-boot";
    			reg = <0x00040000 0x00100000>;
    		};
    		partition@2 {
    			label = "QSPI.u-boot-spl-os";
    			reg = <0x00140000 0x00080000>;
    		};
    		partition@3 {
    			label = "QSPI.u-boot-env";
    			reg = <0x001c0000 0x00010000>;
    		};
    		partition@4 {
    			label = "QSPI.u-boot-env.backup1";
    			reg = <0x001d0000 0x0010000>;
    		};
    		partition@5 {
    			label = "QSPI.kernel";
    			reg = <0x001e0000 0x0800000>;
    		};
    		partition@6 {
    			label = "QSPI.file-system";
    			reg = <0x009e0000 0x01620000>;
    		};
    	};
    };
    

    Check this 2016 dtsi file

  • can you share me "am57xx-industrial-grade.dtsi" file as well.

  • // SPDX-License-Identifier: GPL-2.0
    &cpu_alert0 {
    	temperature = <90000>; /* milliCelsius */
    };
    
    &cpu_crit {
    	temperature = <105000>; /* milliCelsius */
    };
    
    &gpu_crit {
    	temperature = <105000>; /* milliCelsius */
    };
    
    &core_crit {
    	temperature = <105000>; /* milliCelsius */
    };
    
    &dspeve_crit {
    	temperature = <105000>; /* milliCelsius */
    };
    
    &iva_crit {
    	temperature = <105000>; /* milliCelsius */
    };
    
    check this file 

  • can you please change interrupts-extended parameters as below:

    &uart3 {
    status = "okay";
    interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
    &dra7_pmx_core 0x248>;
    };

    Regards,

    Anil

  • sorry, It is already configured as 0x248.

  • git diff

    vboxuser@vboxuser:~/am57xx-evm-linux-sdk-src-06.03.00.106/board-support/u-boot-2019.01+gitAUTOINC+333c3e72d3-g333c3e72d3$ git diff
    diff --git a/arch/arm/dts/am57xx-idk-common.dtsi b/arch/arm/dts/am57xx-idk-common.dtsi
    index fdb4e0e47c..b77e164f3c 100644
    --- a/arch/arm/dts/am57xx-idk-common.dtsi
    +++ b/arch/arm/dts/am57xx-idk-common.dtsi
    @@ -104,8 +104,8 @@
     &dra7_pmx_core {
            dcan1_pins_default: dcan1_pins_default {
                    pinctrl-single,pins = <
    -                       DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* dcan1_tx */
    -                       DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0)         /* dcan1_rx */
    +                       DRA7XX_CORE_IOPAD(0x37E8, PIN_INPUT_PULLUP | MUX_MODE2) /* dcan1_tx */
    +                       DRA7XX_CORE_IOPAD(0x37E4, PIN_INPUT_PULLUP | MUX_MODE2)         /* dcan1_rx */
                    >;
            };
     
    @@ -404,7 +404,7 @@
            vmmc-supply = <&v3_3d>;
            vqmmc-supply = <&ldo1_reg>;
            bus-width = <4>;
    -       cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
    +       cd-gpios = <&gpio6 27 GPIO_ACTIVE_HIGH>; /* gpio 219 */
            no-1-8-v;
     };
     
    diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h
    index 8a216a7855..2f0d23705c 100644
    --- a/board/ti/am57xx/mux_data.h
    +++ b/board/ti/am57xx/mux_data.h
    @@ -911,6 +911,8 @@ const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = {
            {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */
            {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */
            {UART2_RTSN, (M1 | PIN_OUTPUT)},        /* uart2_rtsn.uart3_txd */
    +       {UART3_RXD, (M0 | PIN_INPUT)},  /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (M0 | PIN_INPUT)},   /* i2c1_sda.i2c1_sda */
            {I2C1_SCL, (M0 | PIN_INPUT)},   /* i2c1_scl.i2c1_scl */
            {I2C2_SDA, (M1 | PIN_INPUT)},   /* i2c2_sda.hdmi1_ddc_scl */
    @@ -1193,6 +1195,8 @@ const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = {
     const struct pad_conf_entry early_padconf[] = {
            {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
            {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
    +       {UART3_RXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},       /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},       /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SDA */
            {I2C1_SCL, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SCL */
     
    diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
    index fd825ebba6..f57c9a7e83 100644
    --- a/scripts/dtc/dtc-lexer.l
    +++ b/scripts/dtc/dtc-lexer.l
    @@ -38,7 +38,7 @@ LINECOMMENT   "//".*\n
     #include "srcpos.h"
     #include "dtc-parser.tab.h"
     
    -YYLTYPE yylloc;
    +extern YYLTYPE yylloc;
     extern bool treesource_error;
     
     /* CAUTION: this will stop working if we ever use yyless() or yyunput() */
    (END)
            {I2C2_SDA, (M1 | PIN_INPUT)},   /* i2c2_sda.hdmi1_ddc_scl */
    @@ -1193,6 +1195,8 @@ const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = {
     const struct pad_conf_entry early_padconf[] = {
            {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
            {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
    +       {UART3_RXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},       /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},       /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SDA */
            {I2C1_SCL, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SCL */
     
    diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
    index fd825ebba6..f57c9a7e83 100644
    --- a/scripts/dtc/dtc-lexer.l
    +++ b/scripts/dtc/dtc-lexer.l
    @@ -38,7 +38,7 @@ LINECOMMENT   "//".*\n
     #include "srcpos.h"
     #include "dtc-parser.tab.h"
     
    -YYLTYPE yylloc;
    +extern YYLTYPE yylloc;
     extern bool treesource_error;
     
     /* CAUTION: this will stop working if we ever use yyless() or yyunput() */
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    (END)
            {I2C2_SDA, (M1 | PIN_INPUT)},   /* i2c2_sda.hdmi1_ddc_scl */
    @@ -1193,6 +1195,8 @@ const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = {
     const struct pad_conf_entry early_padconf[] = {
            {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
            {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
    +       {UART3_RXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},       /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},       /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SDA */
            {I2C1_SCL, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SCL */
     
    diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
    index fd825ebba6..f57c9a7e83 100644
    --- a/scripts/dtc/dtc-lexer.l
    +++ b/scripts/dtc/dtc-lexer.l
    @@ -38,7 +38,7 @@ LINECOMMENT   "//".*\n
     #include "srcpos.h"
     #include "dtc-parser.tab.h"
     
    -YYLTYPE yylloc;
    +extern YYLTYPE yylloc;

  • diff --git a/arch/arm/dts/am57xx-idk-common.dtsi b/arch/arm/dts/am57xx-idk-common.dtsi
    index fdb4e0e47c..afc5f5ca57 100644
    --- a/arch/arm/dts/am57xx-idk-common.dtsi
    +++ b/arch/arm/dts/am57xx-idk-common.dtsi
    @@ -10,6 +10,9 @@
     
     / {
            aliases {
    +               serial0 = &uart1;
    +               serial1 = &uart2;
    +               serial2 = &uart3;
                    rtc0 = &tps659038_rtc;
                    rtc1 = &rtc;
            };
    @@ -104,8 +107,8 @@
     &dra7_pmx_core {
            dcan1_pins_default: dcan1_pins_default {
                    pinctrl-single,pins = <
    -                       DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* dcan1_tx */
    -                       DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0)         /* dcan1_rx */
    +                       DRA7XX_CORE_IOPAD(0x37E8, PIN_INPUT_PULLUP | MUX_MODE2) /* dcan1_tx */
    +                       DRA7XX_CORE_IOPAD(0x37E4, PIN_INPUT_PULLUP | MUX_MODE2)         /* dcan1_rx */
                    >;
            };
     
    @@ -404,7 +407,7 @@
            vmmc-supply = <&v3_3d>;
            vqmmc-supply = <&ldo1_reg>;
            bus-width = <4>;
    -       cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
    +       cd-gpios = <&gpio6 27 GPIO_ACTIVE_HIGH>; /* gpio 219 */
            no-1-8-v;
     };
     
    diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
    index c1f05253bc..d1b3791dcd 100644
    --- a/board/ti/am57xx/board.c
    +++ b/board/ti/am57xx/board.c
    @@ -53,6 +53,7 @@ static int board_bootmode_has_emmc(void);
     #define board_is_am572x_idk()  board_ti_is("AM572IDK")
     #define board_is_am571x_idk()  board_ti_is("AM571IDK")
     #define board_is_bbai()                board_ti_is("BBONE-AI")
    +#define board_is_am572x_idk() 1
     
     #ifdef CONFIG_DRIVER_TI_CPSW
     #include <cpsw.h>
    diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h
    index 8a216a7855..2f0d23705c 100644
    --- a/board/ti/am57xx/mux_data.h
    +++ b/board/ti/am57xx/mux_data.h
    @@ -911,6 +911,8 @@ const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = {
            {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */
            {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */
            {UART2_RTSN, (M1 | PIN_OUTPUT)},        /* uart2_rtsn.uart3_txd */
    +       {UART3_RXD, (M0 | PIN_INPUT)},  /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (M0 | PIN_INPUT)},   /* i2c1_sda.i2c1_sda */
            {I2C1_SCL, (M0 | PIN_INPUT)},   /* i2c1_scl.i2c1_scl */
            {I2C2_SDA, (M1 | PIN_INPUT)},   /* i2c2_sda.hdmi1_ddc_scl */
    @@ -1193,6 +1195,8 @@ const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = {
     const struct pad_conf_entry early_padconf[] = {
            {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
            {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
    +       {UART3_RXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},       /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},       /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SDA */
            {I2C1_SCL, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SCL */
     
    diff --git a/scripts/dtc/dtc-lexer.l b/scripts/dtc/dtc-lexer.l
    index fd825ebba6..f57c9a7e83 100644
    --- a/scripts/dtc/dtc-lexer.l
    +++ b/scripts/dtc/dtc-lexer.l
    @@ -38,7 +38,7 @@ LINECOMMENT   "//".*\n
     #include "srcpos.h"
     #include "dtc-parser.tab.h"
     
    -YYLTYPE yylloc;
    +extern YYLTYPE yylloc;
     extern bool treesource_error;
     
     /* CAUTION: this will stop working if we ever use yyless() or yyunput() */

  •  {UART3_RXD, (M0 | PIN_INPUT)},  /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */

    but here i see that uart2_ctsn and uart2_rtsn are being selected instead of UART3_RXD and UART3_TXD?

    muxMode as 0?

    If you have the schematics can you please share here?

    Regards,

    Anil

  • Hi  

    Check out the Debug uart schematic 

  •   do you have any idea about this?

  • Hi  , 

    Problem got resolved after changing the EMIF registers .

    Now the issue is diffferent check logs attached

    U-Boot SPL 2019.01-g323d51410c-dirty (May 29 2026 - 23:36:47 +0530)
    DRA752-GP ES2.0
    ** Unable to read file dra7-ipu1-fw.xem4 **
    Firmware loading failed
    Trying to boot from MMC1
    Loading Environment from FAT... OK
    
    
    U-Boot 2019.01-g323d51410c-dirty (May 29 2026 - 23:36:47 +0530)
    
    CPU  : DRA752-GP ES2.0
    Model: TI AM5728 IDK
    Board: AM572x IDK REV
    DRAM:  2 GiB
    MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
    Loading Environment from FAT... OK
    Warning: fastboot.board_rev: unknown board revision
    am57x_idk_lcd_detect: Failed to get I2C device 0/56 (ret 1)
    Net:
    Warning: ethernet@48484000 using MAC address from ROM
    eth0: ethernet@48484000
    Hit any key to stop autoboot:  0
    switch to partitions #0, OK
    mmc0 is current device
    SD/MMC found on device 0
    ** Unable to read file boot.scr **
    2146 bytes read in 2 ms (1 MiB/s)
    Loaded env from uEnv.txt
    Importing environment from mmc0 ...
    Running uenvcmd ...
    78614936 bytes read in 3389 ms (22.1 MiB/s)
    298024 bytes read in 16 ms (17.8 MiB/s)
    ## Starting application at 0x84100000 ...
    prefetch abort
    pc : [<00000118>]          lr : [<841002f0>]
    reloc pc : [<81899118>]    lr : [<059992f0>]
    sp : 4037fd28  ip : 00000000     fp : 840ffff8
    r10: fcf5eea8  r9 : fcf46ec8     r8 : 00000002
    r7 : 0003c07b  r6 : 40300000     r5 : 4037f064  r4 : 00000001
    r3 : 00000004  r2 : 00000198     r1 : 80800041  r0 : 00000001
    Flags: nzcv  IRQs off  FIQs off  Mode SVC_32
    Code: 00000000 00000000 00000000 00000000 (00000000)
    Resetting CPU ...
    
    resetting ...
    

  • Hello Hanmant,

    I am out of office until tomorrow. 

    Best,

    Josue

  • Hi Josue,

    Thanks for reply.

    No issue.

    Please reply once you back

    Thanks 

    Hanmant

  • Hello Hanmant,

    I will be looking at your your issue today. This Prefetch abort is usually an issue with the CPU trying to execute code from an invalid memory location. In this case you are trying to execute from pc : [<00000118>] which is not valid.

    Could you share working logs? 

    Are you essentially migrating from an older SDK to a newer SDK?

    Any HW changes?

    -Josue

  • Hi  ,

    I had using 2016 uboot version and it's working fine but now I wanted d to use 2019 U-boot version.

    I had did same changes in ddr configuration as I did in 2016 U-boot version.

  • U-Boot SPL 2016.05-00118-gdd926c6000-dirty (Dec 18 2023 - 18:34:54)
    DRA752-GP ES2.0
    Trying to boot from MMC1
    reading args
    spl_load_image_fat_os: error reading image args, err - -1
    reading u-boot.img
    reading u-boot.img
    reading u-boot.img
    reading u-boot.img


    U-Boot 2016.05-00118-gdd926c6000-dirty (Dec 18 2023 - 18:34:54 +0530)

    CPU : DRA752-GP ES2.0
    Model: TI AM5728 IDK
    Board: AM572x IDK REV <NULL>
    DRAM: 2 GiB
    MMC: no pinctrl for sdr104
    no pinctrl for ddr50
    no pinctrl for sdr50
    no pinctrl for sdr25
    no pinctrl for sdr12
    OMAP SD/MMC: 0, OMAP SD/MMC: 1
    reading uboot.env
    *** Warning - bad CRC, using default environment

    I2C chip 50: requested alen 2 does not match chip offset_len 1
    SCSI: SATA link 0 timeout.
    AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
    flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst
    scanning bus for devices...
    Found 0 device(s).
    Net: <ethaddr> not set. Validating first E-fuse MAC
    cpsw
    Hit any key to stop autoboot: 0
    switch to partitions #0, OK
    mmc0 is current device
    SD/MMC found on device 0
    reading boot.scr
    ** Unable to read file boot.scr **
    reading uEnv.txt
    360 bytes read in 3 ms (117.2 KiB/s)
    Loaded env from uEnv.txt
    Importing environment from mmc0 ...
    Running uenvcmd ...
    reading vxWorks.bin
    32657816 bytes read in 1409 ms (22.1 MiB/s)
    reading /SonicsDSP.xe66
    5186624 bytes read in 228 ms (21.7 MiB/s)
    ## Starting application at 0x84100000 ...
    Target Name: vxTarget.

    This is working logs

  • See these changes I did 

    diff --git a/arch/arm/dts/am57xx-beagle-x15.dts b/arch/arm/dts/am57xx-beagle-x15.dts
    index 8d9bdf10a7..a16cc152a9 100644
    --- a/arch/arm/dts/am57xx-beagle-x15.dts
    +++ b/arch/arm/dts/am57xx-beagle-x15.dts
    @@ -10,7 +10,9 @@
     
     / {
            /* NOTE: This describes the "original" pre-production A2 revision */
    -       model = "TI AM5728 BeagleBoard-X15";
    +       /*model = "TI AM5728 BeagleBoard-X15";*/
    +       model = "BeagleBoard-X15";
    +       
     };
     
     &tpd12s015 {
    diff --git a/arch/arm/mach-omap2/emif-common.c b/arch/arm/mach-omap2/emif-common.c
    index 312f868fbc..4764a1e4c4 100644
    --- a/arch/arm/mach-omap2/emif-common.c
    +++ b/arch/arm/mach-omap2/emif-common.c
    @@ -1448,7 +1448,7 @@ void dmm_init(u32 base)
             * memory is mapped on it. Using emif1_enabled
             * and emif2_enabled variables for this.
             */
    -       emif1_enabled = 0;
    +       emif1_enabled = 1;
            emif2_enabled = 0;
            for (i = 0; i < 4; i++) {
                    section = __raw_readl(DMM_BASE + i*4);
    diff --git a/arch/arm/mach-omap2/omap5/hw_data.c b/arch/arm/mach-omap2/omap5/hw_data.c
    index e6bee48dfc..6afe565342 100644
    --- a/arch/arm/mach-omap2/omap5/hw_data.c
    +++ b/arch/arm/mach-omap2/omap5/hw_data.c
    @@ -849,13 +849,22 @@ void __weak hw_data_init(void)
            *dplls_data = &dra72x_dplls;
            *ctrl = &dra7xx_ctrl;
            break;
    -
            default:
                    printf("\n INVALID OMAP REVISION ");
            }
     }
    -
    -void get_ioregs(const struct ctrl_ioregs **regs)
    +/*Newly added as per recommended
    + * I/O Settings*/
    +//const struct ctrl_ioregs AM572x_DDR3L_532MHz_TI_AM572x_IDK_ctrl_ioregs = {
    +//     .ctrl_ddr3ch = 0x80808080,
    +//     .ctrl_ddrch = 0x40404040,
    +//     .ctrl_ddrio_0 = 0x00094A40,
    +//     .ctrl_ddrio_1 = 0x04A52000,
    +//     .ctrl_lpddr2ch = 0x00404000,
    +//     .ctrl_emif_sdram_config_ext = 0x0000C123
    +//};
    +void __weak get_ioregs(const struct ctrl_ioregs **regs)// changed
    +//void get_ioregs(const struct ctrl_ioregs **regs)
     {
            u32 omap_rev = omap_revision();
     
    diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
    index c7231d183c..5f2d81dde6 100644
    --- a/board/ti/am57xx/board.c
    +++ b/board/ti/am57xx/board.c
    @@ -5,7 +5,7 @@
      * Author: Felipe Balbi <balbi@ti.com>
      *
      * Based on board/ti/dra7xx/evm.c
    - */
    + **/
     
     #include <common.h>
     #include <env.h>
    @@ -43,7 +43,7 @@
     
     #include "../common/board_detect.h"
     #include "mux_data.h"
    -
    +//#define board_is_am572x_idk()                1
     #ifdef CONFIG_SUPPORT_EMMC_BOOT
     static int board_bootmode_has_emmc(void);
     #endif
    @@ -93,6 +93,135 @@ DECLARE_GLOBAL_DATA_PTR;
     #define TPS65903X_PRIMARY_SECONDARY_PAD2       0xFB
     #define TPS65903X_PAD2_POWERHOLD_MASK          0x20
     
    +
    +/**Added Extra s per EMIF tool ****************/
    +/*I / O setting a*/
    +const struct ctrl_ioregs AM572x_DDR3L_532MHz_TI_AM572x_IDK_ctrl_ioregs = {
    +       .ctrl_ddr3ch = 0x80808080,
    +       .ctrl_ddrch = 0x40404040,
    +       .ctrl_ddrio_0 = 0x00094A40,
    +       .ctrl_ddrio_1 = 0x04A52000,
    +       .ctrl_lpddr2ch = 0x00404000,
    +       .ctrl_emif_sdram_config_ext = 0x0000C123
    +};
    +void get_ioregs(const struct ctrl_ioregs **regs)
    +{
    +       *regs = &AM572x_DDR3L_532MHz_TI_AM572x_IDK_ctrl_ioregs;
    +}
    +/*Lisa register configuration */
    +const struct dmm_lisa_map_regs AM572x_DDR3L_532MHz_TI_AM572x_IDK_dmm_regs = {
    +       .dmm_lisa_map_0 = 0x00000000,
    +       .dmm_lisa_map_1 = 0x00000000,
    +       .dmm_lisa_map_2 = 0x80700100,
    +       .dmm_lisa_map_3 = 0xFF020100,
    +       .is_ma_present = 0x1
    +};
    +
    +/*EMIF Registers*/
    +const struct emif_regs AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif_regs = {
    +           .sdram_config_init = 0x61851BB2,
    +           .sdram_config = 0x61851BB2,
    +           .sdram_config2 = 0x00000000,
    +           .ref_ctrl = 0x000040F1,
    +           .ref_ctrl_final = 0x00001035,
    +           .sdram_tim1 = 0xCEEF2663,
    +           .sdram_tim2 = 0x30BF7FDA,
    +           .sdram_tim3 = 0x407F8BA8,
    +           .read_idle_ctrl = 0x00050000,
    +           .zq_config = 0x5007190B,
    +           .temp_alert_config = 0x00000000,
    +           .emif_rd_wr_lvl_rmp_ctl = 0x80000000,
    +           .emif_rd_wr_lvl_ctl = 0x00000000,
    +           .emif_ddr_phy_ctlr_1_init = 0x0024400B,
    +           .emif_ddr_phy_ctlr_1 = 0x0E24400B,
    +           .emif_rd_wr_exec_thresh = 0x00000305,
    +
    +//         .emif_ecc_ctrl_reg = 0x00000000,
    +//         .emif_ecc_address_range_1 = 0x3FFF0000,
    +//         .emif_ecc_address_range_2 = 0x00000000,
    +
    +//     .emif_ecc_ctrl_reg = 0x00000000,
    +//     .emif_ecc_address_range_1 = 0x3FFF0000,
    +//     .emif_ecc_address_range_2 = 0x00000000,
    +
    +};
    +
    +/*EMIF1 phy config*/
    +const unsigned int AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs [] = {
    +           0x04040100, /* EMIF1_EXT_PHY_CTRL_1 */
    +           0x006B0086, /* EMIF1_EXT_PHY_CTRL_2 */
    +           0x006B0087, /* EMIF1_EXT_PHY_CTRL_3 */
    +           0x006B0092, /* EMIF1_EXT_PHY_CTRL_4 */
    +           0x006B0091, /* EMIF1_EXT_PHY_CTRL_5 */
    +           0x006B006B, /* EMIF1_EXT_PHY_CTRL_6 */
    +           0x00320032, /* EMIF1_EXT_PHY_CTRL_7 */
    +           0x00320032, /* EMIF1_EXT_PHY_CTRL_8 */
    +           0x00320032, /* EMIF1_EXT_PHY_CTRL_9 */
    +           0x00320032, /* EMIF1_EXT_PHY_CTRL_10 */
    +           0x00320032, /* EMIF1_EXT_PHY_CTRL_11 */
    +           0x00600067, /* EMIF1_EXT_PHY_CTRL_12 */
    +           0x00600067, /* EMIF1_EXT_PHY_CTRL_13 */
    +           0x00600068, /* EMIF1_EXT_PHY_CTRL_14 */
    +           0x00600069, /* EMIF1_EXT_PHY_CTRL_15 */
    +           0x00600060, /* EMIF1_EXT_PHY_CTRL_16 */
    +           0x00400047, /* EMIF1_EXT_PHY_CTRL_17 */
    +           0x00400047, /* EMIF1_EXT_PHY_CTRL_18 */
    +           0x00400048, /* EMIF1_EXT_PHY_CTRL_19 */
    +           0x00400049, /* EMIF1_EXT_PHY_CTRL_20 */
    +           0x00400040, /* EMIF1_EXT_PHY_CTRL_21 */
    +           0x00800080, /* EMIF1_EXT_PHY_CTRL_22 */
    +           0x00800080, /* EMIF1_EXT_PHY_CTRL_23 */
    +           0x40010080, /* EMIF1_EXT_PHY_CTRL_24 */
    +           0x08102040, /* EMIF1_EXT_PHY_CTRL_25 */
    +           0x00000076, /* EMIF1_EXT_PHY_CTRL_26 */
    +           0x00000077, /* EMIF1_EXT_PHY_CTRL_27 */
    +           0x00000082, /* EMIF1_EXT_PHY_CTRL_28 */
    +           0x00000081, /* EMIF1_EXT_PHY_CTRL_29 */
    +           0x00000000, /* EMIF1_EXT_PHY_CTRL_30 */
    +           0x00000037, /* EMIF1_EXT_PHY_CTRL_31 */
    +           0x00000037, /* EMIF1_EXT_PHY_CTRL_32 */
    +           0x00000038, /* EMIF1_EXT_PHY_CTRL_33 */
    +           0x00000039, /* EMIF1_EXT_PHY_CTRL_34 */
    +           0x00000000, /* EMIF1_EXT_PHY_CTRL_35 */
    +           0x00000077  /* EMIF1_EXT_PHY_CTRL_36 */
    +//     0x04040100,     /* EMIF1_EXT_PHY_CTRL_1 */
    +//     0x006B0086,     /* EMIF1_EXT_PHY_CTRL_2 */
    +//     0x006B0087,     /* EMIF1_EXT_PHY_CTRL_3 */
    +//     0x006B0092,     /* EMIF1_EXT_PHY_CTRL_4 */
    +//     0x006B0091,     /* EMIF1_EXT_PHY_CTRL_5 */
    +//     0x006B006B,     /* EMIF1_EXT_PHY_CTRL_6 */
    +//     0x00320032,     /* EMIF1_EXT_PHY_CTRL_7 */
    +//     0x00320032,     /* EMIF1_EXT_PHY_CTRL_8 */
    +//     0x00320032,     /* EMIF1_EXT_PHY_CTRL_9 */
    +//     0x00320032,     /* EMIF1_EXT_PHY_CTRL_10 */
    +//     0x00320032,     /* EMIF1_EXT_PHY_CTRL_11 */
    +//     0x00600067,     /* EMIF1_EXT_PHY_CTRL_12 */
    +//     0x00600067,     /* EMIF1_EXT_PHY_CTRL_13 */
    +//     0x00600068,     /* EMIF1_EXT_PHY_CTRL_14 */
    +//     0x00600069,     /* EMIF1_EXT_PHY_CTRL_15 */
    +//     0x00600060,     /* EMIF1_EXT_PHY_CTRL_16 */
    +//     0x00400047,     /* EMIF1_EXT_PHY_CTRL_17 */
    +//     0x00400047,     /* EMIF1_EXT_PHY_CTRL_18 */
    +//     0x00400048,     /* EMIF1_EXT_PHY_CTRL_19 */
    +//     0x00400049,     /* EMIF1_EXT_PHY_CTRL_20 */
    +//     0x00400040,     /* EMIF1_EXT_PHY_CTRL_21 */
    +//     0x00800080,     /* EMIF1_EXT_PHY_CTRL_22 */
    +//     0x00800080,     /* EMIF1_EXT_PHY_CTRL_23 */
    +//     0x40010080,     /* EMIF1_EXT_PHY_CTRL_24 */
    +//     0x08102040,     /* EMIF1_EXT_PHY_CTRL_25 */
    +//     0x00000076,     /* EMIF1_EXT_PHY_CTRL_26 */
    +//     0x00000077,     /* EMIF1_EXT_PHY_CTRL_27 */
    +//     0x00000082,     /* EMIF1_EXT_PHY_CTRL_28 */
    +//     0x00000081,     /* EMIF1_EXT_PHY_CTRL_29 */
    +//     0x00000000,     /* EMIF1_EXT_PHY_CTRL_30 */
    +//     0x00000037,     /* EMIF1_EXT_PHY_CTRL_31 */
    +//     0x00000037,     /* EMIF1_EXT_PHY_CTRL_32 */
    +//     0x00000038,     /* EMIF1_EXT_PHY_CTRL_33 */
    +//     0x00000039,     /* EMIF1_EXT_PHY_CTRL_34 */
    +//     0x00000000,     /* EMIF1_EXT_PHY_CTRL_35 */
    +//     0x00000077      /* EMIF1_EXT_PHY_CTRL_36 */
    +};
    +/******************************************************/
     const struct omap_sysinfo sysinfo = {
            "Board: UNKNOWN(BeagleBoard X15?) REV UNKNOWN\n"
     };
    @@ -127,7 +256,7 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
            else if (board_is_bbai())
                    *dmm_lisa_regs = &bbai_lisa_regs;
            else
    -               *dmm_lisa_regs = &beagle_x15_lisa_regs;
    +               *dmm_lisa_regs = &AM572x_DDR3L_532MHz_TI_AM572x_IDK_dmm_regs;//&beagle_x15_lisa_regs;
     }
     
     static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = {
    @@ -310,37 +439,74 @@ static const struct emif_regs am574x_emif1_ddr3_666mhz_emif_ecc_regs = {
            .emif_ecc_address_range_2       = 0x00000000
     };
     
    +/*
    + * Newly added
    + * */
     void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
     {
    -       switch (emif_nr) {
    +switch (emif_nr) {
            case 1:
    -               if (board_is_am571x_idk())
    -                       *regs = &am571x_emif1_ddr3_666mhz_emif_regs;
    -               else if (board_is_am574x_idk())
    -                       *regs = &am574x_emif1_ddr3_666mhz_emif_ecc_regs;
    -               else
    -                       *regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs;
    -               break;
    +       if (board_is_am571x_idk())
    +               *regs = &am571x_emif1_ddr3_666mhz_emif_regs;
    +
    +       else if (board_is_am574x_idk())
    +               *regs = &am574x_emif1_ddr3_666mhz_emif_ecc_regs;
    +       else
    +               *regs = &AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif_regs;
    +       break;
            case 2:
    -               if (board_is_am574x_idk())
    -                       *regs = &am571x_emif1_ddr3_666mhz_emif_regs;
    -               else
    -                       *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs;
    -               break;
    +       if (board_is_am574x_idk())
    +               *regs = &am571x_emif1_ddr3_666mhz_emif_regs;
    +       else
    +               *regs = &AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif_regs;
    +       break;
            }
     }
    -
    +//void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
    +//{
    +//     switch (emif_nr) {
    +//     case 1:
    +//             if (board_is_am571x_idk())
    +//                     *regs = &am571x_emif1_ddr3_666mhz_emif_regs;
    +//             else if (board_is_am574x_idk())
    +//                     *regs = &am574x_emif1_ddr3_666mhz_emif_ecc_regs;
    +//             else
    +//                     *regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs;
    +//             break;
    +//     case 2:
    +//             if (board_is_am574x_idk())
    +//                     *regs = &am571x_emif1_ddr3_666mhz_emif_regs;
    +//             else
    +//                     *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs;
    +//             break;
    +//     }
    +//}
    +
    +//void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
    +//{
    +//     switch (emif_nr) {
    +//     case 1:
    +//             *regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs;
    +//             *size = ARRAY_SIZE(beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs);
    +//             break;
    +//     case 2:
    +//             *regs = beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs;
    +//             *size = ARRAY_SIZE(beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs);
    +//             break;
    +//     }
    +//}
     void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size)
     {
    -       switch (emif_nr) {
    +       switch (emif_nr)
    +       {
            case 1:
    -               *regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs;
    -               *size = ARRAY_SIZE(beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs);
    -               break;
    +               *regs = AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs;
    +               *size = ARRAY_SIZE(AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs);
    +       break;
            case 2:
    -               *regs = beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs;
    -               *size = ARRAY_SIZE(beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs);
    -               break;
    +               *regs = AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs;
    +               *size = ARRAY_SIZE(AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs);
    +       break;
            }
     }
     
    @@ -572,10 +738,13 @@ void do_board_detect(void)
                    bname = "AM571x IDK";
            else if (board_is_bbai())
                    bname = "BeagleBone AI";
    +       printf("\r\n board name %s ::",bname);
    +       printf("Unidentified board claims %s in eeprom header\n",
    +              board_ti_get_name());
     
            if (bname)
                    snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN,
    -                        "Board: %s REV %s\n", bname, board_ti_get_rev());
    +                        "BoardNameN: %s REV %s\n", bname, board_ti_get_rev());
     }
     
     static void setup_board_eeprom_env(void)
    diff --git a/board/ti/am57xx/mux_data.h b/board/ti/am57xx/mux_data.h
    index 212799c93d..a0f23dff59 100644
    --- a/board/ti/am57xx/mux_data.h
    +++ b/board/ti/am57xx/mux_data.h
    @@ -209,9 +209,11 @@ const struct pad_conf_entry core_padconf_array_essential_x15[] = {
            {UART1_RTSN, (M14 | PIN_INPUT)},        /* uart1_rtsn.gpio7_25 */
            {UART2_RXD, (M14 | PIN_INPUT_PULLDOWN)},        /* uart2_rxd.gpio7_26 */
            {UART2_TXD, (M14 | PIN_INPUT_PULLDOWN)},        /* uart2_txd.gpio7_27 */
    -       {UART2_CTSN, (M2 | PIN_INPUT_PULLUP)},  /* uart2_ctsn.uart3_rxd */
    -       {UART2_RTSN, (M1 | PIN_OUTPUT)},        /* uart2_rtsn.uart3_txd */
    +//     {UART2_CTSN, (M2 | PIN_INPUT_PULLUP)},  /* uart2_ctsn.uart3_rxd */
    +//     {UART2_RTSN, (M1 | PIN_OUTPUT)},        /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (M0 | PIN_INPUT_PULLUP)},    /* i2c1_sda.i2c1_sda */
    +       {UART3_RXD, (M0 | PIN_INPUT)},  /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */
            {I2C1_SCL, (M0 | PIN_INPUT_PULLUP)},    /* i2c1_scl.i2c1_scl */
            {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},    /* i2c2_sda.hdmi1_ddc_scl */
            {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},    /* i2c2_scl.hdmi1_ddc_sda */
    @@ -752,8 +754,10 @@ const struct pad_conf_entry core_padconf_array_essential_am574x_idk[] = {
            {UART1_TXD, (M14 | PIN_OUTPUT | SLEWCONTROL)},  /* uart1_txd.gpio7_23 */
            {UART2_RXD, (M4 | PIN_INPUT)},  /* uart2_rxd.uart2_rxd */
            {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */
    -       {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */
    -       {UART2_RTSN, (M1 | PIN_OUTPUT)},        /* uart2_rtsn.uart3_txd */
    +//     {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */
    +//     {UART2_RTSN, (M1 | PIN_OUTPUT)},        /* uart2_rtsn.uart3_txd */
    +       {UART3_RXD, (M0 | PIN_INPUT)},  /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (M0 | PIN_INPUT)},   /* i2c1_sda.i2c1_sda */
            {I2C1_SCL, (M0 | PIN_INPUT)},   /* i2c1_scl.i2c1_scl */
            {I2C2_SDA, (M1 | PIN_INPUT)},   /* i2c2_sda.hdmi1_ddc_scl */
    @@ -972,8 +976,10 @@ const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = {
            {UART1_TXD, (M14 | PIN_OUTPUT | SLEWCONTROL)},  /* uart1_txd.gpio7_23 */
            {UART2_RXD, (M4 | PIN_INPUT)},  /* uart2_rxd.uart2_rxd */
            {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */
    -       {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */
    -       {UART2_RTSN, (M1 | PIN_OUTPUT)},        /* uart2_rtsn.uart3_txd */
    +//     {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */
    +//     {UART2_RTSN, (M1 | PIN_OUTPUT)},        /* uart2_rtsn.uart3_txd */
    +       {UART3_RXD, (M0 | PIN_INPUT)},  /* uart2_ctsn.uart3_rxd */
    +       {UART3_TXD, (M0 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (M0 | PIN_INPUT)},   /* i2c1_sda.i2c1_sda */
            {I2C1_SCL, (M0 | PIN_INPUT)},   /* i2c1_scl.i2c1_scl */
            {I2C2_SDA, (M1 | PIN_INPUT)},   /* i2c2_sda.hdmi1_ddc_scl */
    @@ -1254,14 +1260,16 @@ const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = {
     };
     
     const struct pad_conf_entry early_padconf[] = {
    -       {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
    -       {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
    +               {UART3_RXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    +               {UART3_TXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
    +//     {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
    +//     {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SDA */
            {I2C1_SCL, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SCL */
     
            /* BeagleBone AI: Debug UART */
    -       {UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    -       {UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
    +//     {UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    +//     {UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
     };
     
     #ifdef CONFIG_SUPPORT_EMMC_BOOT
    (END)
    -       {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
    -       {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
    +               {UART3_RXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    +               {UART3_TXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
    +//     {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
    +//     {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SDA */
            {I2C1_SCL, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SCL */
     
            /* BeagleBone AI: Debug UART */
    -       {UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    -       {UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
    +//     {UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    +//     {UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
     };
     
     #ifdef CONFIG_SUPPORT_EMMC_BOOT
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    ~
    (END)
    -       {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
    -       {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
    +               {UART3_RXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    +               {UART3_TXD, (M0 | PIN_INPUT_SLEW | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
    +//     {UART2_CTSN, (M2 | PIN_INPUT_SLEW)},    /* uart2_ctsn.uart3_rxd */
    +//     {UART2_RTSN, (M1 | PIN_INPUT_SLEW)},    /* uart2_rtsn.uart3_txd */
            {I2C1_SDA, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SDA */
            {I2C1_SCL, (PIN_INPUT_PULLUP | M0)},    /* I2C1_SCL */
     
            /* BeagleBone AI: Debug UART */
    -       {UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    -       {UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
    +//     {UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},   /* uart1_rxd.uart1_rxd */
    +//     {UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},  /* uart1_txd.uart1_txd */
     };
     
     #ifdef CONFIG_SUPPORT_EMMC_BOOT
    
    
    for ddr 

  • Hello Hanmant,

    It is hard to tell what exactly could be the reason you are seeing this abort. Given the thread history, and the diff you shared I have some ideas that can perhaps help guide you.

    1. What piece of code is telling the CPU to branch to such a low address? that is one place to start.
      prefetch abort
      pc : [<00000118>]          lr : [<841002f0>]
    2. Please look into this app note: https://www.ti.com/lit/an/sprac44a/sprac44a.pdf
      To ensure the IO timing values published in the Timing Requirements and Switching Characteristics tables of the AM57xx data manual over the lifetime of the device, the AM57xx software must implement the proper pad configuration requirements. The impact of not following these requirements may not be observed immediately. However, in the long term, failure to adhere to this procedure may cause system issues.

      1. Changing padconfig via DT should be avoided when possible.
    3. The issue you are seeing could still be a DDR issue
      1. Did you follow the DDR app note: https://www.ti.com/lit/an/sprac36e/sprac36e.pdf?
      2. Why did you have to change these?
      3. Can you enable more logging in order to figure out your issue?
        EX: 
        # CONFIG_SYS_CONSOLE_INFO_QUIET is not set
        
        CONFIG_DEBUG_UART=y
        CONFIG_DEBUG_UART_OMAP=y
        
        CONFIG_LOGLEVEL=7
        CONFIG_LOG=y
        

    Best,

    -Josue

  • Hi  

    Can you please check this thread, AM5728: What was the resolution to the previous poster's issue? 

    These changes we did in ddr3 in hardware level.

    After that same we were facing but after changing ddr registers that's emif,dmm,lisa etc it works fine with 2016 u- boot version.

  • Thank you for the background Hanmant,

    How did you solve the prefetch abort on that version of U-boot?

     RE: AM5728: AM5728 :SD u-boot issue 

    -Josue

  • Hi

    It was not resolved that time.

    But we wanted to resolve this problem now.

    Suggest us any changes do I need to do in dts or defconfig file or elsewhere.

    Or any debugging suggestions 

  • Is there any application loading address changes?

    Check this my uEnv.txt which used for 2016 and I'm using for this 2019 as well

    bootpart=0:1
    loadaddr=0x84100000
    loadbootenv=load mmc 0:1 0x84100000 ${bootenv}
    bootfile=vxWorks.bin
    loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootfile}
    #loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${fdtfile}
    bootcmd=mmc rescan; load mmc 0:1 0x84100000 vxWorks.bin; load mmc 0:1 0xb0000000 /SonicsDSP.xe66; go 0x84100000
    uenvcmd=boot
    
    
    mmc rescan
    
    load mmc 0:1 ${loadaddr} vxWorks.bin
    run findfdt
    
    dcache off;icache off;fatload mmc 0 0x84100000 vxWorks.bin; go 0x84100000
    
    kernel_addr_r=0x82000000
    loadaddr=0x82000000
    loadbootenv=fatload mmc ${mmcdev} ${loadaddr} 
    
    "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
    "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bsp_script};\0" \
    "bootscript=echo Running bootscript from mmc ...; " \
    "source\0" \
    "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
    "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
    "mmcboot=echo Booting from mmc ...; " \
    "run mmcargs; " \
    "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
    args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype}
    
    
    setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp
    
    setenv bootcmd "mmc rescan; load mmc 0:1 0x84100000 vxWorks.bin; load mmc 0:1 0xb0000000 /SonicsDSP.xe66; go 0x84100000"
    
        setenv bootcmd 'fatload mmc 0:1 0x84100000 vxWorks.bin; fatload mmc 0:1 0xb0000000 /SonicsDSP.xe66; go 0x84100000' 
    
        setenv bootargs 'console=ttyS2, 115200 root=/dev/mmcblk0p4 rootfs=ext4 rw rootwait'
    
    fatload mmc 0 0x84100000 vxWorks.bin; go 0x84100000
    
    setenv bootcmd "fatload mmc 0 0x84100000 vxWorks.bin; bootm 0x84100000"
    setenv bootargs fatload mmc 0 0x84100000 vxWorks.bin
    go 0x84100000 
    fatload mmc 0 100000 uvxworks; bootvx 100000
    run mmcargs
    spl export fdt ${loadaddr} - ${fdtaddr}
    
    
    run findfdt;
    run init_console;
    setenv mmcdev 0;
    setenv bootpart 0:2 ;
    mmc dev ${mmcdev};
    setenv devnum ${mmcdev};
    setenv devtype mmc;
    mmc rescan;
    run loadimage;
    run args_mmc;
    run loadfdt;
    bootz ${loadaddr} - ${fdtaddr}

  • Hanmant,

    These two were further debugging tips:

    • What piece of code is telling the CPU to branch to such a low address? that is one place to start.
      Fullscreen
      1
      2
      prefetch abort
      pc : [<00000118>] lr : [<841002f0>]
      XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Can you enable more logging in order to figure out your issue?
    EX: 

    I am confused, you sent me a working boot log of Uboot 2016 https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1650171/am5728-am5728-u-boot-2019-version-issue-with-uart3/6368831, but you are saying -

    It was not resolved that time.

    But we wanted to resolve this problem now.

    Is the working log with the older DDR layout and the issue with the new layout from this post  AM5728: What was the resolution to the previous poster's issue? 

    The evidence still points at an issue with your DDR.

    I am not sure that I understand the loading at loadaddr=0x84100000 and then kernel_addr_r=0x82000000
    loadaddr=0x82000000 ...

    Is this a VxWorks deal? For this you have to contact WindRiver.

    -Josue

  • Hanmant,

    The onus is on your side.

    What piece of code is telling the CPU to branch to such a low address? that is one place to start.

      1. Can you enable more logging in order to figure out your issue?
        EX: 
        Fullscreen
        1
        2
        3
        4
        5
        6
        7
        # CONFIG_SYS_CONSOLE_INFO_QUIET is not set
        CONFIG_DEBUG_UART=y
        CONFIG_DEBUG_UART_OMAP=y
        CONFIG_LOGLEVEL=7
        CONFIG_LOG=y
        XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Best,

    -Josue

  • Josue,

    We don't see any logs on console  After making this parameters.

  • Hanmant,

    Could you investigate what code at lr : [<841002f0>] is making the system branch so low (<00000118>])
    ## Starting application at 0x84100000 ...
    prefetch abort
    pc : [<00000118>] lr : [<841002f0>]
    reloc pc : [<81899118>] lr : [<059992f0>]

    Also, try only using 

    CONFIG_LOGLEVEL=7
    CONFIG_LOG=y

    debug uart might not be having the effect we desire. 

    Can you clarify how you have a working log from 2016 u-boot and you are saying the prefetch abort was not resolved in the other thread? 

    What are the differences? 

    -Josue

  • Hi Josue,

    After these no effect at all

    CONFIG_LOGLEVEL=7
    CONFIG_LOG=y

    still this issue is pending https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1304710/am5728-am5728-sd-u-boot-issue but this is related to u-boot 2021 version . 

    Josue do you have any other solution to check/ debug.

    also check e2e.ti.com/.../am5728-what-was-the-resolution-to-the-previous-poster-s-issue

  • Can you clarify how you have a working log from 2016 u-boot and you are saying the prefetch abort was not resolved in the other thread? 

    What are the differences? 

    This is essentially the same issue in all three versions of U-boot., only when you run the Vx-Works application. We do not debug Vx-works, you will have to reach out to Wind River for this. My last question is still pending.

    -Josue

  • After changing the DDR register configurations in u-boot 2016 with same VxWorks bin but same DDR changes it did in fact im doing this 2019 u-boot version as well but there issue of prefetch abort.

    I dont understand why this happening

  • Hello,
    Thank you for your inquiry. **Josue Zamitiz** is currently on leave and will be available on **2026-06-12**.
    Your query will be addressed upon their return. We appreciate your patience and understanding.
    Best regards,
    TI E2E Support Team
    ---
    *This is an automated notification.*

  • HI Josue,

    Check these logs

    U-Boot 2025.01-g3c06cd621447-dirty (Jun 08 2026 - 18:33:01 +0530)

    CPU : DRA752-GP ES2.0
    Model: TI AM5728 IDK
    Board: AM572x IDK REV
    DRAM: 2 GiB
    Core: 75 devices, 26 uclasses, devicetree: separate
    MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
    Loading Environment from FAT... OK

    **** RC -1
    Net: Could not get PHY for ethernet@48484000: addr 16
    eth2: ethernet@48484000
    Hit any key to stop autoboot: 0
    switch to partitions #0, OK
    mmc0 is current device
    347 bytes read in 2 ms (168.9 KiB/s)
    ## Warning: Input data exceeds 1048576 bytes - truncated
    ## Info: input data size = 1048578 = 0x100002
    67420180 bytes read in 2903 ms (22.1 MiB/s)
    5186624 bytes read in 226 ms (21.9 MiB/s)
    ## Starting application at 0x84100000 ...
    prefetch abort
    pc : [<00000108>] lr : [<841002f4>]
    reloc pc : [<81885108>] lr : [<059852f4>]
    sp : 4037fd28 ip : 00000000 fp : 840ffff8
    r10: fefea524 r9 : fcf5aed0 r8 : 00000002
    r7 : 0003c07b r6 : 40300000 r5 : 4037f064 r4 : 00000001
    r3 : 00000004 r2 : 00000198 r1 : 80800041 r0 : 00000001
    Flags: nzcv IRQs off FIQs off Mode SVC_32 (T)
    Code: 0000 0000 0000 0000 (0000) 0000
    Resetting CPU ...

    ▒esetting ...
    U-Boot SPL 2025.01-g3c06cd621447-dirty (Jun 08 2026 - 18:33:01 +0530)
    DRA752-GP ES2.0
    Firmware loading failed for ipu2
    Trying to boot from MMC1
    Loading Environment from FAT... OK


    U-Boot 2025.01-g3c06cd621447-dirty (Jun 08 2026 - 18:33:01 +0530)

    CPU : DRA752-GP ES2.0
    Model: TI AM5728 IDK
    Board: AM572x IDK REV
    DRAM: 2 GiB
    Core: 75 devices, 26 uclasses, devicetree: separate
    MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
    Loading Environment from FAT... OK

    **** RC -1
    Net: Could not get PHY for ethernet@48484000: addr 16
    eth2: ethernet@48484000
    Hit any key to stop autoboot: 0
    =>
    => printenv
    addr_fit=0x90000000
    args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype}
    baudrate=115200
    board_name=beagle_x15
    board_rev=unknown
    board_serial=unknown
    boot_a_script=load ${devtype} ${devnum}:${distro_bootpart} ${scriptaddr} ${prefix}${script}; source ${scriptaddr}
    boot_extlinux=sysboot ${devtype} ${devnum}:${distro_bootpart} any ${scriptaddr} ${prefix}${boot_syslinux_conf}
    boot_fdt=try
    boot_fit=0
    boot_net_usb_start=usb start
    boot_prefixes=/ /boot/
    boot_script_dhcp=boot.scr.uimg
    boot_scripts=boot.scr.uimg boot.scr
    boot_syslinux_conf=extlinux/extlinux.conf
    boot_targets=ti_mmc mmc0 mmc1 pxe dhcp
    bootcmd=mmc dev 0; fatload mmc 0:1 0x82000000 uEnv.txt; env import -t 0x82000000 ; run uenvcmd
    bootcmd_dhcp=devtype=dhcp; run boot_net_usb_start; if dhcp ${scriptaddr} ${boot_script_dhcp}; then source ${scriptaddr}; fi;
    bootcmd_mmc0=devnum=0; run mmc_boot
    bootcmd_mmc1=devnum=1; run mmc_boot
    bootcmd_pxe=run boot_net_usb_start; dhcp; if pxe get; then pxe boot; fi
    bootcmd_ti_mmc= run get_name_kern; run mmcboot
    bootdelay=2
    bootdir=/boot
    bootenvfile=uEnv.txt
    bootm_size=0x10000000
    bootpart=0:2
    bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr}
    console=ttyS2,115200n8
    dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x200;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1
    dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x200;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1
    dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000
    dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000
    dfu_bufsiz=0x10000
    distro_bootcmd=scsi_need_init=; for target in ${boot_targets}; do run bootcmd_${target}; done
    dofastboot=0
    dtboaddr=0x89000000
    emmc_android_boot=setenv mmcdev 1; mmc dev $mmcdev; mmc rescan; if bcb load CONFIG_FASTBOOT_FLASH_MMC_DEV misc; then setenv ardaddr -; if bcb test command = bootonce-bootloader; then echo Android: Bootloader boot...; bcb clear command; bcb store; fastboot 1; exit; elif bcb test command = boot-recovery; then echo Android: Recovery boot...; setenv ardaddr $loadaddr;setenv apart recovery; else echo Android: Normal boot...; setenv ardaddr $loadaddr; setenv apart boot${slot_suffix}; fi; else echo Warning: BCB is corrupted or does not exist; echo Android: Normal boot...; fi; setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv machid fe6; if part start mmc $mmcdev $apart boot_start; then part size mmc $mmcdev $apart boot_size; mmc read $loadaddr $boot_start $boot_size; echo Preparing FDT...; if test $board_name = am57xx_evm_reva3; then echo " Reading DTBO partition..."; part start mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_start; part size mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_size; mmc read ${dtboaddr} ${p_dtbo_start} ${p_dtbo_size}; echo " Reading DTB for AM57x EVM RevA3..."; abootimg get dtb --index=0 dtb_start dtb_size; cp.b $dtb_start $fdtaddr $dtb_size; fdt addr $fdtaddr 0x80000; echo " Applying DTBOs for AM57x EVM RevA3..."; adtimg addr $dtboaddr; adtimg get dt --index=0 dtbo0_addr dtbo0_size; fdt apply $dtbo0_addr; adtimg get dt --index=1 dtbo1_addr dtbo1_size; fdt apply $dtbo1_addr; elif test $board_name = beagle_x15_revc; then echo " Reading DTB for Beagle X15 RevC..."; abootimg get dtb --index=0 dtb_start dtb_size; cp.b $dtb_start $fdtaddr $dtb_size; fdt addr $fdtaddr 0x80000; else echo Error: Android boot is not supported for $board_name; exit; fi; bootm $loadaddr $ardaddr $fdtaddr; else echo $apart partition not found; exit; fi;
    envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi;
    eth2addr=88:01:f9:dc:ba:34
    fdt_addr_r=0x88000000
    fdtaddr=0x88000000
    fdtcontroladdr=fcf37230
    fdtfile=ti/omap/am57xx-beagle-x15.dtb
    fdtoverlay_addr_r=0x89000000
    findfdt=echo WARN: fdtfile already set. Stop using findfdt in script
    finduuid=part uuid mmc 0:2 uuid
    get_fit_config=setexpr name_fit_config gsub "ti/omap/" "" ${fdtfile}
    get_name_kern=if test $boot_fit -eq 1; then setenv bootfile fitImage; else setenv bootfile zImage; fi
    get_overlay_mmc=fdt address ${fdtaddr};fdt resize 0x100000;for overlay in $name_overlays;do;load mmc ${bootpart} ${dtboaddr} ${bootdir}/dtb/${overlay} &&fdt apply ${dtboaddr};done;
    get_overlaystring=for overlay in $name_overlays;do;setenv overlaystring ${overlaystring}'#'${overlay};done;
    importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize}
    kernel_addr_r=0x82000000
    loadaddr=0x82000000
    loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
    loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr
    loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/dtb/${fdtfile}
    loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}
    mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi
    mmcboot=mmc dev ${mmcdev}; devnum=${mmcdev}; devtype=mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run args_mmc; if test ${boot_fit} -eq 1; then run run_fit; else run mmcloados;fi;fi;fi;
    mmcdev=0
    mmcloados=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then run get_overlay_mmc;bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi;
    mmcrootfstype=ext4 rootwait
    name_fdt=ti/omap/am57xx-beagle-x15.dtb
    name_fit=fitImage
    netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp
    netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr}
    netloadfdt=tftp ${fdtaddr} ${fdtfile}
    netloadimage=tftp ${loadaddr} ${bootfile}
    nfsopts=nolock
    partitions=uuid_disk=${uuid_gpt_disk};name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}
    partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2048K,uuid=${uuid_gpt_bootloader};name=uboot-env,start=2432K,size=256K,uuid=${uuid_gpt_reserved};name=misc,size=128K,uuid=${uuid_gpt_misc};name=boot_a,size=20M,uuid=${uuid_gpt_boot_a};name=boot_b,size=20M,uuid=${uuid_gpt_boot_b};name=dtbo_a,size=8M,uuid=${uuid_gpt_dtbo_a};name=dtbo_b,size=8M,uuid=${uuid_gpt_dtbo_b};name=vbmeta_a,size=64K,uuid=${uuid_gpt_vbmeta_a};name=vbmeta_b,size=64K,uuid=${uuid_gpt_vbmeta_b};name=recovery,size=64M,uuid=${uuid_gpt_recovery};name=super,size=2560M,uuid=${uuid_gpt_super};name=metadata,size=16M,uuid=${uuid_gpt_metadata};name=userdata,size=-,uuid=${uuid_gpt_userdata}
    pxefile_addr_r=0x80100000
    ramdisk_addr_r=0x88080000
    rdaddr=0x88080000
    rootpath=/export/rootfs
    run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring}
    scan_dev_for_boot=echo Scanning ${devtype} ${devnum}:${distro_bootpart}...; for prefix in ${boot_prefixes}; do run scan_dev_for_extlinux; run scan_dev_for_scripts; done;
    scan_dev_for_boot_part=part list ${devtype} ${devnum} -bootable devplist; env exists devplist || setenv devplist 1; for distro_bootpart in ${devplist}; do if fstype ${devtype} ${devnum}:${distro_bootpart} bootfstype; then part uuid ${devtype} ${devnum}:${distro_bootpart} distro_bootpart_uuid ; run scan_dev_for_boot; fi; done; setenv devplist
    scan_dev_for_extlinux=if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${boot_syslinux_conf}; then echo Found ${prefix}${boot_syslinux_conf}; run boot_extlinux; echo EXTLINUX FAILED: continuing...; fi
    scan_dev_for_scripts=for script in ${boot_scripts}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${script}; then echo Found U-Boot script ${prefix}${script}; run boot_a_script; echo SCRIPT FAILED: continuing...; fi; done
    scriptaddr=0x80000000
    scsi_boot=run scsi_init; if scsi dev ${devnum}; then devtype=scsi; run scan_dev_for_boot_part; fi
    scsi_init=if ${scsi_need_init}; then scsi_need_init=false; scsi scan; fi
    serial#=190080137f520922
    static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off
    stderr=serial@48020000
    stdin=serial@48020000
    stdout=serial@48020000
    update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}
    usb_boot=usb start; if usb dev ${devnum}; then devtype=usb; run scan_dev_for_boot_part; fi
    usbtty=cdc_acm
    ver=U-Boot 2025.01-g3c06cd621447-dirty (Jun 08 2026 - 18:33:01 +0530)
    vram=16M

    Environment size: 9183/131067 bytes
    =>
    addr_fit=0x90000000
    args_mmc=run finduuid;setenv bootargs console=${console} ${optargs} root=PARTUUID=${uuid} rw rootfstype=${mmcrootfstype}
    baudrate=115200
    board_name=beagle_x15
    board_rev=unknown
    board_serial=unknown
    boot_a_script=load ${devtype} ${devnum}:${distro_bootpart} ${scriptaddr} ${prefix}${script}; source ${scriptaddr}
    boot_extlinux=sysboot ${devtype} ${devnum}:${distro_bootpart} any ${scriptaddr} ${prefix}${boot_syslinux_conf}
    boot_fdt=try
    boot_fit=0
    boot_net_usb_start=usb start
    boot_prefixes=/ /boot/
    boot_script_dhcp=boot.scr.uimg
    boot_scripts=boot.scr.uimg boot.scr
    boot_syslinux_conf=extlinux/extlinux.conf
    boot_targets=ti_mmc mmc0 mmc1 pxe dhcp
    bootcmd=mmc dev 0; fatload mmc 0:1 0x82000000 uEnv.txt; env import -t 0x82000000 ; run uenvcmd
    bootcmd_dhcp=devtype=dhcp; run boot_net_usb_start; if dhcp ${scriptaddr} ${boot_script_dhcp}; then source ${scriptaddr}; fi;
    bootcmd_mmc0=devnum=0; run mmc_boot
    bootcmd_mmc1=devnum=1; run mmc_boot
    bootcmd_pxe=run boot_net_usb_start; dhcp; if pxe get; then pxe boot; fi
    bootcmd_ti_mmc= run get_name_kern; run mmcboot
    bootdelay=2
    bootdir=/boot
    bootenvfile=uEnv.txt
    bootm_size=0x10000000
    bootpart=0:2
    bootscript=echo Running bootscript from mmc${mmcdev} ...; source ${loadaddr}
    console=ttyS2,115200n8
    dfu_alt_info_emmc=rawemmc raw 0 3751936;boot part 1 1;rootfs part 1 2;MLO fat 1 1;MLO.raw raw 0x100 0x200;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 1 1;spl-os-image fat 1 1;u-boot.img fat 1 1;uEnv.txt fat 1 1
    dfu_alt_info_mmc=boot part 0 1;rootfs part 0 2;MLO fat 0 1;MLO.raw raw 0x100 0x200;u-boot.img.raw raw 0x300 0x1000;u-env.raw raw 0x1300 0x200;spl-os-args.raw raw 0x1500 0x200;spl-os-image.raw raw 0x1700 0x6900;spl-os-args fat 0 1;spl-os-image fat 0 1;u-boot.img fat 0 1;uEnv.txt fat 0 1
    dfu_alt_info_qspi=MLO raw 0x0 0x040000;u-boot.img raw 0x040000 0x0100000;u-boot-spl-os raw 0x140000 0x080000;u-boot-env raw 0x1C0000 0x010000;u-boot-env.backup raw 0x1D0000 0x010000;kernel raw 0x1E0000 0x800000
    dfu_alt_info_ram=kernel ram 0x80200000 0x4000000;fdt ram 0x80f80000 0x80000;ramdisk ram 0x81000000 0x4000000
    dfu_bufsiz=0x10000
    distro_bootcmd=scsi_need_init=; for target in ${boot_targets}; do run bootcmd_${target}; done
    dofastboot=0
    dtboaddr=0x89000000
    emmc_android_boot=setenv mmcdev 1; mmc dev $mmcdev; mmc rescan; if bcb load CONFIG_FASTBOOT_FLASH_MMC_DEV misc; then setenv ardaddr -; if bcb test command = bootonce-bootloader; then echo Android: Bootloader boot...; bcb clear command; bcb store; fastboot 1; exit; elif bcb test command = boot-recovery; then echo Android: Recovery boot...; setenv ardaddr $loadaddr;setenv apart recovery; else echo Android: Normal boot...; setenv ardaddr $loadaddr; setenv apart boot${slot_suffix}; fi; else echo Warning: BCB is corrupted or does not exist; echo Android: Normal boot...; fi; setenv eval_bootargs setenv bootargs $bootargs; run eval_bootargs; setenv machid fe6; if part start mmc $mmcdev $apart boot_start; then part size mmc $mmcdev $apart boot_size; mmc read $loadaddr $boot_start $boot_size; echo Preparing FDT...; if test $board_name = am57xx_evm_reva3; then echo " Reading DTBO partition..."; part start mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_start; part size mmc ${mmcdev} dtbo${slot_suffix} p_dtbo_size; mmc read ${dtboaddr} ${p_dtbo_start} ${p_dtbo_size}; echo " Reading DTB for AM57x EVM RevA3..."; abootimg get dtb --index=0 dtb_start dtb_size; cp.b $dtb_start $fdtaddr $dtb_size; fdt addr $fdtaddr 0x80000; echo " Applying DTBOs for AM57x EVM RevA3..."; adtimg addr $dtboaddr; adtimg get dt --index=0 dtbo0_addr dtbo0_size; fdt apply $dtbo0_addr; adtimg get dt --index=1 dtbo1_addr dtbo1_size; fdt apply $dtbo1_addr; elif test $board_name = beagle_x15_revc; then echo " Reading DTB for Beagle X15 RevC..."; abootimg get dtb --index=0 dtb_start dtb_size; cp.b $dtb_start $fdtaddr $dtb_size; fdt addr $fdtaddr 0x80000; else echo Error: Android boot is not supported for $board_name; exit; fi; bootm $loadaddr $ardaddr $fdtaddr; else echo $apart partition not found; exit; fi;
    envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootscript; then run bootscript;else if run loadbootenv; then echo Loaded env from ${bootenvfile};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;fi;fi;
    eth2addr=88:01:f9:dc:ba:34
    fdt_addr_r=0x88000000
    fdtaddr=0x88000000
    fdtcontroladdr=fcf37230
    fdtfile=ti/omap/am57xx-beagle-x15.dtb
    fdtoverlay_addr_r=0x89000000
    findfdt=echo WARN: fdtfile already set. Stop using findfdt in script
    finduuid=part uuid mmc 0:2 uuid
    get_fit_config=setexpr name_fit_config gsub "ti/omap/" "" ${fdtfile}
    get_name_kern=if test $boot_fit -eq 1; then setenv bootfile fitImage; else setenv bootfile zImage; fi
    get_overlay_mmc=fdt address ${fdtaddr};fdt resize 0x100000;for overlay in $name_overlays;do;load mmc ${bootpart} ${dtboaddr} ${bootdir}/dtb/${overlay} &&fdt apply ${dtboaddr};done;
    get_overlaystring=for overlay in $name_overlays;do;setenv overlaystring ${overlaystring}'#'${overlay};done;
    importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize}
    kernel_addr_r=0x82000000
    loadaddr=0x82000000
    loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
    loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr
    loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/dtb/${fdtfile}
    loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}
    mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi
    mmcboot=mmc dev ${mmcdev}; devnum=${mmcdev}; devtype=mmc; if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadimage; then run args_mmc; if test ${boot_fit} -eq 1; then run run_fit; else run mmcloados;fi;fi;fi;
    mmcdev=0
    mmcloados=if test ${boot_fdt} = yes || test ${boot_fdt} = try; then if run loadfdt; then run get_overlay_mmc;bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then bootz; else echo WARN: Cannot load the DT; fi; fi; else bootz; fi;
    mmcrootfstype=ext4 rootwait
    name_fdt=ti/omap/am57xx-beagle-x15.dtb
    name_fit=fitImage
    netargs=setenv bootargs console=${console} ${optargs} root=/dev/nfs nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp
    netboot=echo Booting from network ...; setenv autoload no; dhcp; run netloadimage; run netloadfdt; run netargs; bootz ${loadaddr} - ${fdtaddr}
    netloadfdt=tftp ${fdtaddr} ${fdtfile}
    netloadimage=tftp ${loadaddr} ${bootfile}
    nfsopts=nolock
    partitions=uuid_disk=${uuid_gpt_disk};name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}
    partitions_android=uuid_disk=${uuid_gpt_disk};name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};name=bootloader,size=2048K,uuid=${uuid_gpt_bootloader};name=uboot-env,start=2432K,size=256K,uuid=${uuid_gpt_reserved};name=misc,size=128K,uuid=${uuid_gpt_misc};name=boot_a,size=20M,uuid=${uuid_gpt_boot_a};name=boot_b,size=20M,uuid=${uuid_gpt_boot_b};name=dtbo_a,size=8M,uuid=${uuid_gpt_dtbo_a};name=dtbo_b,size=8M,uuid=${uuid_gpt_dtbo_b};name=vbmeta_a,size=64K,uuid=${uuid_gpt_vbmeta_a};name=vbmeta_b,size=64K,uuid=${uuid_gpt_vbmeta_b};name=recovery,size=64M,uuid=${uuid_gpt_recovery};name=super,size=2560M,uuid=${uuid_gpt_super};name=metadata,size=16M,uuid=${uuid_gpt_metadata};name=userdata,size=-,uuid=${uuid_gpt_userdata}
    pxefile_addr_r=0x80100000
    ramdisk_addr_r=0x88080000
    rdaddr=0x88080000
    rootpath=/export/rootfs
    run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring}
    scan_dev_for_boot=echo Scanning ${devtype} ${devnum}:${distro_bootpart}...; for prefix in ${boot_prefixes}; do run scan_dev_for_extlinux; run scan_dev_for_scripts; done;
    scan_dev_for_boot_part=part list ${devtype} ${devnum} -bootable devplist; env exists devplist || setenv devplist 1; for distro_bootpart in ${devplist}; do if fstype ${devtype} ${devnum}:${distro_bootpart} bootfstype; then part uuid ${devtype} ${devnum}:${distro_bootpart} distro_bootpart_uuid ; run scan_dev_for_boot; fi; done; setenv devplist
    scan_dev_for_extlinux=if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${boot_syslinux_conf}; then echo Found ${prefix}${boot_syslinux_conf}; run boot_extlinux; echo EXTLINUX FAILED: continuing...; fi
    scan_dev_for_scripts=for script in ${boot_scripts}; do if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}${script}; then echo Found U-Boot script ${prefix}${script}; run boot_a_script; echo SCRIPT FAILED: continuing...; fi; done
    scriptaddr=0x80000000
    scsi_boot=run scsi_init; if scsi dev ${devnum}; then devtype=scsi; run scan_dev_for_boot_part; fi
    scsi_init=if ${scsi_need_init}; then scsi_need_init=false; scsi scan; fi
    serial#=190080137f520922
    static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off
    stderr=serial@48020000
    stdin=serial@48020000
    stdout=serial@48020000
    update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}
    usb_boot=usb start; if usb dev ${devnum}; then devtype=usb; run scan_dev_for_boot_part; fi
    usbtty=cdc_acm
    ver=U-Boot 2025.01-g3c06cd621447-dirty (Jun 08 2026 - 18:33:01 +0530)
    vram=16M

    Environment size: 9183/131067 bytes
    => bdinfo
    boot_params = 0x80000100
    DRAM bank = 0x00000000
    -> start = 0x80000000
    -> size = 0x7f000000
    flashstart = 0x00000000
    flashsize = 0x00000000
    flashoffset = 0x00000000
    baudrate = 115200 bps
    relocaddr = 0xfef7b000
    reloc off = 0x7e77b000
    Build = 32-bit
    current eth = ethernet@48484000
    eth2addr = 88:01:f9:dc:ba:34
    IP addr = <NULL>
    fdt_blob = 0xfcf37230
    lmb_dump_all:
    memory.count = 0x1
    memory[0] [0x80000000-0xfeffffff], 0x7f000000 bytes, flags: none
    reserved.count = 0x4
    reserved[0] [0x95700000-0x9577ffff], 0x80000 bytes, flags: no-map
    reserved[1] [0x95800000-0x98ffffff], 0x3800000 bytes, flags: no-overwrite
    reserved[2] [0x9d000000-0x9effffff], 0x2000000 bytes, flags: no-overwrite
    reserved[3] [0xfbf37210-0xfeffffff], 0x30c8df0 bytes, flags: no-overwrite
    devicetree = separate
    serial addr = 0x48020000
    width = 0x00000000
    shift = 0x00000002
    offset = 0x00000000
    clock = 0x02dc6c00
    arch_number = 0x00000000
    TLB addr = 0xfeff0000
    irq_sp = 0xfcf37220
    sp start = 0xfcf37210
    Early malloc usage: 5c4 / 2000

  • Hi Josue Zamitiz-Ayala (6554783) 

    Please look into this matter.its needed to be resolved.

  • Hello Hanmant,

    I just returned from a business trip and I will be delayed in catching up with your thread.

    Thank you for your patience.

    -Josue

  • Josue,

    I understand but this needs to be resolved ASAP.