Part Number: AM2434
Other Parts Discussed in Thread: SYSCONFIG
Hi,
What registers need to be configured to make GPMC0_CLK pin to output a continuous clock signal? I would like to have a continuous clock running at the GPMC interface clock frequency for an FPGA. Do I only need to set Mux mode to 4 for the PADCONFIG31 register? Or is there any additional modification that I must make? Thank you so much.
