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Looking at the latest (Feb 2012) TRM, it states:
9.1.5.1 Subsystem Clocking
The 3 port switch (3PSW) Ethernet Subsystem clocks are derived from SATA SERDES PLL.
The SATA SERDES provides reference clocks to the modules G/MII (125 MHz), RMII (50 MHz), RGMII
(50 MHz) and RGMII (5 MHz) as shown in Figure 9-2.
But Fig. 9-2 does not show a 50MHz clock going from the SATA PLL to the RGMII?.
-steve
Hi,
EMAC boot has been validated on DM814x and details can be found at
http://processors.wiki.ti.com/index.php/TI81XX_PSP_EMAC_Boot
Regards,
Nageswari
Hi Nageswari
We don't see that the EMAC ROM boot mode works.
We have the following EVM setup:
Network cable connected to J14, associated with RGMII0
BM setting
0 1 \
1 1 |
2 1 > EMAC-MMC-SPI-XIP
3 0 |
4 0 /
10 0
11 0
12 0
13 0
14 0
15 0
5 0
9 1 \ RGMII
8 0 /
7 0
6 0
Host sees link up at 1Gb/s
We see no packets, then after about 60s delay, the EVM boots from MMC.
Can you confirm that this is correct, the EMAC ROM boot mode does not work in silicon PG2.1?.
thanks
steve
I note that your boot order has EMAC first. Have you read Advisory 2.1.21 in the erratta? ( http://www.ti.com/lit/er/sprz343/sprz343.pdf ) It recommends putting the UART before the EMAC to give the phy an extra 3 seconds to do its thing. The good news is that the fix implies that EMAC boot can work.
You're gonna want to check out the eratta for the 'DM8168 too. It's newer, and contains some real doozies that probably apply to the 'DM8148. ( http://www.ti.com/lit/er/sprz329b/sprz329b.pdf ).
Links are provided for convenience. Using the links on the product pages will insure that you get the current versions of the eratta.
Advisory 2.0.18 in the 'DM816x eratta also discusses concerns with EMAC_TXCLK on that part. The eratta for the two parts are quite different, and the MAC implementations are different too, but there might be a clue for you.
Hi Herb
Thanks for your tips. We have tried the following settings:
10111 -> mmc,spi,uart,emac
and still see no BOOTP messages from the DM8148 EVM.
The fact that I have seen no one comment that "Yes, my EVM has working ROM EMAC boot" makes me suspicious.
-steve
Well, we got our own prototype h/w to send out ROM BOOTP messages by connecting it to a Gb link.
For some reason the 100Mbit link does not work. Probably one of those pesky erratas.
Still a mystery why the DM8148 EVM does not work in EMAC ROM boot.
-steve
Steve,
EMAC ROM boot on the DM8148 EVM does work but only in 100Mb mode.
The PHY used on the EVM incorrectly reports the maximum link speed in its Control register as only 100Mbps rather than 1Gbps.
Thus the romcode configures the system to run at 100Mbps whereas the actual link speed is 1Gbps.
Connecting the EVM to 10/100 switch or hub does work around this issue and allow the EMAC Boot to work.
Benoit Parrot said:EMAC ROM boot on the DM8148 EVM does work but only in 100Mb mode.
The PHY used on the EVM incorrectly reports the maximum link speed in its Control register as only 100Mbps rather than 1Gbps.
Thus the romcode configures the system to run at 100Mbps whereas the actual link speed is 1Gbps.
Are there plans to fix this in future silicon? It'd be nice if the ROM code properly read the LPA register rather then the control register.
This issue stung me as well @ http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/170318.aspx
Kyle,
As Gaurav mentioned in related thread this has been fixed in the more recent devices with the same switch, but there are currently no ROM re-spin planned to address this issue on DM814x/AM387x devices.
Benoit Parrot said:As Gaurav mentioned in related thread this has been fixed in the more recent devices with the same switch, but there are currently no ROM re-spin planned to address this issue on DM814x/AM387x devices.
Kyle,
We are working on its DS and TRM. The draft version should be avail with NDA by end of this month.
BR,
Viet