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Original question:

TDA4VEN-Q1: MCSPI1 IOSET

TDA4VE-Q1: SPI IOSET

Alice Liao
Prodigy 130 points

Part Number: TDA4VE-Q1
Other Parts Discussed in Thread: SYSCONFIG,

Hi Ti experts,

Does the following configuration satisfy the IOSET restrictions?

Since SysConfig doesn't show any information regarding IOSETs, where else can I find reference materials for IOSET besides SysConfig? 

1.

image.png

2.

image.png

Thanks a lot!!

Alice

  • 0
    TI__Expert 8080 points

    Hi Alice,

    SPI0 through SPI7 instances in the MAIN domain do not have multiple pinmuxing configurations; thus, there is no need to consider IOSET for them.

    In case you are using MCU_SPI0 or MCU_SPI1, the IOSET information can be found in the TDA4VE-Q1 datasheet. The tables are named MCU_SPI0 IOSETs and MCU_SPI1 IOSET. 

    Thanks and regards,
    Mark