hi ,
everyone
who can tell me how to change the clock of the DDR3 on the evm board of DM8168?
When I set the u-boot as flowers:
In arch/arm/include/asm/arch-ti81xx/clocks_ti816x.h which is in /ti-ezsdk_dm816x-evm_5_03_00_09/board support/u-boot-2010.06-psp04.00.01.13.patch1,
I add the #define shown below as appropriate
#define DDR_PLL_675 /* Values supported 400,531,675,796 */
In arch/arm/include/asm/arch-ti81xx/ddr_defs_ti816x.h which is in /ti-ezsdk_dm816x-evm_5_03_00_09/board support/u-boot-2010.06-psp04.00.01.13.patch1,
I add the #define shown below as appropriate
[...]
#ifdef CONFIG_TI816X_EVM_DDR3
#define CONFIG_TI816X_DDR3_675 /* Values supported 400,531,675,796 */
#define CONFIG_TI816X_DDR3_SW_LEVELING /* Enable software leveling as part of DDR3 init */
[...]
The Serial print "DDR clk: 675MHz " ,but actually t the measuring of the DDR CLK is 796MHZ usingoscilloscope,
and the value of the DDR PLL Control Registers is corresponding to 796MHZ。
