Original question:
Part Number: AM620-Q1
HI Team ,
We are doing custome board design on the AM620-Q1 processor .
In design , we consider the UART is the primary boot mode and with UART will flash the small portion of uBoot file in to the flash memory.
Once Uboot is avaliable with help of RGMII2 interface will flash/ transfer the main OS in the the eMMC memory.
is this solution is workable in the AM620-Q1 ?
Hello Shubham Vadnal,
Thank you for your query !
I may need to discuss internally regarding the appropriate U-Boot image and eMMC flasher for larger images over Ethernet.
Would you please let me know which AM62x Linux SDK version do you plan to use ?
I have few comments hardware point of view:
The MAC RGMII2 hardware interface should be normally operable as soon as:
A MDIO workaround is added (not needed if fix already available through the SDK MDIO manual driver) according to the AM62x Silicon Errata i2329 advisory note applicable to both AM62x SoC Silicon Revisions 1.0 and 1.1.
After U-Boot software was booted by the U-Boot SPL, the TX_CLK should be internally delayed from TX_TD[3:0] with >1.2ns (RGMII minimal output setup time) by the CPSW3g MAC. The delay is enabled by default (upon AM620-Q1 power-on reset) in the AM620-Q1 CPSW controller. The Ethernet PHY itself shall be bootstrapped or MDIO configured to add a delay ONLY between the RX_TD[3:0] and RX_CLK - i.e. only on the AM620-Q1 RGMII2 RX receive path. The AM620-Q1 CPSW3g does not insert delay on the RGMII2 RX path (default - upon PoR).
Looking forward to your answer regarding the SDK !
Best Regards,
Anastas Yordanov
