• State Resolved
  • Replies 4 replies
  • Subscribers 97 subscribers
  • Views 55 views
  • Users 0 members are here
Support feedback
Options
Options
Related

AM2432: route DC_Sync0 to pin

Alexander Hänel-Baas
Prodigy 190 points

Part Number: AM2432
Other Parts Discussed in Thread: LP-AM243, SYSCONFIG

Hello,

How can I route the EtherCat Sync pulse to a pin so

that I can use an oscilloscope to measure?

I want to see the DC_Sync0 of the EtherCat bus cycle.

I'm using the launchpad with the booster pack. 

image.png

 

Regards,

Alexander

  • 0
    TI__Expert 3650 points

    Hello Alexander,

    Connect your oscilloscope to Pin J7.3 on the LP-AM243 LaunchPad. This exposes the PRG1_IEP0_EDC_SYNC_OUT0 signal, which is the hardware EtherCAT Distributed Clock SYNC0 output.

    Steps:

    • Connect your oscilloscope probe tip to J7.3 and ground clip to a nearby GND pin.
    • Run your EtherCAT slave application with Distributed Clock enabled.
    • You should see a periodic pulse train matching your configured DC cycle time (e.g., a 50 µs period for a 20 kHz cycle).
    • SysConfig / Pinmux: Ensure PRG1_IEP0_EDC_SYNC_OUT0 is enabled and correctly pinmuxed in your SysConfig file. This signal is the recommended SYNC0 output for DC-capable EtherCAT SubDevices per the EtherCAT SubDevice FWHAL Hardware Requirements.

    If you also want to verify synchronization at the software level, you can add a GPIO toggle inside the EC_SLV_app_SS_applicationRun() callback and measure it on any available GPIO test point. The toggle period should match your DC cycle time exactly.

    You could review this thread:
    AM2432: DC Sync Error Occurred on TI EtherCAT Stack

    Best Regards,

    Borislav Lazarkov

  • 0 in reply to Borislav Lazarkov
    Prodigy 190 points

    Hi Borislav,

    Thank you very much for your quick answer.

    I now toggle a GPIO pin in the routine EC_SLV_APP_CIA_applicationRun(). Thank you very much for the tip!

    On this pin I can now read the set DC sync time. My cycle time is 4ms in the PLC.

    On pin J7.3 as you described, however, there is always 20 kHz.

    Where do they come from?

    BR

    Alexander

  • 0 in reply to Alexander Hänel-Baas
    TI__Expert 3650 points

    Hello Alexander,

    The PRG1_IEP0_EDC_SYNC_OUT0 pin outputs the raw hardware DC_SYNC0 pulse generated by the IEP (Industrial Ethernet Peripheral) timer inside the ICSSG. This is a hardware-level synchronization pulse, it is not the same as your application cycle time.

    The SYNC0 pulse period on J7.3 is determined by the EtherCAT Distributed Clock cycle time configured in TwinCAT (or your EtherCAT master), not your PLC task cycle time. These are two independent settings:

    Signal

    Source

    Period

    J7.3 (EDC_SYNC_OUT0)

    EtherCAT DC cycle (IEP timer)

    50 µs (20 kHz) — TwinCAT default

    GPIO toggle in EC_SLV_APP_CIA_applicationRun()

    PLC task cycle

    4 ms (your configured value)

    The 50 µs / 20 kHz is the default EtherCAT DC synchronization interval configured in TwinCAT under:

    DC → Advanced Settings → Distributed Clocks → SYNC 0 Cycle Time

    This is the rate at which the EtherCAT master sends synchronization events to keep all slaves in lock-step. Your application callback (EC_SLV_APP_CIA_applicationRun()) may only be called every 4 ms (e.g., every 80th SYNC0 event), but the hardware SYNC0 pulse itself still fires every 50 µs.

     Best Regards,

    Borislav Lazarkov

  • 0 in reply to Borislav Lazarkov
    Prodigy 190 points

    I understand. Thank you very much for the explanation.

    BR Alexander