C674x No access to L2 RAM through global addresses

Joachim Siegler

Other Parts Discussed in Thread: OMAPL138

Hi TI-Community,

I'm using a DRx62x system that includes a C674x and I'm trying to access the L2 RAM (128 kByte IRAM, 128 kByte Cache) through the global address space. As mentioned here, that should work.

C674x memory map, from SPRS778A:
-------------------------------------------------------------------------------------------------------
Table2-5. MMU Bypassed C674x DSP Memory Map
0x0080_0000 C674x Level2 (L2) Cache / RAM -> local address

0x4080_0000 C674x Level2 (L2) Cache / RAM -> global address
-------------------------------------------------------------------------------------------------------

When I access the IRAM through the local address (0x0080 0000), I can read/write data without problems as expected. But when I try the same through the global address (0x4080 0000) I'm not able to write/read data. I confused by the fact, that the ARM processor of the DRx62x is able to access the IRAM through this global address.

I tested the following (that's also my use case):
1. ARM processor writes some data to DSP's IRAM
2. DSP can read these data through the local address space (0x0080 0000)
3. DSP can NOT read these data through the global address space (0x4080 0000)

Because of the global address (0x4080 0000) for the L2 RAM is only mentioned in the Table 2.5 (that describes the C674x memory map for the case that the MMU is bypassed) I bypassed the MMU for the DSP by setting the MMU_CFG register (0x4814 0000 + 0x610) in the Control Module (SPRUHF4A Chapter 3) to 0x8C. But the problem is still the same.

Who can I access the DSP's L2 RAM through the global address space with the DSP?

Regards
Jo

over 13 years ago

0 Rahul Prabhu over 13 years ago

TI__Guru** 116170 points

Jo,

I am not able to find any of the lit numbers or the DRx62x system that you have mentioned in your post when I do search on google or ti.com. Could you provide links to the documents you are refering to. You have posted on the OMAPL forum and both OMAPL137 or OMAPL138 do not have the global memory map that you have described. The global address for DSP L2 on OMAPL devices starts at 0x1180 0000.

I am wondering if you are refering to the C674x on the DM81XX(DM814x, DM816x) devices which has a memory map that you have described. I came across this issue some time back and had reported this on the forums. Please refer to the following forum post where I had reported this issue of mismatch in memory maps and how to work around them.

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/145751.aspx

I will respond back if this is not the device you were refering to.

Regards,

Rahul

0 Joachim Siegler over 13 years ago in reply to Rahul Prabhu

Intellectual 765 points

Rahul,

thanks for you response. As you mentioned the SoC is a more a cousin of an DM816x. So, could please move this thread into the correct forum or should I create a new one? Furthermore the documents that belongs to this SoC are not public available.

Thanks also for the link, with the help of this post I figured out, that my SoC also has got this C674x Internal Global Address. But what does it mean "Internal Global Address"? Is there anything special?

But Actually, I would like to access DSP's L2 RAM from the DSP through the global address as all other peripherals do. Is there a way to do that?

C674x memory map, from SPRS778A, added internal global address:
-------------------------------------------------------------------------------------------------------
Table2-5. MMU Bypassed C674x DSP Memory Map
0x0080_0000 C674x Level2 (L2) Cache / RAM -> local address
0x1080_0000 C674x Level2 (L2) Cache / RAM -> internal global address
0x4080_0000 C674x Level2 (L2) Cache / RAM -> global address
-------------------------------------------------------------------------------------------------------

Regards
Jo

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C674x No access to L2 RAM through global addresses