Syslink (MessageQ) and EDMA3 LLD issue

Ben9619

I am having an issue with a DM8168 DSP application using both MessageQ and the EDMA LLD. I have an HWI setup which when a GPIO line goes high triggers an EDMA transfer from the GPMC to a buffer in DDR3. After a number of these transfers the EDMA3 callback function signals a task that a frame of data is ready to process amd ultimately pass to the ARM using a MessageQ.

What I found is that the EDMA appears to get blocked by the DSP to ARM transfer when it occurs. Does the MessageQ take priority over an HWI triggered EDMA? And if so is there a way to change the priority level of the MessageQ transfer?

over 12 years ago

0 Steven Connell over 12 years ago

TI__Mastermind 45025 points

Hi Ben9619,

Which version of BIOS, EDMA3 and PSP drivers (if any) are you using?

Thanks,

Steve

0 Ben9619 over 12 years ago in reply to Steven Connell

Intellectual 330 points

I'm using:

BIOS 6.33.02.31

EDMA3 LLD 2.11.06.01

IPC 1.24.02.27

Syslink 2.10.03.20

PSP 4.04.00.01

0 Steven Connell over 12 years ago in reply to Ben9619

TI__Mastermind 45025 points

What memory region are you allocating your MessageQ messages? Is it internal or external memory? Maybe there's an access conflict with the EDMA and MessageQ reading/writing to the same memory ... just a guess...

I know that MessageQ get/put APIs post on semaphores, so that could be what is happening.

I see the following in the MessageQ API documentation:

"In a multiple processor system, MessageQ communicates to other processors via ti.sdo.ipc.interfaces.IMessageQTransport instances. MessageQ supports a high priority and a normal priority transport between any two processors. The IMessageQTransport instances are created via the SetupTransportProxy. The instances are responsible for registering themselves with MessageQ. This is accomplished via the registerTransport function"

So, the priority of the transfers is configurable.

Steve

Processors

Processors forum

Syslink (MessageQ) and EDMA3 LLD issue