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Rebuilding IBL

Hi, 

I am currently having trouble rebuilding IBL.

I downloaded MinGW because I am building IBL on a microsoft machine.

I added C:\MinGW\msys\1.0\bin and C:\MinGW\bin to my system variables path.

I updated the setupenvMsys.sh: C6X_BASE_DIR='"C:/ti/ccsv5/tools/compiler/c6000_7.3.9"'

I updated the setupenvMsys.sh: C6X_BASE_DIR_MSYS=/c/ti/ccsv5/tools/compiler/C6000_7.3.9

I modified device.c ibl_t c6657_ibl_config(void) function, changing

ibl.bootModes[1].u.nandBoot.bootFormat= ibl_BOOT_FORMAT_BBLOB

to

ibl.bootModes[1].u.nandBoot.bootFormat = ibl_BOOT_FORMAT_ELF;

I type: make evm_c6657_i2c ENDIAN=little I2C_BUS_ADDR=0x51 in the boot_loader\ibl\src\make dir and I receive Error 2 "the system can not find the file specified" It is referring to ethboot.c

 

  • Hi Will,

    Would it be possible for you to post the console log from your build attempt?

    Alternatively, if you are only changing the NAND boot format, you can also use i2cConfig.gel and i2cparam_0x51_c66xx_[le/be]_0x500.out in the ibl/src/make/bin folder. You can make this change directly without having to rebuild or reflash the IBL. Make your changes in the GEL file and refer to "Updating EEPROM Images" in the User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide#Updating_EEPROM_Images). Follow the directions after step 9 to load in your updated config.

    -Ivan
  • Hi Ivan,

      So you are saying to leave the ibl the way it is.  Change the i2cConfig.gel file from ibl.bootModes[1].u.nandBoot.bootFormat = ibl_BOOT_FORMAT_BBLOB to ibl.bootModes[1].u.nandBoot.bootFormat = ibl_BOOT_FORMAT_ELF.  Then run the next five steps after step 9 from the updating eeprom images wiki?  By modifying the .gel file I can simply rename my application .out file and load it to NAND using the NAND flash utility in mcsdk?

    Will

  • Hi Will,

    Yes, the i2cparam program should just directly change the boot param table in EEPROM according to the GEL file. You should be able to boot an ELF program from NAND afterwards.

    Let me know if you run into any issues in doing so.

    -Ivan

  • Hi Ivan,

      So I modified line 1311 which replaced the BBLOB to ELF.  I then followed steps 1-3 and the following 2 steps found on the wiki page.  There was no indication that when I ran the EVM c6657 IBL" -> setConfig_c6657_main that anything happened.  I then hit return and everything completed without fail.  I then took my file SADAR_C0.out and renamed it SADAR_C0.bin.  I changed the file name in nand_writer_input.txt to match my filename.  I then imported the nandwriter_evmc6657l project and ran it.  It programmed 4.5 Meg of NAND.  My application is an ethernet based app but I simply did a while 1 loop toggling gpio 14 with a delay of 1 second between toggles.  I set my dip switches on the evm to off off on off on off on on and on on on off on on on on.  I re-powered the board and all I see is a solid line at 1.8V.  it acts like the code didn't load to toggle the gpio

  • Hi Ivan,

      Attached is my console log when I try to rebuild the ibl.

    5751.cmdOutput.TXT

     

    Any help would be greatly appreciated.

    Thanks,

    Will

  • Will,

    I just tested the i2cparam+GEL file approach and was able to boot HUA from NAND. However, I used a C6678. I suspect there may be something odd happening in the C6657 NAND boot (the NAND itself is different).

    I'll track down a C6657 and get back to you as soon as I can. Sorry for this delay.

    -Ivan

  • Will,

    I was able to do the same procedure and boot HUA from NAND using a C6657. I was also able to rebuild the IBL without any errors. I'm going to need a little bit more information from you to see what is different on your setup:

    1. Does your application use L2SRAM? Remember that IBL will run in L2; if you overwrite the area where IBL runs before it branches to your application, it will not work.
    2. When your NAND boot failed, where is the PC of Core0 at? Were you still able to see the "IBL: Booting from NAND" message on UART?
    3. Can you try loading and booting your application from NOR? If it works, then the NAND bootFormat parameter may not have updated correctly.
    4. [On rebuilding IBL] Did you source setupenvMsys.sh before calling make? Bash PATHs are also case-sensitive - is your CGT directory c6000_7.3.9 or C6000_7.3.9?
    -Ivan
  • Hi Ivan,

      Yes I am using L2 for code.  So I need to put all code in DDR in order to use IBL?  What other options are there if I wan't to keep using L2 for code.  I can't use the the boot from NOR because I had to modify the evm to access CS0 to use for SPI because CS1 is not usable.  I do not have a console opened to see the message booting from nand over the uart.  I will put all the code in DDR3 and see if it works. 

    Will

  • Will,

    One of the tricks that we did, as in the case of HUA demo, was that we shifted the code in L2SRAM by 0x20000. The new base address for L2SRAM becomes 0x00820000. Granted, this is not elegant, but will protect the space where IBL runs.

    Let me know if running from DDR3 makes a difference for you.

    -Ivan

  • Hi Ivan

      So I put all code in DDR only updating the .gel file and my code does not load on boot.  Can you post the i2crom_0x51_c6657le.bin file because I still can't rebuild it.  I get the error.  I will try loading the .out file and see if that works. 

    Thanks,

    Will

  • Will,

    Were you able to connect to Core0 after the fail boot to see where the Program Counter is at? 

    [On rebuilding IBL]: I would much prefer if we figure out your build issues than me providing the custom builds. Would you be able to post your entire ibl directory and your shell's PATH here? I have provided my build here, so as to not hinder your development cycle. 

    5582.custom_c6657_le.zip

    -Ivan

  • Hi Ivan

     Attached is my ibl dir.  It was not moved.  It was created by the mcsdk 2_01_02_05.

    7725.ibl.zip

  • Hi Ivan,

      Any updates?  So I took your file and loaded it to the EEPROM.  My 6657 still does not boot via NAND.  I have also updated my FPGA to v3.  I don't know if that makes a difference.  What else could be possibly wrong?

    Thanks,

    Will

  • Will,

    I was able to build the ibl from your previous post after I revert the changes you made to the makefile. If you want to debug this further, I will need to know your shell env variables.

    Check if your updated FPGA redirects to ibl; if it does not, the DDR might not be set up properly.

    Would it be possible to post your project here? I can't gaurantee a quick respond due to the holidays, but I can ask a colleague to verify that your application does boot.

    –Ivan

  • Ivan,

      Are the shell env variables just the PATH system variables?  Attached is a zip of my entire project.  I have set it up to toggle GPIO14 which is PIN 78 on the EVM.  The FPGA update was taken from einfochips website for the 6657 support.  My steps were from the BIOS MCSDK 2.0 Updating EEPROM Images steps 1-14.  Am I supposed to do anything else to get the IBL boot working?  When programming the NAND all I did was rename by .out file to .bin.  IS this correct or do I need to run any tools to convert from .out to .bin?

    Will

    6330.SADAR_C0.zip

  • Hi Ivan,

      So I finally got my code working.  I assumed that the writing code for both eeprom and nand was automatically writing the app.bin files into internal memory.  I followed the BIOS MCSDK2.0 updating eeprom images step by step and followed the steps in loading memory at specific locations and by doing this everything works.  I am sorry I assumed the code was loaded into memory through the code.

    Thanks,

    Will

  • Hi Will,

    I apologize for a delayed response, but I am very happy to know that you got your code working. If there was any documentation or procedure that confused you, please let us know and we'll work on clarifying it in future releases.

    -Ivan