SRIO Dio example for DDR3

Young jo Bang

Hi,

I'm user of TI 6670. I tried to run "SRIO_LoopbackDioIsrexampleproject" in pdk_C6670_1_0_0_17 folder. It works well onL2SRAM but once I change L2 to DDR3 it doesn't work.

            /* Populate the DIO Address Information where the data is to be sent. */
            to.dio.rapidIOMSB    = 0x0;
            to.dio.rapidIOLSB    = (uint32_t)&dstDataBufPtr[srcDstBufIdx][0];
            to.dio.dstID         = DEVICE_ID4_16BIT;
            to.dio.ttype         = dio_ttype;
            to.dio.ftype         = dio_ftype;

            /* Send the DIO Information. */
            if (Srio_sockSend_DIO (srioSocket[sockIdx], srcDataBufPtr[srcDstBufIdx], SIZE_DIO_PACKET, (Srio_SockAddrInfo*)&to) < 0)
            {
                System_printf ("Debug(Core %d): DIO Socket Example Failed\n", coreNum);
                return -1;
            }

When dio_ttype is "Srio_Ftype_WRITE" there is no problem for DDR3. but when dio_ttype is "Srio_Ftype_REQUEST", all contents of dstDataBufPtr are always 0s.

I read previous Q&A (http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/215645.aspx) similar to this problem. but I want to know how to solve this problem in detail.

Thanks,

Youngjo

over 12 years ago

0 Alberto Chessa over 12 years ago

Mastermind 6670 points

Hi,

Both WRITE/NWRITE and REQUEST/NREAD seem to work to me but I use my driver, not the PDK one.

I think my driver is very similar to the PDK. With it, a REQUEST read from the DIO operation address (to.dio.rapidIOMSB/LSB) to the buffer passed as argument to the send call.

If the PDK works the same, I expect to find the dstDataBufPtr copyed into srcDataBufPtr, that is source and destination are "inverted" respect to the WRITE operation.

0 Young jo Bang over 12 years ago in reply to Alberto Chessa

Prodigy 50 points

Hi, Aberto

Thanks for your comments. by the way, are you sure to run your code using DDR3 memory? I just memory alloced to DDR3 istead of L2 in example project and run, but It didn't work. it works well when I memory alloc to L2.

0 Alexey Naydenov over 12 years ago

Intellectual 420 points

I don't think that the example synchronizes cache. I would check that cache synchronization works. Also check if DDR works at all by reading and writing (better find some standard memcheck functions).

0 Elush Shirazpour over 12 years ago in reply to Alexey Naydenov

TI__Intellectual 2790 points

Young

Please take a look at this E2E, which should answer your question.

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/222479/783341.aspx#783341

Elush Shirazpour

Processors

Processors forum

SRIO Dio example for DDR3