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C6657 using EDMA3 for UART receive.

SGQ
Expert 2875 points

Hi,

I am implementing EDMA3 with UART receive.   I just need EDMA3 to move UART received data to a circular buffer.  Software will take data out.  No interrupts.

After I setting up the EDMA3 with the UART Rx, I typed a few characters on the Hyper Terminal.  The EDMA3 does not move data at all. 

I used the platform_test's uart code to initialize UART peripherial.

This is my EDMA PaRAM entry settings.  I followed EDMA3 Controller User Guide, SPRUG55A, 3.4.1 Non-bursting Peripherals.

void EDMA3_UART_RX_Setup()

{

CSL_TPCC_ParamsetRegs   *edma3_ptr = (CSL_TPCC_ParamsetRegs*)EDMA3_CH_ADDR(EDMA_PARAM_TABLE_NUM_URX0);  

edma3_ptr->OPT = CSL_EDMA3_OPT_MAKE(       

0, //FALSE, // itcchEn       

0, //FALSE, // tcchEn       

0, //INTMDT_XFR_COMPLETE_INT_DISABLE, // itcintEn       

1, //XFR_COMPLETE_INT_ENABLE,   // icintEn       

4, //CSL_TPCC2_URXEVT,      // tcc       

0, //CSL_EDMA3_TCC_NORMAL,    // tccMode       

0, //CSL_EDMA3_FIFOWIDTH_NONE,   // fwid       

0, //FALSE,        // stat       

0, //CSL_EDMA3_SYNC_A,     // syncDim       

0, //CSL_EDMA3_ADDRMODE_INCR,   // dam       

0 //CSL_EDMA3_ADDRMODE_INCR    // sam       );

  edma3_ptr->SRC = CSL_UART_REGS;

  edma3_ptr->A_B_CNT = CSL_EDMA3_CNT_MAKE(1, RX_BUFFER_SIZE);

  edma3_ptr->DST = (Uint32)global_address((Uint32)&Rx_Cir_Buf[0]);

  edma3_ptr->SRC_DST_BIDX = CSL_EDMA3_BIDX_MAKE(1, 0);

  edma3_ptr->LINK_BCNTRLD = CSL_EDMA3_LINKBCNTRLD_MAKE(0xFFFF, 0);

  edma3_ptr->SRC_DST_CIDX = CSL_EDMA3_CIDX_MAKE(0, 0);

  edma3_ptr->CCNT = 1;

 }

 

My UART0 settings are here.  It is setup by calling UartInit() in C:\ti\pdk_C6657_1_1_2_5\packages\ti\platform\evmc6657l\platform_lib\src\evmc665x_uart.c.

What might be my problems?  I have a feeling that my EDMA3 does not get UART's receive event.

Thank you for your time.

Regards,

Steve

  • 0
    TI__Intellectual 1585 points

    Hey Steve,

    So obviously since you're looking at the original example init functions, you've got that possibility covered!

    Lets look at the register value you put here. What exactly is the 0x0227441C0 value? That's in your shadow region (shown in table 4-1 of the EDMA user guide), but I don't have definition for that particular address in the userguide. I would check the event register addresses in the EDMA (offset x1000-1058) to see that the event is being seen by the EDMA first to make sure that the EDMA is getting interrupts at all from the UART.

      So, for the DMA to talk to the EDMA you have to have the DMA MODE1 bit enabled in your FCR register (UART offset 8h, bit 3).  you have C4h which is 11000100, so your third bit isn't enabled. You need to fix that to get it to communicate. So, you always want to write a 1 to this bit, and after a hardware reset, change the  bit from 0 to 1. You can read more about this in the user guide with the FCR register description.

     

    Feel free to ask again if you have any issues!

    Kat Kelsch

  • 0 in reply to Katherine Kelsch
    Expert 2875 points

    Hi Kat,

    0x227441C0 is EDMA3's PaRAM entry.  The definition is in EDMA3 user guide 2.3.1 PaRAM Set.

    Regarding Event Register at offset 0x1000, I saw 0x00000020.  Bit 5 is set, which is UTXEVT (UART Tx Event).  But I am expecting bit 4, URXEVT (UART Rx Event), which is not set.  Even I hit some keys in Hyperterminal.  I did set DMA MODE1 bit in FCR of UART0.  Since FCR is write only register, its value is not displayed in UART offset 8h.

    Thank you.

    Steve

  • 0 in reply to SGQ
    TI__Intellectual 1585 points

    Hi Steve,

    Ah okay, gotcha. 

    So one of things I noticed is that you have a Over run error and a parity error set to high in your LSR register (value 0x63), your transmitter FIFO is empty and shifted to the TSR, and that the THR and TSR are both empty (according to  TEMT bit). I have you giving a 8 bit word for space, but it seems that it's over running your data even though you gave it the max amount of room. But the parity error worries me because you don't have parity enabled.  

    I also notice this e2e forum post  which seem similar to your trouble. They were able to fix it tto instead of using the URXEVT he used the UART interrupt event #148. To quote the poster, "The receive data event (RDAINT) along with other UART interrupt requests are connected to that single interrupt event, which is forward to chip-level interrupt controller event #148 and then to CPU".  More on that link here: http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/205473.aspx .

     

     There is also this one on how to setup interrupts for the UART. I didn't include it earlier because you seem to be following the right idea, but you never know. Check to see if you followed these steps: http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/225788.aspx.

     

    Try chaning the event # and see if that gets rid of your over run and parity error.

     

    Good luck,

    Kat Kelsch

     

  • 0
    Prodigy 10 points

    Hi ！Have you achieved to implement EDMA3 with UART receive？