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Simple McBSP application on C674x

Hi,

after getting McASP working, I started studying McBSP and wanted to see a clock signal on the CLKR pin. I've done following:

#define PINMUX_MCBSP1_REG       (1)
#define PINMUX_MCBSP1_MASK      (0x00F0F0F0)
#define PINMUX_MCBSP1_VAL       (0x00202020)

#define MCBSP0_REG_BASE        (0x01D10000)
#define MCBSP0_FIFO_REG_BASE   (0x01D10800)

#define MCBSP1_REG_BASE        (0x01D11000)
#define MCBSP1_FIFO_REG_BASE   (0x01D11800)

typedef __attribute__((packed)) struct
{
   volatile uint32_t DRR;        // 0x00
   volatile uint32_t DXR;        // 0x04
   volatile uint32_t SPCR;
   volatile uint32_t RCR;
   volatile uint32_t XCR;
   volatile uint32_t SRGR;
   volatile uint32_t MCR;
   volatile uint32_t RCERE0;
   volatile uint32_t XCERE0;
   volatile uint32_t PCR;
   volatile uint32_t RCERE1;
   volatile uint32_t XCERE1;
   volatile uint32_t RCERE2;
   volatile uint32_t XCERE2;
   volatile uint32_t RCERE3;
   volatile uint32_t XCERE3;    // 0x3C       
} mcbsp_regs_t;

#define MCBSP0 ((mcbsp_regs_t *)MCBSP0_REG_BASE)
#define MCBSP1 ((mcbsp_regs_t *)MCBSP1_REG_BASE)

So, this should be mapped right on the McBSPX registers.(?)

// SPCR
#define RRST (0x01 << 0)
#define DLB (0x01 << 15)
#define XRST (0x01 << 16)
#define GRST (0x01 << 22)
#define FRST (0x01 << 23)
#define FREE (0x01 << 25)

// SRGR
#define CLKSM (0x01 << 29)
#define FSGM (0x01 << 28)
//#define FPER (0x01 <<
//#define FWID (0x01 <<
//#define CLKDV (0x01 <<

// PCR
#define FSXM (0x01 << 11)
#define FSRM (0x01 << 10)
#define CLKXM (0x01 << 9)
#define CLKRM (0x01 << 8)
#define SCLKME (0x01 << 7)


    LED_turnOff(LED_1);
    LED_turnOff(LED_2);

    EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_MCBSP1, PSC_ENABLE);
    EVMOMAPL138_pinmuxConfig(PINMUX_MCBSP1_REG, PINMUX_MCBSP1_MASK, PINMUX_MCBSP1_VAL);

    // reset
    MCBSP1->SPCR = 0x00000000;

    // enusure still in reset
    while (CHKBIT(MCBSP1->SPCR, GRST) == 1);
    while (CHKBIT(MCBSP1->SPCR, FRST) == 1);
    while (CHKBIT(MCBSP1->SPCR, XRST) == 1);
    while (CHKBIT(MCBSP1->SPCR, RRST) == 1);

    Task_sleep(100);
    // reset done
 
    // configure control registers

    SETBIT(MCBSP1->PCR, FSXM);   // FSX generated internally
    SETBIT(MCBSP1->PCR, FSRM);   // FSR generated internally
    SETBIT(MCBSP1->PCR, CLKXM);  // CLKX generated internally
    SETBIT(MCBSP1->PCR, CLKRM);  // CLKR generated internally
    SETBIT(MCBSP1->PCR, SCLKME); // select internal input clock

    // CLKSM = FSGM = 1, FPER = 8, FWID = 2, CLKDV = 10
    MCBSP1->SRGR = 0x3008020A;  

    SETBIT(MCBSP1->SPCR, FREE);
    CLRBIT(MCBSP1->SPCR, DLB);    

    // ensure still in reset
    while (CHKBIT(MCBSP1->SPCR, GRST) == 1);
    while (CHKBIT(MCBSP1->SPCR, FRST) == 1);
    while (CHKBIT(MCBSP1->SPCR, XRST) == 1);
    while (CHKBIT(MCBSP1->SPCR, RRST) == 1);
 
    // start clocks, get out of reset
    Task_sleep(100);
    SETBIT(MCBSP1->SPCR, GRST);
    SETBIT(MCBSP1->SPCR, FRST);
    SETBIT(MCBSP1->SPCR, XRST);
    SETBIT(MCBSP1->SPCR, RRST);
    Task_sleep(100);

    LED_turnOn(LED_1);
    Task_sleep(20*1e3);

So, LED1 is turning on, but there is no clock signal on the CLKR pin. I guess I am missing something...

  • Hi Firat,

    Thanks for your post.

    Before seeing the clock signal on the CLKR pin, please find the clock source for CLKR and check whether it is an internal clock source or external clock source (CLKS).

    Please probe the signal for CLKS pin and find the signal at the input clock source.

    If it is internal clock source, CLKR signal need to meet the minimum duty cycle timing requirements and the minimum CLKR cycle times are based on internal logic speed. Due to EDMA limitiations and AC timing requirements, maximum usable logic speed may be lowered. Please check the timing requirements & all other details of McBSP0 in the datasheet link below and kindly refer Section 5.16.2 on the same.

    http://www.ti.com/lit/ds/symlink/tms320c6748.pdf

    Thanks & regards,

    Sivaraj K

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  • Hi Sivaraj,

    thanks for your reply. I just found my mistake. Everywhere on my papers SCLKME is equal to zero(for the internal clock source) except in my code :-)

  • Hi Firat,

    Thanks for your reply.

    If your problem gets resolved, please close the thread by doing below:

    Thanks & regards,

    Sivaraj K

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