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AM335X uboot porting questions

Other Parts Discussed in Thread: AM3358, SYSCONFIG

Hi everyone,

my company has build two custom AM3358 boards for prototyping, one with 8bit (MT29F2G08ABAEAH4-IT:Eand other with 16bit NAND memory (MT29F2G16ABAEAWP-IT:E)

Few basic information:

  • development environment is CSS v5.5, 06.00.00 SDK and XDS100 v2 JTAG, installed under Linux host
  • we are using DDR3 and TPS51200DRCT device, attached to GPIO1_30 for VTT_ENA
  • NAND memories are attached to GPMC_WAIT0 (R/B) for ROM boot support
  • we do not need I2C, SPI, MMC and Ethernet support for uBoot
  • but we need both 8bit and 16bit NAND support (uBoot and kernel)
1. Which uBoot source code is most suitable to fork, for our port, specially regarding 8/16 bit NAND support?
  • one of official uBoot git repositories link, for AM335X?
  • the one available under PSP distribution?
  • the one available under SDK, under board-support/board-port-labs/sitara-board-port-uboot
I have successfully run SPL/uBoot, compiled form SDK source tree (06.00.00.00-template tag), UART0, X/Y MODEM download, and with a few tweaks to add GPIO1_30, VTT_ENA support. SPL and uBoot are working, but of course without  NAND support.
Far as i am familiar, ROM code will read ONFI parameters and will set GPMC accordingly (with CS_0). Somewhere in this forum i have read that uBoot and kernel sould also probe for ONFI data and apply correct GPMC settings, but right now it's not easy for me to digest related source code in a day/two :)
2. Does SDK/board-support/board-port-labs/sitara-board-port-uboot, tag 06.00.00.00-nand16, supports 8-bit NAND also?
I have sucessfully removed Ethernet support for uBoot by doing [#undef CONFIG_DRIVER_TI_CPSW] from include/configs/am335x_evm.h file .
3 How do i remove I2C (#undef CONFIG_DRIVER_OMAP24XX_I2C do not help), MMC and SPI support for uBoot?
Thanks in advance for any assitance
Dimitrije Dinic 
  • Hi Dimitrije,

    I strongly encourage you to follow the Sitara Linux Training material for all of your board port needs. There are some board port labs we wrote which are designed to show necessary steps for porting u-boot and the kernel for your hardware. Obviously there will be some differences in the specific changes needed, but it should largely steer you in the right direction.

    Most useful to this specific question will be this portion of the u-boot port lab.

    Dimitrije Dinic said:
    2. Does SDK/board-support/board-port-labs/sitara-board-port-uboot, tag 06.00.00.00-nand16, supports 8-bit NAND also?
    Yes, sort of. The GPMC timings are the primary change needed, but the timings we provide are pretty relaxed so your memory may work as-is. But other than GPMC timings the only concern is PINMUX.

    Dimitrije Dinic said:
    3 How do i remove I2C (#undef CONFIG_DRIVER_OMAP24XX_I2C do not help), MMC and SPI support for uBoot?
    I think what you are looking for is the include/configs/am335x-evm.h file. You can remove the definitions for CONFIG_SPI_xxxx and such to strip those bits out. I'll give the caveat though that there may be other dependencies on these. For example, most of our PMICs are controlled via I2C, so you can't completely strip that out (you could remove the u-boot commands via the CONFIG_CMD_I2C). I think you would be in the clear with removing SPI/MMC.

    Are you just looking to trim the size of u-boot down, or are you concerned about something else?

  • Hi Tim,

    thanks for fast replying. I was relying pretty much on u-boot port lab tutorial and SDK supplied source code, while i was porting 06.00.00.00-template.

    But what is most important for me is that 06.00.00.00-nand16 will do for 8bit NAND, then i will start to analyze sources in more details.

    For I2C, SPI, MMC removal, i the idea came out of the fact that i had to remove Ethernet and some other configs, in order to start u-boot properly. Currently we do not have PHY's attached, thus #undef CONFIG_DRIVER_TI_CPSW was necessary. Also i had to do #undef CONFIG_SPL_BOARD_INIT, because it was re-initializing GPIO1_30 (our VTT_ENA) pin. After this corrections i was thinking it would be good to remove all unnecessary  code. But it is not so important.

    I have one more question about difference between MLO and u-boot-spl.bin?

    Binary comparison shows only start header difference, and i guess it's related to the additional header needed for NAND boot. Also UBoot user's guide states that MLO should be flashed into NAND (0x0,0x20000, 0x40000 and 0x60000)

    Thanks in advance

  • Dimitrije,

    The nand16 tag only does the PINMUX changes necessary to include the additional 8 data bits. The tags prior should all work with 8-bit NAND.

    Dimitrije Dinic said:
    For I2C, SPI, MMC removal, i the idea came out of the fact that i had to remove Ethernet and some other configs, in order to start u-boot properly. Currently we do not have PHY's attached, thus #undef CONFIG_DRIVER_TI_CPSW was necessary. Also i had to do #undef CONFIG_SPL_BOARD_INIT, because it was re-initializing GPIO1_30 (our VTT_ENA) pin. After this corrections i was thinking it would be good to remove all unnecessary  code. But it is not so important.
    If you don't need support for the additional peripherals this is probably ok, but in general be cautious blindly removing things like this. You could start removing things with dependencies elsewhere and cause other issues.

    Dimitrije Dinic said:

    I have one more question about difference between MLO and u-boot-spl.bin?

    Binary comparison shows only start header difference, and i guess it's related to the additional header needed for NAND boot.

    The makefile generates MLO by taking the u-boot-spl.bin file (which is a raw binary output) and passing it through mkimage. This utility creates the header information you mention, and outputs a filename MLO.


    Dimitrije Dinic said:

    Also UBoot user's guide states that MLO should be flashed into NAND (0x0,0x20000, 0x40000 and 0x60000)
    This is an arbitrary decision we made inside u-boot to ensure that there is no overlap of the three/four sections (MLO, u-boot.img, uImage, filesystem). The u-boot user guide is correct with our u-boot as-is, but this *could* be tweaked if needed.

  • Hi Tim,

    i have managed to bring u-boot in NAND 8bit mode, by using 06.00.00.00-nand16 tag. Previous tag (by timestamp) was 06.00.00.00-ethernet, and did not support any NAND operation (i have checked tag diffs).

    Modifications to  06.00.00.00-nand16 tag were:

    • comment  configure_module_pin_mux(nand16_pin_mux); call in board/ti/am335x/mux.c file
    • replace #define M_NAND_GPMC_CONFIG1 0x00001800 with #define M_NAND_GPMC_CONFIG1 0x00000800 in arch/arm/include/asm/arch-am33xx/mem.h
    I have successfully started u-boot, booted from UART0. Then, following  Flashing images to NAND in UART boot mode, form this wiki page, i have flashed my NAND with MLO and u-boot.img files. Furthermore i have verified these files to be written, by reading NAND and comparing to binary images form PC.
    Still, i can not boot form NAND memory.
    My SYSCONFIG pins are as follows: 0100000000010010
    According to TRM, form right to left:
    [4:0] 10010 - NAND, NAND I2C, USB0, UART0
    [5]      0          - CLKOUT disabled
    [7:6]   00        - ROM code do not care
    [8]      0           - 8bit device
    [9]      0           - ECC done by ROM
    [11:10] 00     - must be for NAND boot
    [13:12]  00     - reserved 
    [15:14]  01     - 24 MHz
    I can guess it may be ECC problem, ROM will use BCH8, and default u-boot should be also BCH8 as there is no nandecc command available. Maybe i am wrong?
    Do you have any other advice, hot to trace down boot problem?
    Thanks in advance.
  • I have a brief update.

    Meahwhile i changed SYSBOOT[7:0] to 00000010 to use UART0, SPI0, NAND, NANDI2C

    Just to be sure about SYSCONFIG pins, i have checked CONTROL_STATUS register 0x44e10040, (u-boot started form UART0), and the return value is 00400302. According to TRM page 763, these values are OK.

    Next thing to do is to use JTAG access to see at what point NAND boot stucks. I also found interesing thread http://e2e.ti.com/support/arm/sitara_arm/f/791/t/246030.aspx?pi239031349=2,

    Tim, should i open a new thread, now it is more like NAND boot problem, than porting issue?

  • Last update for this thread, it turned out to be hardware problem. Some external circuitry (analog switch used to change GPMC_WAIT0 and GPMC_WAIT1 usage, suggested in AM335X errata) has been driving Ready/Busy NAND signal low.

    Now i have SPL booting form NAND correctly. However there is another problem, this time with in SPL and i would not prolong this thread. I will open another one.

    Hope this topic can be useful for someone else trying to evaluate 8-bit NAND support, with some of my code modifications form previous posts.

    Cheers :)