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EVM-SK DDR3 ratio calculation values?

James T
Prodigy 160 points

I'm about ready to make a custom board based on the AM335xEVM-SK design.

I have looked at the documentation for calculating the DDR3 register values and it says to get the seed values for leveling using the ratio spreadsheet.

The ratio spread sheet says to use "0" for the phy invert if the lengths of DDR_CK  > DDR_DQSx.

The EVM-SK PCB shows DDR_CK  = 1.616" and DDR_DQS0 is 1.191" and DDR_DQS1 = 1.194".  So invert should be "0x0".

In ddr_defs.h for the M41J128M16JT-125 section invert is defined as "0x1".

Why is invert set?

And one more question.

How is M41J128M16J-125_ration determined to be "0x40"?

The spread sheet documentation (BBB DDR3 tuning)  indicates to use "0x80" as as starting point but it doesn't appear to ever get updated by the optimizer.

Thank you!

James

  • 0 in reply to Biser Gatchev-XID
    Prodigy 160 points

    Hello Biser,

    Yes, I've read the document on "BBB DDR3 tuning" as well as "AM335x DDR PHY register configuration for DDR3 using Software Leveling".

    My question is that neither of these guides explains why the DDR3 values for the MT41J128MJT-125 in the ddr_defs.h file are different from the examples in the documents.

    In "AM335x DDR PHY register configuration for DDR3 using Software Leveling", the example spread sheet clearly shows CMD_PHY_INVERT_CLKOUT as "0", but in step 4. where it states, "Also, use the values for CMD_PHY_INVERT_CLKOUT..." the listing shows invert as "1".

    So my question still is why is it a "0" in the spreadsheet and then the value put in the file is a "1"?

    If I change the values in ddr_defs.h to the  calculated values the spreadsheet, my compiled uboot does not work.  The only values that work are those in the original file, but there is now explanation of how TI arrived at these values.

    Regards,

    James

  • 0 in reply to James T
    TI__Guru**** 393215 points
    I can't say why there is a difference in these parameters. I am sure that the wiki documentation is correct, because it's being used by quite a lot of people to derive settings for their boards. Maybe there is some slight mismatch between the SK board revision files on the wiki and the actual ones.
  • 0 in reply to Biser Gatchev-XID
    Prodigy 160 points

    Biser,

    Okay then.  Thanks! 

    Perhaps someone should revise the "software leveling" wiki page because it's the one with the errors specifically related to the EVM-SK or post the correct PCB files.

    Thanks again for your timely responses.

    Best regards,

    James

  • 0 in reply to James T
    TI__Guru* 80240 points

    Hi James,

    I know that for the SK, the values have changed over time as we were resolving a proper procedure to arrive at the DDR PHY values.  I'm curious to understand what doesn't work for you if you follow the procedure on the software leveling wiki.  Are you saying that if you use the values in the spreadsheet off of the following site:

    http://processors.wiki.ti.com/index.php/AM335x_DDR_PHY_register_configuration_for_DDR3

    that you cannot boot the SK?

    Regards,

    James

  • 0 in reply to JJD
    Prodigy 160 points

    Hello James (good name!)

    No, the values in the spread sheet do not boot, if I follow the procedures.  The values in the "EXAMPLE" spreadsheet are exactly what I get as well and they do not boot. NOTICE invert = "0" in the spreadsheet.

    BUT, the mystery is that if you change invert to a "1" the values will boot if you can GUESS the correct _PHY_WR_DATA value (which is not calculated by the spreadsheet).

    If I follow the directions invert should be "0" as CK is longer than DQS (1.289 > 1.194)  The measured trace value using Allegro viewer is even greater (CK = 1.617 in the EVM-SK PCB).

    Looking at the history of the jpg of the spreadsheet, you folks changed invert to "0" in Oct 2012.  The earlier Sep and Mar pics show invert = "1".

    Back to GUESSing the _PHY_WR_DATA value.  In the beaglebone black DDR3 tuning wiki says to start with 0x80.  The EVM-SK will not boot with that value.  It need to be bigger even to get a chance of booting.

    Just to let you know how I've been testing this.  I am making a uboot using "template" + "mmc" and altering the MT41J128MJT125_xxxx values in ddr_defs.h, putting it on a mcroSD, booting the board, and watching the results in a terminal window.

    Any clarificatons would be greatly appreciated.

    Best regards,

    James