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DDR3 pin swap and byte swap

Other Parts Discussed in Thread: 66AK2H12

To ease PCB routing between a TI 66AK2H12 and a DDR3 RAM device, is it acceptable to pin swap the data bits within a byte group, and to byte swap entire byte groups (DQ, DQS, DM) ?

There is a similar TI E2E post for another processor that says its okay.   See:   http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/160641.aspx

thanks,

Scott

  • Hi Scott,

    Yes, it is acceptable to bit swap the data bits within a byte lane. In addition each of the byte lanes level independently so you can swap bytes as long as you keep the associated DQM and DQSP/N signals with the proper data bits. (ie DQ0-7 must stay with DQM0 and DQS0P/N). Be sure to follow all the routing guidelines carefully. 

    Regards,  Bill