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Capture encode problem with DVRRDK 04.00.00.03

Other Parts Discussed in Thread: TVP7002

Hi,
I use the DVRRDK 04.00.00.3 on a EVM8168 plateform.
I use the Link API to create custom application that can capture video and encode it in h264.
CAPT (1Ch 720p50) --> IPCM3OUT(VPSS) --> IPCM3IN(VID) --> ENC --> IPC BIT OUT RTOS --> IPC BIT IN HLOS --> file.

The application works well but int the resulting file, I have a problem about the image sequence. This means that every 5/6 pictures, there is an old picture.

It seems that the buffers are not properly cleaned and that are registered in the new h264 file.
This problem is about the configuration of the encoder or the capture configuration ?

8171.capture_encode.c
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Void capture_encode_bitsWriteCbFxn(Ptr pPrm)
{
Bitstream_BufList bitsBuf;
Bitstream_Buf *pBuf;
Int32 frameId;
Int32 status;
unsigned long writeDataSize;
#if ENABLE_TIME_BUFFER
static unsigned long countImage = 0;
#endif
/* Get buffer list from the IPC Link*/
bitsBuf.numBufs = 0;
status = IpcBitsInLink_getFullVideoBitStreamBufs(SYSTEM_HOST_LINK_ID_IPC_BITS_IN_0, &bitsBuf);
if( (status == 0 ) && (bitsBuf.numBufs) && (_fout != NULL) )
{
for(frameId = 0; frameId < bitsBuf.numBufs ; frameId++ )
{
pBuf = bitsBuf.bufs[frameId];
if( pBuf->fillLength > 0 )
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Thank you !!

  • Can you explain the logic in your file:

    (UInt32)((double)Pt_Conf->framerate[0] / (double)IPC_FRAMERATE)

    THis is set as input and output frame rate for all links. If you want input == ouptu framerate then not setting the input/output frame rate is sufficient. BY default links will match ouptut framerate to input framerate.

    I  dont think that is causing the issue you are seeing but pls fix it.

    For debugging the issue pls share logs of Vsys_printDetailedStatistics. If you are using link APIs then refer implementation in ti_vsys.c and implement equivalent function to print link statistics. Pls collect atleast 3 times with 1 min interval.

    ALso try increasing the number of captureLink and encLink output buffers to 10/12 and check if the repeat patterns changes.

  • Thank you for the answer.

    By default the inputFrameRate and the outputFrameRate of the ipcLink are set to 30.

    I am capturing at 50p (with TVP7002), then I set IPC_FRAMERATE(which is a constant) at 1 and Pt_Conf->framerate is set to 50.

    I have does a test with captureLink and enclink output buffers to 12,but they are any changes int the output file.

    Can you explain me the differnce between the IpcBitsOut/In Link and the IpcFramessOut/In Link ?

    It is not possible to use IpcFramessOut/In Link at the output of the enc ?

    the requested log is attached

    4621.2013_11_21_170018_192.168.1.199.log

  • The following are the issues I see:

    1. Your M3 frequency/c674 frequency are strange values . Confirm that you have flashed the uboot that is shipped with DVR RDK release on the board.

    2. Capture is showing 30 fps but encoder is receiving 50 fps . There is some issue with CPU frequency configuration. Pls confirm that you are capturing 720P50 . Next confirm that you are building for 816x and not any other platform by mistake else the PLL register addresses will be wrong. Also the CPU revision detected is also wrong.Do a clean build of make sys_all after editing Rules.make to select correct platform.

    3. The encoder targetFPs and refererence frame rate at create time are set to 30. Pls invoke link control cmd ENC_LINK_CMD_SET_CODEC_FPS with correct fps after encLink create to configure 50/60 fps.

     

    4. For 720P60 the level for H264 is set wrongly in DVR RDK 4.0 release.

        Pls modify /dvr_rdk/mcfw/src_bios6/links_m3video/codec_utils/src/utils_encdec.c with below patch:

    --------- mcfw/src_bios6/links_m3video/codec_utils/src/utils_encdec.c ---------
    diff --git a/mcfw/src_bios6/links_m3video/codec_utils/src/utils_encdec.c b/mcfw/src_bios6/links_m3video/codec_utils/src/utils_encdec.c
    index e63501b..98bcc32 100755
    --- a/mcfw/src_bios6/links_m3video/codec_utils/src/utils_encdec.c
    +++ b/mcfw/src_bios6/links_m3video/codec_utils/src/utils_encdec.c
    @@ -263,6 +263,11 @@
                             *pLevel = IH264VDEC_LEVEL3;
                         break;
                     case UTILS_ENCDEC_RESOLUTION_CLASS_720P:
    +                     if (isEnc)
    +                         *pLevel = IH264_LEVEL_32;
    +                     else
    +                         *pLevel = IH264VDEC_LEVEL32;
    +                     break;
                     case UTILS_ENCDEC_RESOLUTION_CLASS_D1:
                         if (isEnc)
                             *pLevel = IH264_LEVEL_31;
    

     

  • Hi,

    Effectively, I have a problem with the uboot.

    I have rebuilt it and I boot with it now.

    I have done the modification int the file utils_encdec.c.

    When you say invoke link control cmd to modify the codec FPS, I must do it before or after System_linkStart ? becaus I have a error (see log attached) when I call it before the start.

    Il have multiple "CAPTURE: Overflow detectedon VIP" and i have anything data encoded.

    2234.2013_11_22_112017_192.168.1.199.log
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    =~=~=~=~=~=~=~=~=~=~=~= PuTTY log 2013.11.22 11:20:17 =~=~=~=~=~=~=~=~=~=~=~=
    login as: root
    root@192.168.1.199's password:
    # cd cd /tmp
    # cd /tmp/
    ti816x/ udev/
    # cd /tmp/ti
    # cd /tmp/ti816x/
    # cat /etc/ini
    # cat /etc/init.d
    # cat /etc/init.d/S
    # cat /etc/init.d/S=ro
    # cat /root/S
    # cat /root/S80_TVP0_to_itu0.sh
    #!/bin/sh
    i2cset -y 2 0x21 0x21 0xFFFB w
    tvp7002control -d /dev/i2c-2 -a 0x5D -m 5
    cd /root/ti816x/
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    .

  • There is something seriously wrong with your build setup. The line PLATFORM: UNKNOWN CPU detected, defaulting to VPS_PLATFORM_CPU_REV_2_0 should never be printed. Can you check you are doing clean rebuild of all components including HDVPSS drivers for 816x platform.

  • Can you share your kernel boot up logs. I want to check if you are using PG 2.1 silicon in which case the warning from HDVPSS is expected and you can disregard it.

    For VIP reset error check the signal from external video decoder is stable. Also confirm you wanted to configure 16-bit non mux embedded sync as the required configuration.The capture FPS is wrong. Capture only shows 25-28 fps but I think your source is 50 fps.

    The encoder target fps can be set anytime after create. THe error indicates the encoder targetFps is set to some invalid value like 0. Print all the static and dynamic params of encoder share them

  • Hi,

    In the boot log, the OMAP chip identify is TI8168 2.1. (see log attached).

    8030.boot.log
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    U-Boot 2010.06 (Nov 22 2013 - 18:05:40)
    DRAM: 1 GiB
    MMC: OMAP SD/MMC: 0
    Using default environment
    Hit any key to stop autoboot: 0
    reading u-boot.bin
    207992 bytes read
    ## Starting application at 0x80800000 ...
    U-Boot 2010.06 (Nov 22 2013 - 18:00:08)
    TI8168-GP rev 2.1
    HDVICP clk : 600MHz
    L3 Fast clk : 549MHz
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Now, with the good uboot firmware, the problem in the capture stream is that is missing image !!!

    I don't understand where is the problem.

    This is the log of the last test I have done and the code.

    1055.2013_11_25_085130_192.168.1.199.log

    1882.capture_encode.c
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    #include <stdio.h>
    #include <signal.h>
    #include <string.h>
    #include <stdlib.h>
    #include <getopt.h>
    #include <time.h>
    #include <stdint.h>
    #include <unistd.h>
    #include <demos/link_api_demos/common/chains.h>
    #include <link_api/system.h>
    #include <link_api/captureLink.h>
    #include <link_api/nsfLink.h>
    #include <link_api/nullLink.h>
    #include <link_api/dupLink.h>
    #include <link_api/ipcLink.h>
    #include <link_api/systemLink_m3vpss.h>
    #include <link_api/systemLink_m3video.h>
    #include <link_api/encLink.h>
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

  • The capture fps is wrong which indicates some issue with external video decoder configuration . Is this your own board or TI816x EVM ?

    Are the encode link control errors resolved ?

    Is the continuous VIP reset resolved ?

  • I finally found the problem.
    The problem is actually the configuartion the TVP7002.
    I attach the configuration script I use (this can help other people ...) to make 720p50.

    1184.tvp7002_720p50.sh.txt
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    #!/bin/sh
    #i2cset -y 2 0x21 0x0f 0xfb
    i2cset -y 2 0x21 0x0f 0xCB
    i2cset -y 2 0x5d 0x01 0x7B
    i2cset -y 2 0x5d 0x02 0xC0
    i2cset -y 2 0x5d 0x03 0x98
    i2cset -y 2 0x5d 0x04 0x16
    i2cset -y 2 0x5d 0x05 0x32
    i2cset -y 2 0x5d 0x06 0x20
    i2cset -y 2 0x5d 0x07 0x2C
    i2cset -y 2 0x5d 0x0B 0x80
    i2cset -y 2 0x5d 0x0C 0x90
    i2cset -y 2 0x5d 0x0D 0x80
    i2cset -y 2 0x5d 0x0E 0x3F
    i2cset -y 2 0x5d 0x0F 0x2E
    i2cset -y 2 0x5d 0x10 0x5D
    i2cset -y 2 0x5d 0x11 0x50
    i2cset -y 2 0x5d 0x12 0x00
    i2cset -y 2 0x5d 0x13 0x01
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    The next step for me will be to implement both TVP to generate two streams H264.
    Thank you for your help.

  • Thank you for sharing the fix.

  • Hi Nicolas,

        I have read your posts and found they are informative.  I also want to do the TVP7002 YUV component capture within the McfW of DVRRDK, based on my EVM8168 + Catalog Daughtercard.  I tired to follow your steps and instructions. 

        Though I could successfully build the program you provided and run the tvp7002 initial script, there seems to be something wrong with my project:  It continuously cast "CAPTURE: Overflow detected on VIP0" once I tried to run the case.

         I have also copied your tvp7002 initial script and run it before this program.  A verified 1280x720p50 YUV signal is also provided to the catalog daughtcard.  I have no idea with this issue.  Could you give me a hand?

    Naroah

    140215

  • Hi Naroah,

    Sorry to the late  !!

    I don't now why they are overflow on VIP and I have actually the same error on 1080p30. I search...

    If I found a solution, I send it to you.

    Sorry

  • Are you doing inline scaling and upscale the input video? In this case, there could be overflow?

    If not, what is your input information to the VIP? Is it discrete sync or embedded sync? In case of discrete sync, can you check sync polarity is correctly configured? Even clock edge polarity is correct?

     

    Rgds,

    Brijesh