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AM3517 Spread Spectrum Clocking

Guru 10570 points
Other Parts Discussed in Thread: AM3517

Hello,
I am using the Spread Spectrum Clocking(SSC) in AM3517 DPLL4(DSS_PCLK).
It seems to be activate the SSC.
But the spectrum analyser still shows that peak without any change.

Could you let me know some advise to check SSC effect?

Register sequence:
  #define    CONTROL_DSS_DPLL_SPREADING    *(volatile unsigned int *)0x48002450

  1) val = CONTROL_DSS_DPLL_SPREADING;         // I can get the val=0x00000040.
  2) CONTROL_DSS_DPLL_SPREADING = 0x0000000F;  // Configure the AMPLITUDE and RATE
  3) val = CONTROL_DSS_DPLL_SPREADING;         // I can get the val=0x0000004F.
  4) CONTROL_DSS_DPLL_SPREADING = 0x0000001F   // Set SSC enable
  5) val = CONTROL_DSS_DPLL_SPREADING;         // I can get the val=0x000000DF.(ENABLE STATUS is High.)

Waveform:

Best regards, RY

  • Hi RY,
     
    Have you referred to section 6.4.7 in the AM35X TRM, especially subsection 6.4.7.4? What is the frequency you want to kill and what is the peak level? What is your measurement setup?
     
    Please provide this information to help describe the problem better.
  • Biser-san,

    Thank you so much for your reply.
    Yes. I have already referred section 6.4.7 and also section 6.4.7.4.
    I would like to answer your questions:

    Biser Gatchev-XID said:

    What is the frequency you want to kill and what is the peak level?

    I can see the harmonics on the odd multiple of DSS_PCLK(29MHz).
    The following frequency is especially high level.
      - 87MHz : 29MHz x3
      - 203MHz : 29MHz x7
      - 261MHz : 29MHz x9
    The peak level is about 38dB.
     
    Biser Gatchev-XID said:
    What is your measurement setup?
     
    I am picking up the DSS_PCLK pin directly by spectrum analyser active probe.
     
    If you need other information, please let me know.
    Best regards, RY
  • Thanks for the information. I will forward this to the factory team.

  • Biser-san,
    Thank you. I am gonna wait for the reply from factory team.
    Best regards, RY 

     

  • RY-san,

    To debug this issue further, can you help provide all the SSC parameters that you programmed? Please also provide what the input clock frequency (crystal oscillator frequency) is and the M/N values of the PLL to determine the Reference Clock.

    Additionally, did you perform any measurements without enabling SSC feature? Can you provide the plots for the same? Please provide the sprectrum analyzer settings that you used for generating the frequency plots.

    Regards, Siva

  • Hello, Siva-san.
    Thank you so much for your reply.
    I would like to answer your question.

     - all the SSC parameter :
         CONTROL_DSS_DPLL_SPREADING     (0x48002450) = 0x000000DE  // Finally I got after configuration.
         CONTROL_CORE_DPLL_SPREADING    (0x48002454) = 0x00000040  // not used
         CONTROL_PER_DPLL_SPREADING     (0x48002458) = 0x00000040  // not used
         CONTROL_USBHOST_DPLL_SPREADING (0x4800245C) = 0x00000040  // not used

     - crystal oscillator frequency :
         sys_xtalin = 26MHz

     - the M/N values of the PLL to determine the Reference Clock :
         CM_CLKSEL1_PLL_MPU (0x48004940) = 0x0012580C
         CM_CLKSEL2_PLL_MPU (0x48004944) = 0x00000001
         CM_CLKSEL1_PLL     (0x48004D40) = 0x094C0C00
         CM_CLKSEL2_PLL     (0x48004D44) = 0x0001B00C
         CM_CLKSEL3_PLL     (0x48004D48) = 0x00000009
         CM_CLKSEL4_PLL     (0x48004D4C) = 0x0000780C
         CM_CLKSEL5_PLL     (0x48004D50) = 0x00000001
         CM_CLKSEL_DSS      (0x48004E40) = 0x0000100F
         CM_CLKSEL1_EMU     (0x48005140) = 0x03020A50
         PRM_CLKSRC_CTRL    (0x48307270) = 0x00000080

     - Additionally, did you perform any measurements without enabling SSC feature?
       Can you provide the plots for the same?
          Yes. I have already attached the waveform above without enabling SSC.
          Could you check this?
          Although I enabled the SSC feature, there is no change at all the waveform.


     - Please provide the spectrum analyzer settings that you used for generating
       the frequency plots.
         a) full scale of waveform (I attached above)
              Freq(X-axis)  : Range 0Hz~1GHz
              Level(Y-axis) : Range 5dB/div

          b) a part of waveform (I attached above)
              Freq(X-axis)  : I was measured 86.5MHz in the center.
              Level(Y-axis) : Range 5dB/div. Peak level is about 38dB.

         The waveform I attached is measured by probing DSS_PCLK directly.
         When I was measured the EMI by using antenna in the anechoic chamber,
         Actually the peak level of harmonics on the odd multiple of DSS_PCLK(29MHz) was about 60dB.

    If you need more information, please let me know.

    Best regards, RY

  • Siva-san,

    Thanks for your support.
    Do you have any updates?
    If you need a few days, please let me know.
    I would like to ask my customer to wait.

    Best regards, RY

  • RY-san

    We're reviewing this in detail and we will come back by end of this week.

    Regards, Siva

  • Siva-san,

    Thank you for your response.
    I understand. I am waiting your feedback.

    Best regards, RY

  • Siva-san,
    Are there any updates?
    Best regards, RY

  • Siva-san,
    Could you update current status?
    My important customer have strong requirement to me.
    Best regards, RY

  • RY-San,

    Sorry for the delay. We are trying to work with the design team to understand the results. I appreciate your patience as we analyze this in more detail and see what could be going wrong. I will update you ASAP as we hear back.

    Regards, Siva

  • Siva-san,
    Thank you for your response.
    I will ask my customer to wait a few days. Thank you for your support!
    Best regards, RY

  • Siva-san,

    It have elapsed a week.
    Do you have any updates?

    Best regards, RY

  • Siva reviewed your PLL settings and did not find any issues.  He ask me to look at your spectrum analyzer configuration and test results. 

    The screen shots show the spectrum analyzer resolution bandwidth (RBW) to be 3 MHz.  I’m not sure if you will be able to see much change on the spectrum analyzer with an RBW of 3 MHz. 

    I’m not an expert on the PLL, but have been told the maximum deviation from the center frequency will be +/- 3%.  This would be +/- 870 kHz for a 29 MHz center frequency. 

    Please read Chapter V (Measuring Emissions) of the attached document to better understand the effect of RBW on your measurements.

    0676.Topic_2_Rice_Gehrke_Segal.pdf

    Regards,
    Paul

  • The easy way to see if a clock has spread spectrum is to use an Oszilloskope. Use delayed trigger and see the jitter.

    Beware: the early chips of the AM3517 have spread spectrum DISABLED in the chip configuration. You might want to check with TI if you have a chip which is able to do spread spectrum.

    regards

    Wolfgang

  • Paul-san, Wolfgang-san,
    Thank you so much for your advise.

    Paul-san,
    OK. I will check again RBW to our customer and return you.

    BTW, Wolfgang-san tells me that:

    Wolfgang Muees1 said:

    Beware: the early chips of the AM3517 have spread spectrum DISABLED in the chip configuration. You might want to check with TI if you have a chip which is able to do spread spectrum.

    How can I check my device whether it is SSC DISABLED or NOT?

    Wolfgang-san,
    Thank you so much. I will check SSC in my oscilloscope.
    Does your AM3517 SSC operate correctly in DSS_DPLL?

    Best regards, RY

  • Paul-san, Wolfgang-san,

    I could see the SSC enable by oscilloscope.
    Thank you so much for your support!!

    Best regards, RY