• State
  • Locked Locked
  • Replies 50 replies
  • Subscribers 101 subscribers
  • Views 4381 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Image resizer downscale on Linux

Emilio Guijarro
Intellectual 410 points
Other Parts Discussed in Thread: LINUXEZSDK-SITARA

Hi,

I'm running TI's Linux 2.6.37 as provided in ti-sdk-am37x-evm-05.05.01.00 PSP. I've managed to exercise the processor's HW scaling capabilities using V4L, resizing from YUV16 640x512 to 720x576, as documented here:

http://processors.wiki.ti.com/index.php/UserGuideDisplayDrivers_PSP_04.02.00.07#Scaling

Problems arise when trying to downscale a V4L video stream from YUV16 1024x768 to 720x576 (kernel dmesg error follows):

omapdss DISPC error: failed to set up scaling, required fclk rate = 109881533 Hz, current fclk rate = 96000000 Hz

I've reconfigured U-Boot to set a higer frequency for DISPC FCLK (arch/arm/cpu/armv7/omap3/lowlevel_init.S), but as it grows the message persists, always demanding a higher FCLK rate.

Also, I've studied the kernel source code producing this error (drivers/video/omap2/dss/dispc.c), and it seems really "hacky" to me: hardcoded values of image properties, lots of FIXMEs, etc. Also, newer versions of this file in more recent kernels seem to change heavily, even redesign, this part of the kernel entirely.

Please help,

Emilio.

  • 0
    TI__Guru**** 393215 points
    Hi Emilio,
     
    I have asked the factory team to look into this. They should respond here.
  • 0
    TI__Expert 3010 points

    Emilio,


    It looks like the DSS drivers for the 2.6.37 kernel prefer to keep FCLK at a maximum value of 96MHz for power saving purposes.  The FCLK can reach a maximum frequency of 173MHz, which will definitely cover the scaling requirements you have.


    I have one thing for you to try that should set your FCLK to a higher value.  In your kernel config, try setting DSS_MIN_FCK_PER_PCK to a value greater than 1, such as 2 for starters.

    Symbol: OMAP2_DSS_MIN_FCK_PER_PCK [=1]                                                                                                                                                 │  
  │ Type  : integer                                                                                                                                                                        │  
  │ Range : [0 32]                                                                                                                                                                         │  
  │ Prompt: Minimum FCK/PCK ratio (for scaling)                                                                                                                                            │  
  │   Defined at drivers/video/omap2/dss/Kconfig:118                                                                                                                                       │  
  │   Depends on: HAS_IOMEM [=y] && OMAP2_DSS [=y]                                                                                                                                         │  
  │   Location:                                                                                                                                                                            │  
  │     -> Device Drivers                                                                                                                                                                  │  
  │       -> Graphics support                                                                                                                                                              │  
  │         -> OMAP2/3 Display Subsystem support (EXPERIMENTAL) (OMAP2_DSS [=y])

    Let me know how it goes.

    Regards,

    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Hi Josh,

    I'm still getting the dreaded fclk rate error messages... should I patch my uboot in order to increase DISPC FCLK speed?

    [  125.189758] omapdss DISPC error: failed to set up scaling, required fclk rate = 109881533 Hz, current fclk rate = 96000000 Hz
[  125.201568] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[  125.208312] omapdss MANAGER error: configure_overlay 2 failed
[  125.215789] omapdss DISPC error: failed to set up scaling, required fclk rate = 109881533 Hz, current fclk rate = 96000000 Hz
[  125.227600] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[  125.234313] omapdss MANAGER error: configure_overlay 2 failed
[  125.242462] omap3isp omap3isp: CCDC won't become idle!
[  125.255798] omapdss DISPC error: failed to set up scaling, required fclk rate = 109881533 Hz, current fclk rate = 96000000 Hz
[  125.267608] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[  125.274322] omapdss MANAGER error: configure_overlay 2 failed

    Kind regards.

  • 0 in reply to Emilio Guijarro
    Intellectual 410 points

    Also, same problem as before when increasing DISPC FCLK rate (changed CM_CLKSEL_DSS[0:5] from 9 to 7, effectively achieving 123Mhz):

       25.641387] omapdss DISPC error: failed to set up scaling, required fclk rate = 141276255 Hz, current fclk rate = 123428571 Hz
[   25.653289] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   25.660003] omapdss MANAGER error: configure_overlay 2 failed
[   25.691711] omapdss DISPC error: failed to set up scaling, required fclk rate = 141276255 Hz, current fclk rate = 123428571 Hz
[   25.703613] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   25.710327] omapdss MANAGER error: configure_overlay 2 failed
[   25.718780] omap3isp omap3isp: CCDC won't become idle!
[   25.731628] omapdss DISPC error: failed to set up scaling, required fclk rate = 141276255 Hz, current fclk rate = 123428571 Hz
[   25.743530] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   25.750244] omapdss MANAGER error: configure_overlay 2 failed

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Emilio,


    I think you will most likely have to edit dispc.c in order to get the fclk to the frequency you need; as you note before, this older driver is in a much less polished state than it is now in 3.x kernels.


    There are two calc_fclk functions in dispc.c; one for a 3 point filter case and one for a 5 point filter case.  Can you try forcing both of those functions to always return a high fclk value (such as 150Mhz)?  This is just a test to see if we can forcefully get the DSS to downscale according to you requirements.


    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Hi Josh,

    I've already tried what you suggest, patching the driver to ignore these checks, but as a result the whole display subsystem loses synchronization and crashes miserably.

    Now that this has been confirmed as a bug in TI's driver, should we expect a fix anytime soon?

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hey Emilio,

    Since this is the 2.6.37 kernel, there will be no fixes for this DSS driver; as you have noticed, the driver has been revamped significantly and all our development is focused on very new kernels (like 3.12 -> 3.14).


    What values did you experiment with CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK?  According to what I have read, you should be able to tune this value up until you ensure fclk is high enough for your scaling requirements.


    Regards,


    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Hi Josh,

    No matter what value is given to CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK (I've tried 2, 8, 16 and 32), it always produces the same result when initializing the scaler:

    [   42.989379] omapdss DISPC error: failed to set up scaling, required fclk rate = 109881533 Hz, current fclk rate = 96000000 Hz
[   43.001190] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   43.007934] omapdss MANAGER error: configure_overlay 2 failed
[   43.014617] omapdss DISPC error: failed to set up scaling, required fclk rate = 109881533 Hz, current fclk rate = 96000000 Hz
[   43.026428] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   43.033142] omapdss MANAGER error: configure_overlay 2 failed
[   43.054595] omapdss DISPC error: failed to set up scaling, required fclk rate = 109881533 Hz, current fclk rate = 96000000 Hz
[   43.066406] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   43.073120] omapdss MANAGER error: configure_overlay 2 failed

    I understand that most of your efforts are focused on improving drivers for new kernels, but you are leaving behind a kernel that is currently being shipped as part of the AM37X PSP, which was published less than a year ago (see http://www.ti.com/tool/linuxezsdk-sitara).

    Frankly, we've invested a significant amount of resources into tuning this kernel to function with our custom boards, using the microprocessor's allegedly "official" kernel, and seeing its support discontinued astonishes and worries us.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hi Emilio,

    Support is not discontinued for your AM37x PSP; there will just be no official bug fix released for this kernel.  All our new development and releases will be for new kernels.

    Since MIN_FCK_PER_PCK doesn't seem to help at all here, we're going to have to dig back into the dispc driver.  I'll get back to you with an update and suggestion later today.

    Regards,

    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Josh,

    please accept my apologies for the misunderstanding, with "a fix" I meant directions for changes in the kernel, or an ad-hoc patch, leading to solving the incidence.

    In summary, any kind of help will be greatly appreciated.

    Thanks,

    Emilio.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hi Emilio,

    No problem; I didn't mean to imply that support had been dropped for your PSP.

    I'll get back with an update later today.

    Josh

  • 0 in reply to Josh Elliott
    TI__Expert 3010 points

    Emilio,


    I attached a sample program from the SDK that I modified to reproduce your scaling parameters.


    Can you run it on your board and let me know what it does?

    Regards,

    Josh

    3568.test.zip

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Josh,

    I can't run the program:

    ./saScalingDisplay 
-sh: ./saScalingDisplay: No such file or directory

    I've seen this kind of behaviour before, and it usually shows up when the binary has been compiled for a different architecture/kernel, or one required shared library is missing.

    Your executable has these properties:

    saScalingDisplay: ELF 32-bit LSB executable, ARM, version 1 (SYSV), dynamically linked (uses shared libs), for GNU/Linux 2.6.31, BuildID[sha1]=0x7b6c74e01a43591a4364cc6cf643169d0cf4b896, not stripped

    whereas the executables I usually compile and run are:

    ELF 32-bit LSB executable, ARM, version 1 (SYSV), dynamically linked (uses shared libs), for GNU/Linux 2.6.16, not stripped

    If your program's source code is simple to compile, and has no dependencies (we don't have Qt and other goodies in our rootfs), perhaps you could send it to me, so I can build and run it.

    Regards,

    Emilio.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hi Emilio,


    The source code for this program is in the SDK in example-applications/av-examples-1.0/saScalingDisplay/

    I just modified the original image size and the scaling size to reflect what you are doing in your app; for now I'm just trying to see if I can reproduce your exact DSS error with this program.


    The program doesn't require Qt or any other multimedia libraries, so you should be good to go.


    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    We're using a modified version of the saMmapLoopback.c to test on our side. Most modifications affect our sensor configuration, and the only one regarding scaling is this addition:

     {                                                                          
      struct v4l2_format fmt;                                                 
      struct v4l2_crop crop;                                                  
      /* Changing display window size to 200x200 */                           
      fmt.type = V4L2_BUF_TYPE_VIDEO_OVERLAY;                                 
      /*fmt.fmt.pix.width = display->width;                                   
      fmt.fmt.pix.height = display->height;                                   
      fmt.fmt.pix.pixelformat = DEF_PIX_FMT;*/                                
      fmt.fmt.win.w.left = 0;                                                 
      fmt.fmt.win.w.top = 0;                                                  
      fmt.fmt.win.w.width = 720;                                              
      fmt.fmt.win.w.height = 574;                                             
      ret = ioctl(display->display_fd, VIDIOC_S_FMT, &fmt);                   
      if (ret < 0) {                                                          
             perror("VIDIOC_S_FMT\n");                                        
             goto ERROR;                                                      
      }                                                                                                  
      crop.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;                                 
      crop.c.left = 0;                                                        
      crop.c.top = 0;                                                         
      crop.c.width = 1024;                                               
      crop.c.height = 768;                                             
      ret = ioctl(display->display_fd, VIDIOC_S_CROP, &crop);                 
      if (ret < 0) {                                                          
             perror("VIDIOC_S_CROP\n");                                       
            goto ERROR;                                                       
      }                                                                       
   }

    We do it in display_prepare_streaming, right after:

       fmt->fmt.pix.width = display->width;                                       
   fmt->fmt.pix.height = display->height;                                     
   fmt->fmt.pix.pixelformat = DEF_PIX_FMT;                                    
   fmt->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;                                    
   ret = ioctl(display->display_fd, VIDIOC_S_FMT, fmt);                       
   if (ret < 0) {                                                             
      perror("VIDIOC_S_FMT");                                                 
      goto ERROR;                                                             
   }

    I hope this helps.

    Emilio.

  • 0 in reply to Emilio Guijarro
    Intellectual 410 points

    Hi Josh,

    did you get to reproduce the problem? Please let me know if there is anything I can do to help.

    Kind regards.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hey Emilio,

    I have been looking into our newer 3.12 based DSS drivers and running some tests.  It looks like this issue may still be present there, too, and that it has more to do with the drivers that set up the clocks than the DSS driver itself.

    One helpful thing that you could for me is edit and test the saScalingDisplay example in your SDK root until it reproduces the exact error that you are seeing in your loopback program; I can't get the exact error you are seeing.  I get a different sync loss error.

    Regards,

    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Hi Josh,

    as you may have noticed, I've been very busy these last days. I'm afraid that will be the case for a few weeks, so I can't promise anything adapting saScalingDisplay to our board. All I can do right now is send you, privately, our own version of saMmapLoopback.c.

    Also, I'll be glad to run any executable you send me, as long as it is compiled with the toolchain found at ti-sdk-am37x-evm-05.05.01.00.

    Have you made any progress on your side?

    Kind regards.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hey Emilio.

    I certainly understand--I have been very busy myself lately.

    My idea with the saScalingDisplay is to test the driver functionality difference between fbdev and V4L2 with respect to the DSS.  From what I can tell, we may be running into a limitation of the clock framework that sits behind the actual DSS driver.

    In my experiments on the 2.6.37 kernel and a 3.12 kernel, the clock framework seems to hit some kind of limit when downscaling any image that is near 720p.  I haven't found any way around this yet, but if I do I will definitely let you know.

    Regards,

    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Hi Josh,

    I've reached more or less the same limits. 800x600 is the maximum I've achieved in my current setup.

    Eager to hear about patches and suggestions,

    Emilio.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hi Emilio,


    I have a patch that might help fix this issue.  I'm not sure if it will apply directly to your dss driver, but if not it should not be too hard to merge manually.  It has to do with setup of fck for scaling calculations, and it definitely is not applied in your kernel.

    https://gitorious.org/linux-omap-dss2/archit-dss2-clone/commit/8b53d9911982794b3f6d5513741495c3f70962cd


    Regards,

    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Josh,

    thanks a lot for the time you are spending on fixing this issue. I've adapted this patch to the best of my knowgledge, to the 2.6.37 kernel included in SDK v5 (and 6), but unfortunately the results are still the same:

    [   34.171112] omapdss DISPC error: failed to set up scaling, required fclk rate = 141276255 Hz, current fclk rate = 123428571 Hz
[   34.183013] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   34.189758] omapdss MANAGER error: configure_overlay 2 failed
[   34.218017] omapdss DISPC error: failed to set up scaling, required fclk rate = 141276255 Hz, current fclk rate = 123428571 Hz
[   34.229888] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   34.236633] omapdss MANAGER error: configure_overlay 2 failed
[   34.244873] omap3isp omap3isp: CCDC won't become idle!
[   34.258026] omapdss DISPC error: failed to set up scaling, required fclk rate = 141276255 Hz, current fclk rate = 123428571 Hz
[   34.269927] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   34.276672] omapdss MANAGER error: configure_overlay 2 failed

    Also, as I crank up the fclk rate in uboot, the required fclk rate keeps going up (same as before).

    I suspect that the 2.6.37 kernel requires further changes to achieve scaling at high resolutions. Is it too much to ask, that this patch is adapted and tested for kernel 2.6.37?. I've attached my own (unsuccessful) version of the patch, just in case it helps:

    Fullscreen 0714.dispc.diff Download 
    diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index fa40fa5..db1bf5a 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -1426,10 +1426,10 @@ static void calc_dma_rotation_offset(u8 rotation, bool mirror,
 	}
 }
 
-static unsigned long calc_fclk_five_taps(u16 width, u16 height,
+static unsigned long calc_core_clk_five_taps(u16 width, u16 height,
 		u16 out_width, u16 out_height, enum omap_color_mode color_mode)
 {
-	u32 fclk = 0;
+	u32 core_clk = 0;
 	/* FIXME venc pclk? */
 	u64 tmp, pclk = dispc_pclk_rate();
 
@@ -1439,7 +1439,7 @@ static unsigned long calc_fclk_five_taps(u16 width, u16 height,
 
 		tmp = pclk * height * out_width;
 		do_div(tmp, 2 * out_height * ppl);
-		fclk = tmp;
+		core_clk = tmp;
 
 		if (height > 2 * out_height) {
 			if (ppl == out_width)
@@ -1447,23 +1447,23 @@ static unsigned long calc_fclk_five_taps(u16 width, u16 height,
 
 			tmp = pclk * (height - 2 * out_height) * out_width;
 			do_div(tmp, 2 * out_height * (ppl - out_width));
-			fclk = max(fclk, (u32) tmp);
+			core_clk = max_t(u32, core_clk, tmp);
 		}
 	}
 
 	if (width > out_width) {
 		tmp = pclk * width;
 		do_div(tmp, out_width);
-		fclk = max(fclk, (u32) tmp);
+		core_clk = max_t(u32, core_clk, tmp);
 
 		if (color_mode == OMAP_DSS_COLOR_RGB24U)
-			fclk <<= 1;
+			core_clk <<= 1;
 	}
 
-	return fclk;
+	return core_clk;
 }
 
-static unsigned long calc_fclk(u16 width, u16 height,
+static unsigned long calc_core_clk(u16 width, u16 height,
 		u16 out_width, u16 out_height)
 {
 	unsigned int hf, vf;
@@ -1562,7 +1562,7 @@ static int _dispc_setup_plane(enum omap_plane plane,
 	} else {
 		/* video plane */
 
-		unsigned long fclk = 0;
+		unsigned long core_clk = 0;
 
 		if (out_width < width / maxdownscale ||
 		   out_width > width * 8)
@@ -1606,12 +1606,12 @@ static int _dispc_setup_plane(enum omap_plane plane,
 		five_taps = height > out_height * 2;
 
 		if (!five_taps) {
-			fclk = calc_fclk(width, height,
+			core_clk = calc_core_clk(width, height,
 					out_width, out_height);
 
 			/* Try 5-tap filter if 3-tap fclk is too high */
 			if (cpu_is_omap34xx() && height > out_height &&
-					fclk > dispc_fclk_rate())
+					core_clk > dispc_core_clk_rate())
 				five_taps = true;
 		}
 
@@ -1621,17 +1621,17 @@ static int _dispc_setup_plane(enum omap_plane plane,
 		}
 
 		if (five_taps)
-			fclk = calc_fclk_five_taps(width, height,
+			core_clk = calc_core_clk_five_taps(width, height,
 					out_width, out_height, color_mode);
 
-		DSSDBG("required fclk rate = %lu Hz\n", fclk);
-		DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate());
+		DSSDBG("required fclk rate = %lu Hz\n", core_clk);
+		DSSDBG("current fclk rate = %lu Hz\n", dispc_core_clk_rate());
 
-		if (!fclk || fclk > dispc_fclk_rate()) {
+		if (!core_clk || core_clk > dispc_core_clk_rate()) {
 			DSSERR("failed to set up scaling, "
 					"required fclk rate = %lu Hz, "
 					"current fclk rate = %lu Hz\n",
-					fclk, dispc_fclk_rate());
+					core_clk, dispc_core_clk_rate());
 			return -EINVAL;
 		}
 	}
@@ -1699,6 +1699,19 @@ static int _dispc_setup_plane(enum omap_plane plane,
 	return 0;
 }
 
+unsigned long dispc_core_clk_rate(void)
+{
+   int lcd;
+   unsigned long fclk = dispc_fclk_rate();
+
+//   if (dss_has_feature(FEAT_CORE_CLK_DIV))
+      lcd = REG_GET(DISPC_DIVISOR, 23, 16);
+   /*else
+      lcd = REG_GET(DISPC_DIVISORo(OMAP_DSS_CHANNEL_LCD), 23, 16);*/
+
+   return fclk / lcd;
+}
+
 static void _dispc_enable_plane(enum omap_plane plane, bool enable)
 {
 	REG_FLD_MOD(dispc_reg_att[plane], enable ? 1 : 0, 0, 0);
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 5c7940d..6a8061d 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -241,6 +241,7 @@ int dss_get_clock_div(struct dss_clock_info *cinfo);
 int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
 		struct dss_clock_info *dss_cinfo,
 		struct dispc_clock_info *dispc_cinfo);
+unsigned long dispc_core_clk_rate(void);
 
 /* SDI */
 #ifdef CONFIG_OMAP2_DSS_SDI

  • 0 in reply to Emilio Guijarro
    Intellectual 410 points

    Hello Josh,

    Any news on this front? should we expect, at some point, a patch for kernel 2.6.37?

    Thanks.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hi Emilio,

    Nothing new to report yet; I am in the process of sorting through commits in the DSS driver to try to understand what patches could be useful for this issue.  There is a new dss feature implementation in our newest driver that allows you to specify the max functional clock, but it was added quite a bit later than the 2.6.37 DSS driver, so it's taking time to figure out how to bring that functionality to your kernel.

    There won't be any official patches released for the 2.6.37 kernel; however, we can use patches that have already been added to the DSS driver to help solve this clocking limitation.

    Regards,

    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Hi Josh,

    I understand the complexity of the problem. We'll stay tuned for updates on this thread.

    Kind regards,

    Emilio.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hey Emilio,

    I have a couple of updates.


    First, I wanted to draw your attention to this discussion.  It's interesting in that it seems to be about the very issue you are facing, but it seems like the conclusion is that setting the fck/pck ratio (which we already tried) is the route to take.  If you look over the discussion, though, maybe you'll notice something that I am missing.

    Second, I found this e2e post for DM37x, which is a similar part to AM37x (just minus the DSP--it has the same DSS2).  An interesting point it brings up is that clocks could be limited due to Power Management related functions.  In the DSS drivers, I have noticed that clock rates are determined by looking for the divisors set in PLLs that feed the DSS--so in our case, perhaps there is a limit to what the PLLs can be set to that is induced by the OPP.  That would explain why changing CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK doesn't affect anything, because the max FCK is already being hit due to the OPP.  Can you try looking into what OPP you're board is at by default, and try adjusting it?


    Regards,

    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Hi Josh,

    sounds promising... unfortunately I'm a bit busy these days and there is a lot to process in your message :)

    I'll come back to you with answers and test results as soon as I can.

    Thanks,

    Emilio.

  • 0 in reply to Emilio Guijarro
    Intellectual 410 points

    Hello Josh,

    sorry for the huge delay in answering, other tasks and national holidays have kept me back during the last fewweeks. Here's what's I've found so far:

    • Our MPU runs at 600MHz:
    cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq 
600000
    • According to that and this table, we should be running at OPP100, which according to the e2e post you suggested, should be enough to accomodate frequencies up to 173Mhz:

    "But according TRM - The DSI1_PLL_FCLK and DSI2_PLL_FCLK frequencies must be lower than 173 MHz at nominal voltage (OPP100), and lower than 100 MHz at low voltage (OPP50)."

    Any ideas?

  • 0 in reply to Emilio Guijarro
    Intellectual 410 points

    I've also been studying the topics discussed in the gmane.linux.ports.arm.omap entry you mentioned, but the function it focuses on (gmane.linux.ports.arm.omap) seems to be called only from code related to digital video interface (DPI/SDI).

    I've fixed the DISPC_FCLK rate to the closest value to 173 MHz (172.8 MHz), as the discussion mentions, and disabled the buggy PCLK checks in dispc.c, without any positive or even different results.

    Will you or anyone within your team be able to spend time fixing this? I'm very grateful for all the links and pointers provided so far, but we're running out of ideas and wondering if the necessary effort is ever going to be spent on fixing this problem.

  • 0 in reply to Emilio Guijarro
    TI__Expert 3010 points

    Hi Emilio,

    Just to check--are you not using DPI output?  If that's the case, then this could be the problem that is causing fck limitation.  In the kernel configs, there is this entry:

    CONFIG_OMAP2_DSS_USE_DSI_PLL:                                                          │  
  │                                                                                        │  
  │ Use DSI PLL to generate pixel clock.  Currently only for DPI output.                   │  
  │ DSI PLL can be used to generate higher and more precise pixel clocks.

    I did some tests on an AM35x board that I have (same DSS), which connects to an LCD panel via DPI.  These test consisted of downsizing an image using the v4l2 scaling demo in the SDK.  First, I kept CONFIG_OMAP2_DSS_USE_DSI_PLL true, and I could get higher fck (I saw 117MHz in my last test).  Without that config set true, I was getting much lower fck freqs, and LCD sync loss for the same scaling test.

    What interface are you using to connect to your display device?  If you are using DPI, can you check to see if that config is set true in your kernel?

    Regards,

    Josh

  • 0 in reply to Josh Elliott
    TI__Expert 3010 points

    Emilio,


    Also, I attached a test I was running today.  Can you build it and test it on your board 1) wtih CONFIG_OMAP2_DSS_USE_DSI_PLL amd 2) with CONFIG_OMAP2_DSS_USE_DSI_PLL disabled.  Make sure you pass omapdss.debug=y in your kernel bootargs.  Send me the logs from each of these tests.

    Fullscreen 0525.saScalingDisplay.c Download 
    /*
 * saScalingDisplay.c
 *
 * This is a V4L2 sample application to show the scaling capabilties of the DSS
 * hardware of OMAP.  It first shows the original image and then it shows the
 * 8X scaled image.
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
 * Modified by: Punya Prakash <pprakash@ti.com>
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
*/

/*
 * Header File Inclusion
 */
#include <stdio.h>
#include <unistd.h>
#include <fcntl.h>
#include <stdlib.h>
#include <errno.h>
#include <string.h>
#include <getopt.h>

#include <sys/ioctl.h>
#include <sys/mman.h>

#include <linux/videodev.h>
#include <linux/videodev2.h>

/*
 * Macros
 */
#define MAX_BUFFER		3
#define MAXLOOPCOUNT		5
#ifdef CONFIG_OMAP3530
	#define ORG_WIDTH		1000
	#define ORG_HEIGHT		1000
	#define SCALED_WIDTH		WIDTH
	#define SCALED_HEIGHT		HEIGHT
#elif CONFIG_AM3517
        #define ORG_WIDTH               800
        #define ORG_HEIGHT              600
        #define SCALED_WIDTH            WIDTH
        #define SCALED_HEIGHT           HEIGHT
#endif

/*
 * Static/global variables
 */
#ifdef CONFIG_OMAP3530
static char display_dev_name[30] = { "/dev/video7"};
#else
static char display_dev_name[30] = { "/dev/video1"};
#endif
static unsigned int loop_count = MAXLOOPCOUNT;
static int display_fd = 0;

struct buf_info {
	int index;
	unsigned int length;
	char *start;
};

static struct buf_info display_buff_info[MAX_BUFFER];
static int numbuffers = MAX_BUFFER;
static int dispheight, dispwidth, sizeimage;
struct v4l2_buffer buf;

/*
 * Release the display: unmap and close device.
*/
static int releaseDisplay(void)
{
	int i;
	for (i = 0; i < numbuffers; i++) {
		munmap(display_buff_info[i].start,
				display_buff_info[i].length);
		display_buff_info[i].start = NULL;
	}
	close(display_fd);
	display_fd = 0;
	return 0;
}

/*
 * Start Streaming
*/
static void startDisplay(void)
{
	int a = V4L2_BUF_TYPE_VIDEO_OUTPUT, ret;
	ret = ioctl(display_fd, VIDIOC_STREAMON, &a);
	if (ret < 0) {
		perror("VIDIOC_STREAMON\n");
		close(display_fd);
		exit(1);
	}
}

/*
 * Stop Streaming
*/
static void stopDisplay(void)
{
	int ret, a = V4L2_BUF_TYPE_VIDEO_OUTPUT;
	ret = ioctl(display_fd, VIDIOC_STREAMOFF, &a);
	if(ret < 0) {
		perror("Error in stopping display\n");
		close(display_fd);
		exit(1);
	}
}

/*
 * Color bar
 */
static short ycbcr[8] = {
	(0x1F << 11) | (0x3F << 5) | (0x1F),
	(0x00 << 11) | (0x00 << 5) | (0x00),
	(0x1F << 11) | (0x00 << 5) | (0x00),
	(0x00 << 11) | (0x3F << 5) | (0x00),
	(0x00 << 11) | (0x00 << 5) | (0x1F),
	(0x1F << 11) | (0x3F << 5) | (0x00),
	(0x1F << 11) | (0x00 << 5) | (0x1F),
	(0x00 << 11) | (0x3F << 5) | (0x1F),
};

static void color_bar(char *addr, int width, int height, int order)
{
	unsigned short *ptr = (unsigned short *)addr + order*width;
	int i, j, k;

	for(i = 0 ; i < 8 ; i ++) {
		for(j = 0 ; j < height / 8 ; j ++) {
			for(k = 0 ; k < width / 2 ; k ++, ptr++)
				*ptr = ycbcr[i];
			if((unsigned int)ptr > (unsigned int)addr +
					width*height)
				ptr = (unsigned short *)addr;
		}
	}
}
/*
 * Set the scaling pararmeters like buffer format, window size, crop size
 * and image size
 */
static void set_scaling(int scale_enable)
{

	struct v4l2_format fmt;
	int ret = 0;
	struct v4l2_crop crop;

	/* Get the parameters before setting and
	 * set only required parameters */
	fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
	ret = ioctl(display_fd, VIDIOC_G_FMT, &fmt);
	if(ret<0) {
		perror("Get Format failed\n");
		exit(1);
	}
	/* Set the image size to VGA and pixel format to RGB565 */
	fmt.fmt.pix.width = ORG_WIDTH;
	fmt.fmt.pix.height = ORG_HEIGHT;
	fmt.fmt.pix.pixelformat = V4L2_PIX_FMT_RGB565;
	ret = ioctl(display_fd, VIDIOC_S_FMT, &fmt);
	if(ret<0) {
		perror("Set Format failed\n");
		exit(1);
	}

	/* Get the parameters before setting and
	 * set only required parameters */
	crop.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
	ret = ioctl(display_fd, VIDIOC_G_CROP, &crop);
	if(ret<0) {
		perror("Get Crop failed\n");
		exit(1);
	}
	crop.c.left = 0;
	crop.c.top = 0;
	crop.c.width = ORG_WIDTH;
	crop.c.height = ORG_HEIGHT;
	ret = ioctl(display_fd, VIDIOC_S_CROP, &crop);
	if(ret<0) {
		perror("Set crop failed\n");
		exit(1);

	}

	/* Get the parameters before setting and
	 * set only required parameters */
	fmt.type = V4L2_BUF_TYPE_VIDEO_OVERLAY;
	ret = ioctl(display_fd, VIDIOC_G_FMT, &fmt);
	if(ret<0) {
		perror("Set Format failed\n");
		exit(1);
	}
	/* Set the image size to VGA and pixel format to RGB565 */
	fmt.fmt.win.w.left = 0;
	fmt.fmt.win.w.top = 0;
	if(scale_enable) {
		fmt.fmt.win.w.width = 720;
		fmt.fmt.win.w.height = 576;
	} else {
		fmt.fmt.win.w.width = 720;
		fmt.fmt.win.w.height = 576;
	}
	ret = ioctl(display_fd, VIDIOC_S_FMT, &fmt);
	if(ret<0) {
		perror("Set Format failed\n");
		exit(1);
	}

}

/* Get the negotiated parameters after calling set format
 * for buffer to be filled up
 */
static void get_format(int *dispheight, int *dispwidth, int *sizeimage)
{
	struct v4l2_format fmt;
	int ret = 0;
	/* It is necessary for applications to know about the
	 * buffer chacteristics that are set by the driver for
	 * proper handling of buffers These are : width,height,
	 * pitch and image size
	 * */
	fmt.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
	ret = ioctl(display_fd, VIDIOC_G_FMT, &fmt);
	if(ret<0){
		perror("Get Format failed\n");
		close(display_fd);
		exit(1);
	}
	*dispheight = fmt.fmt.pix.height;
	*dispwidth = fmt.fmt.pix.bytesperline;
	*sizeimage = fmt.fmt.pix.sizeimage;

}

/* Setup the buffers required for streaming like
  * request the buffers, mmap the buffers and queue the
  *  buffers before starting streaming
  */
static void setup_buffers(void)
{
	struct v4l2_requestbuffers reqbuf;
	int ret = 0, i;
	/* Now for the buffers.Request the number of buffers needed
	 * and the kind of buffers(User buffers or kernel buffers
	 * for memory mapping). Please note that the return value
	 * in the reqbuf.count might be lesser than numbuffers under
	 * some low memory circumstances */
	reqbuf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
	reqbuf.count = numbuffers;
	reqbuf.memory = V4L2_MEMORY_MMAP;

	ret = ioctl(display_fd, VIDIOC_REQBUFS, &reqbuf);
	if (ret < 0) {
		perror("Could not allocate the buffers\n");
		close(display_fd);
		exit(1);
	}

	numbuffers = reqbuf.count;
	for(i = 0 ; i < reqbuf.count ; i ++) {
		/* query */
		buf.index = i;
		buf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
		buf.memory = V4L2_MEMORY_MMAP;
		ret = ioctl(display_fd, VIDIOC_QUERYBUF, &buf);
		if (ret < 0) {
			perror("quering for buffer info failed\n");
			close(display_fd);
			exit(1);
		}
		/* mmap */
		display_buff_info[i].length = buf.length;
		display_buff_info[i].index = i;
		display_buff_info[i].start =
			mmap(NULL, buf.length, PROT_READ | PROT_WRITE,
					MAP_SHARED, display_fd, buf.m.offset);

		if ((unsigned int) display_buff_info[i].
				start == MAP_SHARED) {
			printf("Cannot mmap = %d buffer\n", i);
			close(display_fd);
			exit(1);
		}
		/*
		   After mapping each buffer, it is a good
		   idea to first "zero" them out.
		   Here it is being set to a mid grey-scale
		   Y=0x80, Cb=0x80, Cr=0x80
		 */
		memset(display_buff_info[i].start, 0x80, buf.length);

		/* Fill up the buffers with the values.*/
		color_bar(display_buff_info[i].start, dispwidth, dispheight,
				0);
	}

	for(i = 0 ; i < reqbuf.count ; i ++) {
		buf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
		buf.memory = V4L2_MEMORY_MMAP;
		buf.index = i;
		ret = ioctl(display_fd, VIDIOC_QBUF, &buf);
		if (ret < 0) {
			perror("VIDIOC_QBUF\n");
			close(display_fd);
			exit(1);
		}
	}
}

/* Open the video drvier node */
static void open_display(void)
{
	int mode = O_RDWR;
	struct v4l2_capability capability;

	display_fd = open((const char *)display_dev_name, mode);
	if(display_fd == -1) {
		perror("failed to open display device\n");
		exit(1);
	}
	/* Check if the device is capable of streaming */
	if (ioctl(display_fd, VIDIOC_QUERYCAP, &capability) < 0) {
		perror("VIDIOC_QUERYCAP");
		exit (1);
	}

}
/* Main function of application */
static int app_main(void)
{
	void *displaybuffer;
	int counter = 0;
	int ret = 0;

	/* Setting parameters for 90 degree rotation */
	/* open display channel */
	open_display();

	/* Set the format and scaling with argument as 0 no scaling */
	set_scaling(0);

	/* Get the negotiatied format */
	get_format(&dispheight, &dispwidth, &sizeimage);

	/*
	  1. Request the buffers
	   2. Query for the buffer info like the phys address
	   3. mmap the buffer to user space.
	   This information anout the buffers is currently stored in a user level
	   data structue
	 */
	setup_buffers();

	/* Start Displaying */
	startDisplay();

	/*
	   This is a running loop where the buffer is
	   DEQUEUED  <-----|  PROCESSED	|  & QUEUED -------|
	 */
	while(counter < loop_count) {
		/* Get display buffer using DQBUF ioctl */
		ret = ioctl(display_fd, VIDIOC_DQBUF, &buf);
		if (ret < 0) {
			perror("VIDIOC_DQBUF\n");
			return -1;
		}

		displaybuffer = display_buff_info[buf.index].start;

		/* queue it back to display it */
		buf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
		buf.memory = V4L2_MEMORY_MMAP;
		ret = ioctl(display_fd, VIDIOC_QBUF, &buf);
		if (ret < 0) {
			perror("VIDIOC_QBUF\n");
			return -1;
		}

		counter++;
	}

	/*
	   Once the streaming is done  stop the display  hardware  */
	stopDisplay();
	/* close  display channel */
	releaseDisplay();

	/* open display channel */
	open_display();

	/* set the scaling parameters  */
	set_scaling(1);

	/* Get the negotiatied format */
	get_format(&dispheight, &dispwidth, &sizeimage);

	/*
	  1. Request the buffers
	   2. Query for the buffer info like the phys address
	   3. mmap the buffer to user space.
	   This information anout the buffers is currently stored in a user level
	   data structue
	 */
	setup_buffers();

	/* Start Displaying */
	startDisplay();

	/*
	   This is a running loop where the buffer is
	   DEQUEUED  <-----|  PROCESSED	|  & QUEUED -------|
	 */
	counter = 0;

	printf("Unscaled image (%dx%d) was scaled by 3X-H and 8X-V (%dx%d) \n",
			ORG_WIDTH, ORG_HEIGHT, SCALED_WIDTH, SCALED_HEIGHT);

	while(counter < loop_count) {
		/* Get display buffer using DQBUF ioctl */
		ret = ioctl(display_fd, VIDIOC_DQBUF, &buf);
		if (ret < 0) {
			perror("VIDIOC_DQBUF\n");
			return -1;
		}

		displaybuffer = display_buff_info[buf.index].start;

		/* Now queue it back to display it */
		buf.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
		buf.memory = V4L2_MEMORY_MMAP;
		ret = ioctl(display_fd, VIDIOC_QBUF, &buf);
		if (ret < 0) {
			perror("VIDIOC_QBUF\n");
			return -1;
		}

		counter++;
	}

	/*
	   Once the streaming is done  stop the display  hardware  */
	stopDisplay();
	/* close  display channel */
	releaseDisplay();

	return 0;

}

static void usage(void)
{
	printf("Usage:saScalingDisplay [-d <device node>][-l <loop coult>][-h help]");
	printf("\t[-d <device node>]	: Device node as a string," \
			" default to /dev/video7\n" \
		"[-l <loop count>]	: Loop Count, default to 500\n" \
		"[-h <help>]		: Help\n");
}
int main(int argc, char *argv[])
{
	char shortoptions[] = "h:d:l:";
	int index, c;

	for (;;) {
		c = getopt_long(argc, argv, shortoptions, (void *) NULL,
				&index);
		if (-1 == c)
			break;
		switch (c) {
		case 0:
			break;
		case 'd':
		case 'D':
			strcpy(display_dev_name, optarg);
			break;
		case 'l':
		case 'L':
			loop_count = atoi(optarg);
			break;
		default:
		case 'h':
		case 'H':
			usage();
			exit(1);
		}
	}

	if(app_main())
		releaseDisplay();

	return 0;
}


    Regards,

    Josh

  • 0 in reply to Josh Elliott
    Intellectual 410 points

    Hi Josh,

    I'm not using DSI or any other kind of digitial video output. In my application, video is presented using the VENC DAC module of the microprocessor, and more precisely the composite video port.

    In any case, I'm going to compile, run and let you know the results of your program on my board.

    Kind regards and thanks for your help.

  • 0 in reply to Emilio Guijarro
    Intellectual 410 points

    Ok, getting 0525.saScalingDisplay.c up and running took me less time than I expected. Here are the results:

    Custom #defines:

    #define CONFIG_OMAP3530 1
    #define WIDTH 720
    #define HEIGHT 574

    Program output:

    Unscaled image (1000x1000) was scaled by 3X-H and 8X-V (720x574)

    Kernel output (dmesg):

    [  748.040344] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[  748.052215] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[  748.058929] omapdss MANAGER error: configure_overlay 2 failed

    Now, if I lower the ORG_WIDTH and ORG_HEIGHT constants to something like 800x600, everything works fine (no kernel errors), coloured bars appear on the analog video output.

    I hope this helps,

    Emilio.

    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Expert
                        3010 points
                      
    
                          
                   		
		
    
					
    Emilio,
    

    Thanks for the results.  Couple more things:
    

      

    1. To confirm, are you using unmodified uboot right now? (Before you had alter the PLL)
      2. 

    2. Can you make sure you are passing the debug parameter in the kernel bootargs?  There should be some more debug messages from the DSS when the program runs.
      3. 

    3. Can you run your test so that the unscaled image size is the same as what you are trying in your application?  Send me the logs.
      4. 

    

    Regards,
    

    Josh
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Josh Elliott
					
									
    
	
    
	                                    
                      
    
                        
                          Intellectual
                        410 points
                      
    
                          
                   		
		
    
					
    Hi Josh,
    

    here are the answers to your questions:
    

      

    1. Yes, my U-Boot is modified to achieve a ~173Mhz rate for DSS1_ALWON_FCLK, also known as dispc_fclk_rate. See 



      
    
      
        Fullscreen
        0535.u_boot_dss1_alwon_fclk.diff
        Download
    
      
    
      diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index c42c5dd..b21a038 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -475,9 +475,9 @@ core_36x_dpll_param:
 per_36x_dpll_param:
 /*    SYSCLK    M       N      M2      M3      M4     M5      M6      m2DIV */
 .word 12000,    360,    4,     9,      16,     5,     4,      3,      1
-.word 13000,    864,   12,     9,      16,     9,     4,      3,      1
+.word 13000,    864,   12,     9,      16,     5,     4,      3,      1
 .word 19200,    360,    7,     9,      16,     5,     4,      3,      1
-.word 26000,    432,   12,     9,      16,     9,     4,      3,      1
+.word 26000,    432,   12,     9,      16,     5,     4,      3,      1
 .word 38400,    360,   15,     9,      16,     5,     4,      3,      1
 
 .globl get_36x_mpu_dpll_param

      

      

.
      2. 

    2. Done, input resolution is 1024x768, output resolution is 720x574.
      3. 

    3. Done. see attached log.
      4. 

    

    



    
    
    
        Fullscreen
        3343.dispc.txt
        Download
    
    
    
    e failed for ovl 2
[   93.656982] omapdss DISPC: dispc_enable_plane 2, 0
[   93.657043] omapdss MANAGER error: configure_overlay 2 failed
[   93.663024] omapdss DISPC: GO DIGIT
[   93.678253] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.678253] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.678283] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.678314] omapdss MANAGER: configure_overlay(2)
[   93.678344] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.678375] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.678375] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.678405] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.678436] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   93.690307] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   93.696990] omapdss DISPC: dispc_enable_plane 2, 0
[   93.697021] omapdss MANAGER error: configure_overlay 2 failed
[   93.703002] omapdss DISPC: GO DIGIT
[   93.718231] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.718261] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.718292] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.718322] omapdss MANAGER: configure_overlay(2)
[   93.718322] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.718353] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.718383] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.718414] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.718444] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   93.730285] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   93.736999] omapdss DISPC: dispc_enable_plane 2, 0
[   93.737030] omapdss MANAGER error: configure_overlay 2 failed
[   93.743011] omapdss DISPC: GO DIGIT
[   93.758239] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.758270] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.758270] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.758300] omapdss MANAGER: configure_overlay(2)
[   93.758331] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.758361] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.758392] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.758422] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.758422] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   93.770294] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   93.777008] omapdss DISPC: dispc_enable_plane 2, 0
[   93.777038] omapdss MANAGER error: configure_overlay 2 failed
[   93.783020] omapdss DISPC: GO DIGIT
[   93.798248] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.798248] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.798278] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.798309] omapdss MANAGER: configure_overlay(2)
[   93.798339] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.798370] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.798400] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.798400] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.798431] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   93.810302] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   93.816986] omapdss DISPC: dispc_enable_plane 2, 0
[   93.817016] omapdss MANAGER error: configure_overlay 2 failed
[   93.822998] omapdss DISPC: GO DIGIT
[   93.838226] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.838256] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.838287] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.838317] omapdss MANAGER: configure_overlay(2)
[   93.838348] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.838378] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.838378] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.838409] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.838439] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   93.850311] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   93.856994] omapdss DISPC: dispc_enable_plane 2, 0
[   93.857025] omapdss MANAGER error: configure_overlay 2 failed
[   93.863006] omapdss DISPC: GO DIGIT
[   93.878234] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.878265] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.878295] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.878326] omapdss MANAGER: configure_overlay(2)
[   93.878356] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.878387] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.878387] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.878417] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.878448] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   93.890319] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   93.897003] omapdss DISPC: dispc_enable_plane 2, 0
[   93.897033] omapdss MANAGER error: configure_overlay 2 failed
[   93.903015] omapdss DISPC: GO DIGIT
[   93.918243] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.918273] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.918273] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.918304] omapdss MANAGER: configure_overlay(2)
[   93.918334] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.918365] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.918395] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.918395] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.918426] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   93.930297] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   93.937011] omapdss DISPC: dispc_enable_plane 2, 0
[   93.937042] omapdss MANAGER error: configure_overlay 2 failed
[   93.943023] omapdss DISPC: GO DIGIT
[   93.958251] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.958251] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.958282] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.958312] omapdss MANAGER: configure_overlay(2)
[   93.958343] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.958374] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.958374] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.958404] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.958435] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   93.970306] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   93.976989] omapdss DISPC: dispc_enable_plane 2, 0
[   93.977020] omapdss MANAGER error: configure_overlay 2 failed
[   93.983001] omapdss DISPC: GO DIGIT
[   93.998229] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.998260] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   93.998291] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   93.998321] omapdss MANAGER: configure_overlay(2)
[   93.998321] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   93.998352] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   93.998382] omapdss DISPC: required fclk rate = 197786759 Hz
[   93.998413] omapdss DISPC: current fclk rate = 172800000 Hz
[   93.998443] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.010284] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.016998] omapdss DISPC: dispc_enable_plane 2, 0
[   94.017028] omapdss MANAGER error: configure_overlay 2 failed
[   94.023010] omapdss DISPC: GO DIGIT
[   94.038238] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.038269] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.038269] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.038299] omapdss MANAGER: configure_overlay(2)
[   94.038330] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.038360] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.038391] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.038391] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.038421] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.050292] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.057006] omapdss DISPC: dispc_enable_plane 2, 0
[   94.057037] omapdss MANAGER error: configure_overlay 2 failed
[   94.063018] omapdss DISPC: GO DIGIT
[   94.078247] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.078247] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.078277] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.078308] omapdss MANAGER: configure_overlay(2)
[   94.078338] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.078369] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.078369] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.078399] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.078430] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.090301] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.096984] omapdss DISPC: dispc_enable_plane 2, 0
[   94.097015] omapdss MANAGER error: configure_overlay 2 failed
[   94.102996] omapdss DISPC: GO DIGIT
[   94.118225] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.118255] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.118286] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.118316] omapdss MANAGER: configure_overlay(2)
[   94.118316] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.118377] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.118377] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.118408] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.118438] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.130279] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.136993] omapdss DISPC: dispc_enable_plane 2, 0
[   94.137023] omapdss MANAGER error: configure_overlay 2 failed
[   94.143005] omapdss DISPC: GO DIGIT
[   94.158233] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.158264] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.158264] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.158294] omapdss MANAGER: configure_overlay(2)
[   94.158325] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.158355] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.158386] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.158416] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.158416] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.170288] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.177001] omapdss DISPC: dispc_enable_plane 2, 0
[   94.177032] omapdss MANAGER error: configure_overlay 2 failed
[   94.183013] omapdss DISPC: GO DIGIT
[   94.198242] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.198242] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.198272] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.198303] omapdss MANAGER: configure_overlay(2)
[   94.198333] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.198364] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.198394] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.198394] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.198425] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.210296] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.216979] omapdss DISPC: dispc_enable_plane 2, 0
[   94.217010] omapdss MANAGER error: configure_overlay 2 failed
[   94.222991] omapdss DISPC: GO DIGIT
[   94.238250] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.238250] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.238281] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.238311] omapdss MANAGER: configure_overlay(2)
[   94.238342] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.238372] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.238372] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.238403] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.238433] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.250305] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.256988] omapdss DISPC: dispc_enable_plane 2, 0
[   94.257019] omapdss MANAGER error: configure_overlay 2 failed
[   94.263000] omapdss DISPC: GO DIGIT
[   94.278228] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.278259] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.278289] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.278320] omapdss MANAGER: configure_overlay(2)
[   94.278320] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.278350] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.278381] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.278411] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.278411] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.290283] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.296966] omapdss DISPC: dispc_enable_plane 2, 0
[   94.296997] omapdss MANAGER error: configure_overlay 2 failed
[   94.303009] omapdss DISPC: GO DIGIT
[   94.318237] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.318237] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.318267] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.318298] omapdss MANAGER: configure_overlay(2)
[   94.318328] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.318359] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.318389] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.318389] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.318420] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.330291] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.336975] omapdss DISPC: dispc_enable_plane 2, 0
[   94.337005] omapdss MANAGER error: configure_overlay 2 failed
[   94.342987] omapdss DISPC: GO DIGIT
[   94.358245] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.358245] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.358276] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.358306] omapdss MANAGER: configure_overlay(2)
[   94.358337] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.358367] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.358367] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.358398] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.358428] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.370300] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.376983] omapdss DISPC: dispc_enable_plane 2, 0
[   94.377014] omapdss MANAGER error: configure_overlay 2 failed
[   94.382995] omapdss DISPC: GO DIGIT
[   94.398223] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.398254] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.398284] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.398315] omapdss MANAGER: configure_overlay(2)
[   94.398315] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.398345] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.398376] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.398406] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.398437] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.410278] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.416992] omapdss DISPC: dispc_enable_plane 2, 0
[   94.417022] omapdss MANAGER error: configure_overlay 2 failed
[   94.423004] omapdss DISPC: GO DIGIT
[   94.438232] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.438262] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.438262] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.438293] omapdss MANAGER: configure_overlay(2)
[   94.438323] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.438354] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.438385] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.438415] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.438415] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.450286] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.457000] omapdss DISPC: dispc_enable_plane 2, 0
[   94.457031] omapdss MANAGER error: configure_overlay 2 failed
[   94.463012] omapdss DISPC: GO DIGIT
[   94.478240] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.478240] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.478271] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.478302] omapdss MANAGER: configure_overlay(2)
[   94.478332] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.478363] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.478393] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.478393] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.478424] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.490295] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.496978] omapdss DISPC: dispc_enable_plane 2, 0
[   94.497009] omapdss MANAGER error: configure_overlay 2 failed
[   94.502990] omapdss DISPC: GO DIGIT
[   94.518218] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.518249] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.518280] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.518310] omapdss MANAGER: configure_overlay(2)
[   94.518341] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.518371] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.518371] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.518402] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.518432] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.530273] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.536987] omapdss DISPC: dispc_enable_plane 2, 0
[   94.537017] omapdss MANAGER error: configure_overlay 2 failed
[   94.542999] omapdss DISPC: GO DIGIT
[   94.558258] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.558258] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.558288] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.558319] omapdss MANAGER: configure_overlay(2)
[   94.558349] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.558380] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.558380] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.558410] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.558441] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.570312] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.576995] omapdss DISPC: dispc_enable_plane 2, 0
[   94.577026] omapdss MANAGER error: configure_overlay 2 failed
[   94.583007] omapdss DISPC: GO DIGIT
[   94.598266] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.598297] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.598327] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.598358] omapdss MANAGER: configure_overlay(2)
[   94.598358] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.598388] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.598419] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.598449] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.598449] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.610321] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.617034] omapdss DISPC: dispc_enable_plane 2, 0
[   94.617065] omapdss MANAGER error: configure_overlay 2 failed
[   94.623046] omapdss DISPC: GO DIGIT
[   94.638244] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.638244] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.638275] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.638305] omapdss MANAGER: configure_overlay(2)
[   94.638336] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.638366] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.638397] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.638397] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.638427] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.650299] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.656982] omapdss DISPC: dispc_enable_plane 2, 0
[   94.657012] omapdss MANAGER error: configure_overlay 2 failed
[   94.662994] omapdss DISPC: GO DIGIT
[   94.678222] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.678253] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.678283] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.678314] omapdss MANAGER: configure_overlay(2)
[   94.678314] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.678344] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.678375] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.678405] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.678436] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.690277] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.696990] omapdss DISPC: dispc_enable_plane 2, 0
[   94.697021] omapdss MANAGER error: configure_overlay 2 failed
[   94.703002] omapdss DISPC: GO DIGIT
[   94.718231] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.718261] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.718261] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.718292] omapdss MANAGER: configure_overlay(2)
[   94.718322] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.718353] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.718383] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.718383] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.718414] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.730285] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.736968] omapdss DISPC: dispc_enable_plane 2, 0
[   94.736999] omapdss MANAGER error: configure_overlay 2 failed
[   94.743011] omapdss DISPC: GO DIGIT
[   94.758239] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.758270] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.758270] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.758300] omapdss MANAGER: configure_overlay(2)
[   94.758331] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.758361] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.758392] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.758392] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.758422] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.770294] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.776977] omapdss DISPC: dispc_enable_plane 2, 0
[   94.777008] omapdss MANAGER error: configure_overlay 2 failed
[   94.783020] omapdss DISPC: GO DIGIT
[   94.798217] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.798248] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.798278] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.798309] omapdss MANAGER: configure_overlay(2)
[   94.798309] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.798370] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.798370] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.798400] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.798431] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.810272] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.816986] omapdss DISPC: dispc_enable_plane 2, 0
[   94.817016] omapdss MANAGER error: configure_overlay 2 failed
[   94.822998] omapdss DISPC: GO DIGIT
[   94.838226] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.838256] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.838287] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.838287] omapdss MANAGER: configure_overlay(2)
[   94.838317] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.838348] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.838378] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.838409] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.838409] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.850280] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.856964] omapdss DISPC: dispc_enable_plane 2, 0
[   94.856994] omapdss MANAGER error: configure_overlay 2 failed
[   94.863006] omapdss DISPC: GO DIGIT
[   94.878234] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.878234] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.878265] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.878295] omapdss MANAGER: configure_overlay(2)
[   94.878326] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.878356] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.878387] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.878387] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.878417] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.890289] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.896972] omapdss DISPC: dispc_enable_plane 2, 0
[   94.897003] omapdss MANAGER error: configure_overlay 2 failed
[   94.902984] omapdss DISPC: GO DIGIT
[   94.918243] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.918273] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.918304] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.918334] omapdss MANAGER: configure_overlay(2)
[   94.918365] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.918395] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.918426] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.918426] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.918457] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.930328] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.937042] omapdss DISPC: dispc_enable_plane 2, 0
[   94.937072] omapdss MANAGER error: configure_overlay 2 failed
[   94.943084] omapdss DISPC: GO DIGIT
[   94.958221] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.958251] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.958282] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.958312] omapdss MANAGER: configure_overlay(2)
[   94.958343] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.958374] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.958404] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.958404] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.958435] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   94.970306] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   94.977020] omapdss DISPC: dispc_enable_plane 2, 0
[   94.977050] omapdss MANAGER error: configure_overlay 2 failed
[   94.983062] omapdss DISPC: GO DIGIT
[   94.998229] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.998260] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   94.998291] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   94.998321] omapdss MANAGER: configure_overlay(2)
[   94.998321] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   94.998352] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   94.998382] omapdss DISPC: required fclk rate = 197786759 Hz
[   94.998413] omapdss DISPC: current fclk rate = 172800000 Hz
[   94.998443] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.010284] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.016998] omapdss DISPC: dispc_enable_plane 2, 0
[   95.017028] omapdss MANAGER error: configure_overlay 2 failed
[   95.023010] omapdss DISPC: GO DIGIT
[   95.038238] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.038238] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.038269] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.038299] omapdss MANAGER: configure_overlay(2)
[   95.038330] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.038360] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.038391] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.038391] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.038421] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.050292] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.056976] omapdss DISPC: dispc_enable_plane 2, 0
[   95.057037] omapdss MANAGER error: configure_overlay 2 failed
[   95.063018] omapdss DISPC: GO DIGIT
[   95.078216] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.078247] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.078277] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.078308] omapdss MANAGER: configure_overlay(2)
[   95.078308] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.078338] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.078369] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.078399] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.078430] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.090270] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.096984] omapdss DISPC: dispc_enable_plane 2, 0
[   95.097015] omapdss MANAGER error: configure_overlay 2 failed
[   95.102996] omapdss DISPC: GO DIGIT
[   95.118225] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.118255] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.118286] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.118316] omapdss MANAGER: configure_overlay(2)
[   95.118316] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.118347] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.118377] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.118408] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.118408] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.130279] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.136993] omapdss DISPC: dispc_enable_plane 2, 0
[   95.137023] omapdss MANAGER error: configure_overlay 2 failed
[   95.143005] omapdss DISPC: GO DIGIT
[   95.158233] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.158233] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.158264] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.158294] omapdss MANAGER: configure_overlay(2)
[   95.158325] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.158355] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.158386] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.158386] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.158416] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.170288] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.176971] omapdss DISPC: dispc_enable_plane 2, 0
[   95.177001] omapdss MANAGER error: configure_overlay 2 failed
[   95.183013] omapdss DISPC: GO DIGIT
[   95.198242] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.198242] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.198272] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.198303] omapdss MANAGER: configure_overlay(2)
[   95.198333] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.198364] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.198364] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.198394] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.198425] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.210266] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.216979] omapdss DISPC: dispc_enable_plane 2, 0
[   95.217010] omapdss MANAGER error: configure_overlay 2 failed
[   95.222991] omapdss DISPC: GO DIGIT
[   95.238220] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.238250] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.238281] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.238311] omapdss MANAGER: configure_overlay(2)
[   95.238311] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.238342] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.238372] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.238403] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.238433] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.250274] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.256988] omapdss DISPC: dispc_enable_plane 2, 0
[   95.257019] omapdss MANAGER error: configure_overlay 2 failed
[   95.263000] omapdss DISPC: GO DIGIT
[   95.278228] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.278259] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.278259] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.278289] omapdss MANAGER: configure_overlay(2)
[   95.278320] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.278350] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.278381] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.278381] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.278411] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.290283] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.296997] omapdss DISPC: dispc_enable_plane 2, 0
[   95.297027] omapdss MANAGER error: configure_overlay 2 failed
[   95.303009] omapdss DISPC: GO DIGIT
[   95.318237] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.318237] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.318267] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.318298] omapdss MANAGER: configure_overlay(2)
[   95.318328] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.318359] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.318359] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.318389] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.318420] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.330291] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.336975] omapdss DISPC: dispc_enable_plane 2, 0
[   95.337005] omapdss MANAGER error: configure_overlay 2 failed
[   95.342987] omapdss DISPC: GO DIGIT
[   95.358215] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.358245] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.358276] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.358306] omapdss MANAGER: configure_overlay(2)
[   95.358306] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.358337] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.358367] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.358398] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.358428] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.370269] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.376983] omapdss DISPC: dispc_enable_plane 2, 0
[   95.377014] omapdss MANAGER error: configure_overlay 2 failed
[   95.382995] omapdss DISPC: GO DIGIT
[   95.398223] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.398254] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.398254] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.398284] omapdss MANAGER: configure_overlay(2)
[   95.398315] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.398345] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.398376] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.398406] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.398406] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.410278] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.416961] omapdss DISPC: dispc_enable_plane 2, 0
[   95.416992] omapdss MANAGER error: configure_overlay 2 failed
[   95.423004] omapdss DISPC: GO DIGIT
[   95.438232] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.438232] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.438262] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.438293] omapdss MANAGER: configure_overlay(2)
[   95.438323] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.438354] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.438385] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.438385] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.438415] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.450286] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.456970] omapdss DISPC: dispc_enable_plane 2, 0
[   95.457000] omapdss MANAGER error: configure_overlay 2 failed
[   95.463012] omapdss DISPC: GO DIGIT
[   95.478210] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.478240] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.478271] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.478302] omapdss MANAGER: configure_overlay(2)
[   95.478332] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.478363] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.478363] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.478393] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.478424] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.490295] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.496978] omapdss DISPC: dispc_enable_plane 2, 0
[   95.497009] omapdss MANAGER error: configure_overlay 2 failed
[   95.502990] omapdss DISPC: GO DIGIT
[   95.518218] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.518249] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.518280] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.518310] omapdss MANAGER: configure_overlay(2)
[   95.518310] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.518341] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.518371] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.518402] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.518402] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.530273] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.536987] omapdss DISPC: dispc_enable_plane 2, 0
[   95.537017] omapdss MANAGER error: configure_overlay 2 failed
[   95.542999] omapdss DISPC: GO DIGIT
[   95.558227] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.558258] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.558288] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.558319] omapdss MANAGER: configure_overlay(2)
[   95.558319] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.558349] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.558380] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.558410] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.558441] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.570281] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.576995] omapdss DISPC: dispc_enable_plane 2, 0
[   95.577026] omapdss MANAGER error: configure_overlay 2 failed
[   95.583007] omapdss DISPC: GO DIGIT
[   95.598236] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.598236] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.598266] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.598297] omapdss MANAGER: configure_overlay(2)
[   95.598327] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.598358] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.598358] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.598388] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.598419] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.610290] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.616973] omapdss DISPC: dispc_enable_plane 2, 0
[   95.617004] omapdss MANAGER error: configure_overlay 2 failed
[   95.622985] omapdss DISPC: GO DIGIT
[   95.638214] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.638244] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.638275] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.638305] omapdss MANAGER: configure_overlay(2)
[   95.638305] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.638336] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.638366] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.638397] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.638427] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.650268] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.656982] omapdss DISPC: dispc_enable_plane 2, 0
[   95.657012] omapdss MANAGER error: configure_overlay 2 failed
[   95.662994] omapdss DISPC: GO DIGIT
[   95.678222] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.678253] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.678253] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.678283] omapdss MANAGER: configure_overlay(2)
[   95.678314] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.678344] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.678375] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.678405] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.678405] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.690277] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.696960] omapdss DISPC: dispc_enable_plane 2, 0
[   95.696990] omapdss MANAGER error: configure_overlay 2 failed
[   95.702972] omapdss DISPC: GO DIGIT
[   95.718231] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.718231] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.718261] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.718292] omapdss MANAGER: configure_overlay(2)
[   95.718322] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.718353] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.718383] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.718383] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.718414] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.730285] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.736968] omapdss DISPC: dispc_enable_plane 2, 0
[   95.736999] omapdss MANAGER error: configure_overlay 2 failed
[   95.742980] omapdss DISPC: GO DIGIT
[   95.758209] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.758239] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.758270] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.758300] omapdss MANAGER: configure_overlay(2)
[   95.758331] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.758361] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.758361] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.758392] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.758422] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.770294] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.776977] omapdss DISPC: dispc_enable_plane 2, 0
[   95.777008] omapdss MANAGER error: configure_overlay 2 failed
[   95.782989] omapdss DISPC: GO DIGIT
[   95.798217] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.798248] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.798278] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.798309] omapdss MANAGER: configure_overlay(2)
[   95.798309] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.798339] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.798370] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.798400] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.798400] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.810272] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.816986] omapdss DISPC: dispc_enable_plane 2, 0
[   95.817016] omapdss MANAGER error: configure_overlay 2 failed
[   95.822998] omapdss DISPC: GO DIGIT
[   95.838226] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.838256] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.838256] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.838287] omapdss MANAGER: configure_overlay(2)
[   95.838317] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.838348] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.838378] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.838378] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.838409] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.850280] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.856964] omapdss DISPC: dispc_enable_plane 2, 0
[   95.856994] omapdss MANAGER error: configure_overlay 2 failed
[   95.863006] omapdss DISPC: GO DIGIT
[   95.878234] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.878234] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.878265] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.878295] omapdss MANAGER: configure_overlay(2)
[   95.878326] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.878356] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.878387] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.878417] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.878417] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.890289] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.896972] omapdss DISPC: dispc_enable_plane 2, 0
[   95.897033] omapdss MANAGER error: configure_overlay 2 failed
[   95.903015] omapdss DISPC: GO DIGIT
[   95.918212] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.918243] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.918273] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.918304] omapdss MANAGER: configure_overlay(2)
[   95.918334] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.918365] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.918365] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.918395] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.918426] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.930267] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.936981] omapdss DISPC: dispc_enable_plane 2, 0
[   95.937011] omapdss MANAGER error: configure_overlay 2 failed
[   95.942993] omapdss DISPC: GO DIGIT
[   95.958221] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.958251] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.958251] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.958282] omapdss MANAGER: configure_overlay(2)
[   95.958312] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.958343] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.958374] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.958404] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.958404] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   95.970275] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   95.976989] omapdss DISPC: dispc_enable_plane 2, 0
[   95.977020] omapdss MANAGER error: configure_overlay 2 failed
[   95.983001] omapdss DISPC: GO DIGIT
[   95.998229] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.998229] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   95.998260] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   95.998291] omapdss MANAGER: configure_overlay(2)
[   95.998321] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   95.998352] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   95.998382] omapdss DISPC: required fclk rate = 197786759 Hz
[   95.998382] omapdss DISPC: current fclk rate = 172800000 Hz
[   95.998413] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   96.010284] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   96.016967] omapdss DISPC: dispc_enable_plane 2, 0
[   96.016998] omapdss MANAGER error: configure_overlay 2 failed
[   96.022979] omapdss DISPC: GO DIGIT
[   96.038208] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   96.038238] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   96.038269] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   96.038299] omapdss MANAGER: configure_overlay(2)
[   96.038330] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   96.038360] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   96.038360] omapdss DISPC: required fclk rate = 197786759 Hz
[   96.038391] omapdss DISPC: current fclk rate = 172800000 Hz
[   96.038421] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   96.050292] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   96.056976] omapdss DISPC: dispc_enable_plane 2, 0
[   96.057006] omapdss MANAGER error: configure_overlay 2 failed
[   96.062988] omapdss DISPC: GO DIGIT
[   96.078216] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   96.078247] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   96.078277] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   96.078308] omapdss MANAGER: configure_overlay(2)
[   96.078308] omapdss DISPC: dispc_setup_plane 2, pa 85800000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   96.078338] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   96.078369] omapdss DISPC: required fclk rate = 197786759 Hz
[   96.078399] omapdss DISPC: current fclk rate = 172800000 Hz
[   96.078399] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   96.090270] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   96.096954] omapdss DISPC: dispc_enable_plane 2, 0
[   96.097015] omapdss MANAGER error: configure_overlay 2 failed
[   96.102996] omapdss DISPC: GO DIGIT
[   96.118225] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   96.118225] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   96.118255] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   96.118286] omapdss MANAGER: configure_overlay(2)
[   96.118316] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   96.118347] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   96.118377] omapdss DISPC: required fclk rate = 197786759 Hz
[   96.118377] omapdss DISPC: current fclk rate = 172800000 Hz
[   96.118408] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   96.130279] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   96.136962] omapdss DISPC: dispc_enable_plane 2, 0
[   96.136993] omapdss MANAGER error: configure_overlay 2 failed
[   96.143005] omapdss DISPC: GO DIGIT
[   96.158233] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   96.158233] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   96.158264] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[   96.158294] omapdss MANAGER: configure_overlay(2)
[   96.158325] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[   96.158355] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[   96.158355] omapdss DISPC: required fclk rate = 197786759 Hz
[   96.158386] omapdss DISPC: current fclk rate = 172800000 Hz
[   96.158416] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[   96.170257] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[   96.176971] omapdss DISPC: dispc_enable_plane 2, 0
[   96.177001] omapdss MANAGER error: configure_overlay 2 failed
[   96.182983] omapdss DISPC: GO DIGIT
[   96.183227] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   96.185089] omapdss MANAGER: omap_dss_mgr_apply(tv)
[   96.198242] omapdss MANAGER: configure_overlay(2)
[   96.198272] omapdss DISPC: dispc_enable_plane 2, 0
[   96.198303] omapdss DISPC: GO DIGIT

    

    


    

    Regards,
    

    Emilio.
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          Intellectual
                        410 points
                      
    
                          
                   		
		
    
					
    Josh,
    

    sorry but the log I atteched in my previous posting had too much redundant information and was missing the initial traces of the display configuration. Here's a much better one:
    

    [  108.753662] omapdss OVERLAY: check_overlay 2: (0,0 720x574 -> 720x574) disp (720x574)
[  108.753692] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[  108.753723] omapdss MANAGER: omap_dss_mgr_apply(tv)
[  108.753753] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[  108.753875] omapdss MANAGER: configure_overlay(2)
[  108.753875] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[  108.753936] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[  108.753936] omapdss DISPC: required fclk rate = 197786759 Hz
[  108.753967] omapdss DISPC: current fclk rate = 172800000 Hz
[  108.753997] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[  108.765899] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[  108.772644] omapdss DISPC: dispc_enable_plane 2, 0
[  108.772674] omapdss MANAGER error: configure_overlay 2 failed
[  108.778686] omapdss DISPC: GO DIGIT
[  108.799835] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[  108.799865] omapdss MANAGER: omap_dss_mgr_apply(tv)
[  108.799926] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[  108.800018] omapdss MANAGER: configure_overlay(2)
[  108.800048] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[  108.800079] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[  108.800109] omapdss DISPC: required fclk rate = 197786759 Hz
[  108.800109] omapdss DISPC: current fclk rate = 172800000 Hz
[  108.800140] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[  108.812042] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[  108.818756] omapdss DISPC: dispc_enable_plane 2, 0
[  108.818786] omapdss MANAGER error: configure_overlay 2 failed
[  108.824798] omapdss DISPC: GO DIGIT
[  108.825225] omapdss MANAGER: omap_dss_mgr_apply(tv)
[  108.827209] omapdss MANAGER: omap_dss_mgr_apply(tv)
[  108.839843] omapdss MANAGER: configure_overlay(2)
[  108.839843] omapdss DISPC: dispc_enable_plane 2, 0
[  108.839904] omapdss DISPC: GO DIGIT
[  108.988403] omapdss OVERLAY: check_overlay 2: (0,0 720x574 -> 720x574) disp (720x574)
[  108.988433] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[  108.988464] omapdss MANAGER: omap_dss_mgr_apply(tv)
[  108.988494] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[  108.988555] omapdss MANAGER: configure_overlay(2)
[  108.988555] omapdss DISPC: dispc_setup_plane 2, pa 86000000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[  108.988586] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[  108.988616] omapdss DISPC: required fclk rate = 197786759 Hz
[  108.988647] omapdss DISPC: current fclk rate = 172800000 Hz
[  108.988677] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[  109.000610] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[  109.007354] omapdss DISPC: dispc_enable_plane 2, 0
[  109.007385] omapdss MANAGER error: configure_overlay 2 failed
[  109.013397] omapdss DISPC: GO DIGIT
[  109.039855] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[  109.039886] omapdss MANAGER: omap_dss_mgr_apply(tv)
[  109.039886] omapdss OVERLAY: check_overlay 2: (0,0 1024x720 -> 720x574) disp (720x574)
[  109.039947] omapdss MANAGER: configure_overlay(2)
[  109.039978] omapdss DISPC: dispc_setup_plane 2, pa 85c00000, sw 1024, 0,0, 1024x720 -> 720x574, ilace 1, cmode 40, rot 0, mir 0
[  109.040008] omapdss DISPC: adjusting for ilace: height 720, pos_y 0, out_height 287
[  109.040039] omapdss DISPC: required fclk rate = 197786759 Hz
[  109.040069] omapdss DISPC: current fclk rate = 172800000 Hz
[  109.040100] omapdss DISPC error: failed to set up scaling, required fclk rate = 197786759 Hz, current fclk rate = 172800000 Hz
[  109.052001] omapdss MANAGER error: dispc_setup_plane failed for ovl 2
[  109.058746] omapdss DISPC: dispc_enable_plane 2, 0
[  109.058776] omapdss MANAGER error: configure_overlay 2 failed
[  109.064819] omapdss DISPC: GO DIGIT
[  109.065124] omapdss MANAGER: omap_dss_mgr_apply(tv)
[  109.067016] omapdss MANAGER: omap_dss_mgr_apply(tv)
[  109.079833] omapdss MANAGER: configure_overlay(2)
[  109.079864] omapdss DISPC: dispc_enable_plane 2, 0
[  109.079925] omapdss DISPC: GO DIGIT

    

    

    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Expert
                        3010 points
                      
    
                          
                   		
		
    
					
    Hi Emilio,
    

    Thanks for the log.  I don't see anything that explains the clock limitation further, but I do have some other leads;
    

    I have been doing some experiments with SDK 6.0 (which is the latest for AM37x and AM35x platforms), and with this same test I am able to scale images that require fclk greater than 96 MHz, although I am using DPI output to LCD.  Makes me think our next step is to follow the patches from your SDK to 6.0 with respect to DSS drivers and clock framework.
    

    However, one concern I have is that if we are able to get the needed fclk for your scaling requirements, we may start running into DSS FIFO underflows, which are a known hardware limitation; it generally manifests itself with downscaling, and I have been seeing it a lot in my SDK 6.0 tests relating your issue.  We'll have to focus on that issue when we get there, though.
    

    Regards,
    

    Josh
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Josh Elliott
					
									
    
	
    
	                                    
                      
    
                        
                          Intellectual
                        410 points
                      
    
                          
                   		
		
    
					
    Hi Josh,
    

    I've been studying the differences between TI's SDK v6 and v5:
    

      

    • Both SDKs feature the same base version for U-Boot (2012-04-01) and the Linux Kernel (2.6.37).
      • 

    • U-Boot only has a couple new patches, which don't seem to me very relevant to our particular problem: 0001-ARM-omap3-Set-SPL-stack-size-to-8KB-image-to-54KB.patch and 0001-armv7-Unaligned-access-fix.patch
      • 

    • Same situation with the kernel: 0001-arm-fix-builds-with-gcc-4.7.patch
      • 

    

    My guess is that, in this case, using different output ports (DPI instead of analog video) has more to do with the difficulties you're facing reproducing this issue. Have you considered setting up a test envinronment using TV-out?
    

    Kind regards,
    

    Emilio.
    

    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Expert
                        3010 points
                      
    
                          
                   		
		
    
					
    HI Emilio,
    

    I just compared the kernel from SDK6 and SDK5, and it does indeed look like there are no changes that could account for this.
    

    I would definitely prefer to be testing with tvout, however I have not yet gotten my hands on the proper daughter card for for my EVM, nor do I have a tv with composite input at the moment.  I definitely agree with you that now it seems the major culprit is the clock framework that feeds the tvout capping the max fclk.  Like I said, my major concern now is that based on my tests with DPI output on the EVM, the scaling requirements you have now seem to immediately cause a FIFO underflow in the DSS.
    

    That being said, I will continue to look through the patch trail from 2.6.37 to 3.14 to see if there are patches available that improve the clocking capabilities for tvout.
    

    Regards,
    

    Josh
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Josh Elliott
					
									
    
	
    
	                                    
                      
    
                        
                          Intellectual
                        410 points
                      
    
                          
                   		
		
    
					
    Hello Josh,
    

    Ok, please keep us posted on any new developments. Also, I hope you can get the necessary tools to reproduce the issue as soon as possible (daughter card, TV, etc).
    

    Kind regards,
    

    Emilio.
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          Intellectual
                        410 points
                      
    
                          
                   		
		
    
					
    Hi Josh,
    

    any developments on this issue?
    

    Kind regards.
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Expert
                        3010 points
                      
    
                          
                   		
		
    
					
    Hi Emilio,
    

    I tried forcing output to tv and I can see the error you are getting.
    

    Furthermore, I did some experiments with DPI output, and the scaling requirements you have cause a sync loss and fifo underflow to occur, and in this case we do get the required fclk needed for the scaling due to a different clock source being used.
    

    It looks very likely that downscaling at this higher resolution by this factor is simply 1) beyond what the PLL that the clocking infrastructure uses to supply fclk for tv output can handle and 2) beyond the bandwidth limits of what it takes to keep the 1kB fifos the feed the video planes in good order.
    

    At this point, I would say the best course of action to take would to find another way to do the downscaling you need without doing it all at once in the video plane.  Perhaps using the 2nd video plane in writeback mode as a 1 stage scaling, and then your display video plane in output mode to do the final amount of scaling could work for your application.
    

    Regards,
    

    Josh
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Josh Elliott
					
									
    
	
    
	                                    
                      
    
                        
                          Intellectual
                        410 points
                      
    
                          
                   		
		
    
					
    Hello Josh,
    

    thanks for investing time and effort in further analysis of this problem, and proposing a solution. My question now is, how does your suggestion translate to sysfs or V4L2 calls in userspace? are there any sample programs or documentation illustrating these techniques?
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Expert
                        3010 points
                      
    
                          
                   		
		
    
					
    Hi Emilio,
    

    Sorry for the delay--I have been on vacation.
    

    I've been looking into alternatives as I mentioned before.  Unfortunately it looks like write-back capability will not work on AM37x.
    

    Can you run some tests to determine the scaling threshold before errors occur?  I ask this because the initial scaling could be done in software, and then the rest could be done by the DSS.  An even simpler thing to do would be to crop the image manually before sending it to the DSS.  Let me know what you think.
    

    Regards,
    

    Josh
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Josh Elliott
					
									
    
	
    
	                                    
                      
    
                        
                          Intellectual
                        410 points
                      
    
                          
                   		
		
    
					
    Hi Josh,
    

    nevermind about the delay, I hope you've enjoyed your deserved vacations.
    

    We've already studied the practical limits of the hardware scaler under our 2.6.37 kernel, and the highest resolution reached at 4:3 aspect ratio and 16-byte line alignment has been 928x696.
    

    We've certainly considered cropping and "hybrid" scaling using software and hardware, but we wanted to completely rule out full hardware scaling first.
    

    Now that we are reaching the end of this topic, please help me summarize our findings:
    

      

    • Is this a hardware limitation, or just a software architecture limitation in certain kernels?
      • 

    • If it is a software limitation, which kernel version solves it, if any?
      • 

    

    Regards,
    

    Emilio.
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          TI__Expert
                        3010 points
                      
    
                          
                   		
		
    
					
    Hi Emilio,
    

    We can rule out a hardware limitation because new Sitara devices that use the same DSS do not show this exact issue on the 3.12 kernel.  There are still some clocking issues with scaling even on 3.12, but many of them seem to have been fixed on 3.15 (based on git patch logs--I haven't had any hands on testing with 3.15).
    

    Regards,
    

    Josh
    

    

    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                 	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to Emilio Guijarro
					
									
    
	
    
	                                    
                      
    
                        
                          Prodigy
                        230 points
                      
    
                          
                   		
		
    
					
    

    


    


    
    

    

    Hi,
    

    I wonder how can I accomplish the image resizing process. Do I need another image resizing SDK to help customize the size of images with these code? I am almost a green hand here. Any suggestion will be appreciated. Thanks in advance.
    

    

    

    

    Best regards,
    

    Arron
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to arron lee
					
									
    
	
    
	                                    
                      
    
                        
                          Intellectual
                        410 points
                      
    
                          
                   		
		
    
					
    Hi Arron,
    

    
Sorry for not answering before, been away in vacation.
    

    
I don't think you need an image resizing SDK, specially not the one you linked (are you running .NET on an ARM board?). 
    

    
I achieved V4L capture->display image resizing using a combination of the V4L commands described here:
    

    
processors.wiki.ti.com/.../UserGuideDisplayDrivers_PSP_04.02.00.07
    

    
Regards,
    
Emilio.
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    • 

		
	
  • 
		
    
			 


	
		
	
	









    
	
    
		
    
							
					
    
		
    
			
													0
							
			
				
									
							
						
				
			
			
			
												
						in reply to arron lee
					
									
    
	
    
	                                    
                      
    
                        
                          Expert
                        1510 points
                      
    
                          
                   		
		
    
					
    Arron,
    

    What platform are you using, and what SDK? If you are on AM37x or DM37x, you can use the Display Subsystem to do image resizing via v4l2. If you are on AM335x, there is no hardware scaling other than the GPU (You could look into something like this for OpenGL resizing with the GPU). If you are using AM437x, you can use fbdev or DRM to access the scaling capabilities of the Display Sub System in that part. You can find more info on the Sitara Linux Display wiki.
    
			
    

		
		
		
		
	
    
	
    
		
    
			
		
    
	
    

	            
                	
	
    
				
		                
                
                
                
                
                
                
        		
		
				
    
			
		
    
		
		 
		
		
     
    
	
    

    
			
    
			
    
		
    

		
    
	
    •