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How to achieve highest emif16 transfer speed?

Other Parts Discussed in Thread: TMS320C6678

Hi,

I am using TMS320C6678 evaluation board to read data on emif16 from FPGA. So, when i am checking control signals during read cycle of simultaneous transfer i am getting 170ns between two output enable low's.

I want data to be transferred at maximum speed, how can i increase the speed?

i have used following configuration for registers:

EMIF16_REGS->RCSR  = 0x00000205;
EMIF16_REGS->AWCCR = 0xF0040080;
EMIF16_REGS->A0CR  = 0x00000002;
EMIF16_REGS->A1CR  = 0x00000002;
EMIF16_REGS->A2CR  = 0x00000002;
EMIF16_REGS->A3CR  = 0x00000002;
I have written following code to read the data on emif for 5 times:

Uint16 EMIFA_read(unsigned chipID, Uint32 internalAddress) { assert(chipID<NUMBER_OF_CHIPS); {
Uint32 i;
for(i=internalAddress;i<5;i++)
{
Uint16* pValue = (Uint16*)(CE[chipID].baseAddress + (2*i));
Uint16 value = *pValue; // you can read *pValue only once (since it retreives it's data from the remote location), read value as much as you want, it's on the stack
//printf("Chip %d Addr: %08x dsp: %08x Read %04x\n",chipID,internalAddress,pValue,value);
}

}}

  • Hi,

    Please refer below e2e thread that would help.

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/357512.aspx

    Thank you.

  • Hi,

    I have written given value into address 0x20c00008 but there is no change in the read cycle. I am attaching my files, please let me know where i have gone wrong

    #include "system_init.h"
    #include "interrupt.h"
    #include "core.h"
    #include "pll.h"
    #include "delay.h"
    #include "i2c.h"
    #include "regs.h"
    #include "emifa.h"
    
    #include <stdio.h>
    #include <stdint.h>
    
    #include <csl.h>
    
    Bool Core0_init(void);
    void Core0_main(void);
    void CoreX_main(int coreId);
    
    // **************************************************************************
    // * Common
    // **************************************************************************
    void main(void) {
    
    //	*(Uint32*)0x20C00008 = 0x80000000;
    
    		if(Core0_init())
    			EMIFA_runTest();
    
    
    	while(TRUE); // and continue doing nothing
    	// no return
    }
    
    // **************************************************************************
    // * Core 0
    // **************************************************************************
    Bool Core0_init(void) {
    
    	printf("Hello, I am core 0 and about the initialize the processor\r\n");
    	PLL_init(COREPAC_FREQ_1000MHZ);
    	system_init();
    
    	EMIFA_init();
    
    	printf("Status: init\n");
    	regs_setStatusInit();
    	return TRUE;
    }
    
    
    #include "emifa.h"
    
    #include <cslr_device.h>
    #include <cslr_emif16.h>
    
    #include <stdio.h>
    #include <assert.h>
    
    
    
    // CE DSP Base Adresses
    #define CE2_ADDRESS  0x70000000
    #define CE3_ADDRESS  0x74000000
    #define CE4_ADDRESS  0x78000000
    #define CE5_ADDRESS  0x7C000000
    
    typedef struct {
    	Uint32 baseAddress;
    } EmifaChip;
    
    // **************************************************************************
    // * File static variables
    // **************************************************************************
    
    	#define NUMBER_OF_CHIPS (3)
    	EmifaChip CE[NUMBER_OF_CHIPS] = {CE2_ADDRESS, CE3_ADDRESS, CE4_ADDRESS};
    
    // **************************************************************************
    // * Interface
    // **************************************************************************
    void EMIFA_init(void) {
    	volatile CSL_Emif16Regs* EMIF16_REGS = (CSL_Emif16Regs*)CSL_EMIF16_REGS;
    
    	EMIF16_REGS->RCSR  = 0x00000205;
    	EMIF16_REGS->AWCCR = 0xF0040080;
    	EMIF16_REGS->A0CR  = 0x00000002;
    	EMIF16_REGS->A1CR  = 0x00000002;
    	EMIF16_REGS->A2CR  = 0x00000002;
    	EMIF16_REGS->A3CR  = 0x00000002;
    
    	return;
    }
    
    void EMIFA_write(unsigned chipID, Uint32 internalAddress, Uint16 value) { assert(chipID<NUMBER_OF_CHIPS); {
    	Uint16* pValue = (Uint16*)(CE[chipID].baseAddress + (2*internalAddress));
    	*pValue = value;
    	*pValue = value+1;
    
    
    	return;
    }}
    
    Uint16 EMIFA_read(unsigned chipID, Uint32 internalAddress) { assert(chipID<NUMBER_OF_CHIPS); {
    	Uint32 i;
    	for(i=internalAddress;i<5;i++)
    	{
    	Uint16* pValue = (Uint16*)(CE[chipID].baseAddress + (2*i));
    	Uint16 value = *pValue;
    }
    
    }}
    
    Uint8 EMIFA_runTest(void) {
    	unsigned chipID=0;
    	Uint16 value[2] = {0xABCD, 0x4567};
    	Uint16 readBack = {0};
    	Uint32 internalAddress = 0;
    
    	EMIFA_write(chipID, internalAddress, value[0]);
    	readBack = EMIFA_read(chipID, internalAddress);
    	return 0x00;
    }
    

  • Hi Vamshi,

    There are a number of post concerning throughput of the EMIF16 interface. As stated numerous times on the forum, the EMIF16 was not designed to be a high speed streaming data interface and there are delays between accesses that can't be eliminated. The delay between the output enables that you have observed is not a function of the programming of the EMIF16, it is a function of the delay accessing the EMIF16 IP internally by the software. Many customers achieved better throughput numbers using DMA accesses but we don't have any software examples. Even with the most efficient software, delays in the order of 24 EMIF16 clock between reads have been observed by customers attempting to maximize the throughput. The 170ns that you've observed is pretty close that value. 

    Regards, Bill

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/192245.aspx

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/339211.aspx

  • Hi,

    I am able to write to EMIF in 30ns i.e., it is taking 5 EMIF clock cycles for writing but why i am unable to read in the same way(i.e., in 30ns). Is there any difference between read and write cycle for accessing EMIF 16 IP Internally by software(as you said).

    one more thing is i am getting read strobe and read setup timings as 6ns each but hold time as 160ns.Is there any way to reduce hold time by using EMIF16 only.

    Regards,

    Vamshi

  • Hi,

    I have not seen second link. Now i understood why read access is taking more time.

    Thank you.

  • Hi Vamshi,

    Let me know if you have any other questions.

    Regards, Bill