Hi all,
I studied some discussions about DDR clock calculation. But still got some confused with the datasheet mentioned.
Here was DDR3 PLL block diagram from datasheet. I could not understand what the specific calculation was.
I modified gel file to change PLL2_M and PLL2_D on DDR clock. Then I got the result from oscilloscope as follows.
1. PLL2_M = 19 and PLL2_D = 1
The output DDR clock was 333.33MHz.
2. PLL2_M = 19 and PLL2_D = 0
The output DDR clock was 666.7MHz.
I summarized the DDR PLL calculation was "DDR1333: 66.67MHz(DDRCLK) / (0+1) * (19+1) = 666.67 MHz". Was my inference right? Thanks in advance.
B.R.
OC
