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TMS320C6672 DDR3 issue

We have interfaced 5 DDR3 MT41J128M8 15E (1333) devices to make it a X64  with ECC.

We  configured it as per 5773 DDR3 Register Calc excel sheet. When we observed in memory browser we found that  27th data line was constantly toggling.

What may be the reason for this behavior...

Excel has been attached with this for your reference.

2043.DDR3%20PHY%20Calc%20v8.xls

  • Manjunath,

    The MT41J128M8 is a x8 device.  You cannot create a 64+ECC mamory topology with 5 of them.

    The behavior that you describe is not something that I have seen.  Almost all issues affect whole bytes.  Have you done the length matching correctly?  If so, please provide the table or report showing that the routing rules were met.  Also please provide the PHY_CALC worksheet that you populated.

    Tom