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U-boot boot issue for DM8127 custom board

kartik gandhi
Prodigy 250 points


Hi All,

We have designed a custom board with DM8127.  During bringup we connected it with the CCS via JTAG interface and run .out file after loading GEL file provided by TI FAE (DM813x based).  DDR2 is working fine in that case.  However, with same DDR3 settings we have customized our U-boot accordingly but we are not getting any prompt.

We tried with DM814x GEL (default/ no change) file but it is not working.


We have load the U-boot min using Serial (after CCCC on console) interface and we got a U-boot min prompt and then tried to load U-boot max as well but no success.  We tried "mtest"command from min prompt but no success.

We have checked all our pinmuxing for all IOs being uised in the design and other necessary stuffs but not able to get a prompt.

I have attached a patch (diff) for the changes we have done so far.

Can any body help us here?

Regards,

Kartik Gandhi

  • 0
    TI__Guru**** 170625 points

    Kartik,

    Have you done the DDR3 software leveling?

    http://processors.wiki.ti.com/index.php/TI814x-DDR3-Init-U-Boot

    http://processors.wiki.ti.com/index.php/TI813x-DDR3-Init-U-Boot

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 250 points

    Hi Povel,

    Thanks for your quick reply.  Yes. we did software leveling using DM813x GEL file and associated .out (only for EMIF 0) provided by local TI FAE (support). 

    We got valid values and we have updated GEL file once according to those values and run it one more time and found same (stable) values.  

    Then we dissonnected the core and again connected and loded with the modified GEL file.  Using Memory browser we fill the memory for 0x200 locations starting 0x80000000.

    We could see stable values written and retained in that in the window which gave us confidence that DDR3 on the board is working fine.

    NOTE: We are not using EMIF 1 (DDR1 controller) and only EMIF 0 for 512MB (x2 devices with 128M16) configuration.

    With same register (TImer, LISA and other) like GEL in the U-boot, we are not getting anything on the serial console.

    Kindly suggest any alternate way to debug this issue.

    Regards,

    Kartik Gandhi

  • 0 in reply to kartik gandhi
    TI__Guru**** 170625 points

    Kartik,

    Can you check with the CCS based DDR3 test:

    Mistral Solutions -> CCS_Code_BB -> src -> CCS_Test_code -> Base_Board -> DDR3 -> PG2.1_readme.txt

    You should modify the test according to your specific board design.

    Regards,
    Pavel

  • 0 in reply to kartik gandhi
    TI__Guru**** 170625 points

    Kartik,

    kartik gandhi said:
    NOTE: We are not using EMIF 1 (DDR1 controller) and only EMIF 0 for 512MB (x2 devices with 128M16) configuration.

    Have you applied the below patch?

    http://processors.wiki.ti.com/index.php/TI814x-DDR3-Init-U-Boot#FAQ

    kartik gandhi said:
    With same register (TImer, LISA and other) like GEL in the U-boot, we are not getting anything on the serial console.

    Are you using the same UART console as on the EVM? Refer to the below wiki page for more details on UART console:

    http://processors.wiki.ti.com/index.php/TI81xx_PSP_Porting_Guide#Using_different_UART_than_the_default_EVM_configuration_as_console

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 250 points

    Hi Pavel,

    Yes  we did apply the patch required to disable EMIF 1 and I confirm that we are using UART0 (default)  as a console port.


    Interestingly, we find that if we comment out DDR3 initialization from Uboot-min and do it from CCS and also commenting out the functions where it goes to read CPURev # or something like that in the Board init.

    Below is our procedure to test it.

    1) connect the board with CSS usign JTAG

    2) load GEL file ti813x.gel

    3) run script for 400MHz

    4) Disconnect the board from CCS

    5) After then transfer the U-boot-min binary using serial console (tera term) XMODEM

    6) After doing this we got a U-boot min prompt

    7) We fired a mtest command and it was able to perform withou any error for 10-15mins

    Could you please check and share yoru thouhts on this?  where it can possibly stuck or hang during normal (with Uboot min ddr initialization)?

    Regards,

    Kartik Gandhi

  • 0 in reply to kartik gandhi
    TI__Guru**** 170625 points

    Kartik,

    Several things to check:

    1. If you are using IPNC RDK, apply all missing u-boot patches from the IPNC RDK branch:

    http://arago-project.org/git/projects/?p=u-boot-ipnc-rdk-dm81xx.git;a=shortlog;h=refs/heads/ipncrdk_psp_dm81xx_uboot

    2. Try to decrease (in u-boot) the DDR3 frequency from 400MHz to lower value and see what will happen

    3. Try to debug the u-boot with CCS/JTAG breakpoints/step-by-step flow, to see where exactly hangs. See the below e2e thread for more info:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/331762.aspx

    Regards,
    Pavel