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Problem about AIF2 on C6670

Expert 2985 points

Hi all,

When I tried to connect the C6670 and FPGA(XIlinx K7) through CPRI Link, I met some questions.

My project is based on  this project AIF2_LTE_FDD.zip.

I modify this project to use the CPRI Link1 to connect the K7 under 2x CPRI Rate and normal operation. And the K7's RX port can recovery the clock embedded in C6670 TX data stream. The K7 shows Frame_Sync and DSP also. I think this means that the CPRI link between C6670 and K7 is established well.

As I see it, the AT Timer trigger this func

interrupt void AIF_Symbol_ISR()
{
	uiSymbolCount++;


	/*AIF2 takes at least one frame for synchronization, so lets begin
	real data transfer at frame boundary 2,	push packet one symbol ahead*/
	if((FRMAE_NUM_PACKET*2-1)<=uiSymbolCount)
	{
		SendAxcPackets();
	}
}

And Then 

void SendAxcPackets()
{
	int i, j;
	Uint32 uiPacketSize;
	AifTestInfo testInfo;
	
	testInfo.bGenericPacket= FALSE;
	testInfo.uiMagicNumber= AIF2_MAGIC_NUMBER;

	/*get packet size from look up table according to symbol index*/
	uiPacketSize= packetSizeLut[uiAxcSymbolIndex];

	for(i=0; i<NUM_AIF2_LINK; i++)	//for all links
	{
		if(0==aifLinkCfg[i].linkEnable)
			continue;

		/*for redirection test, DSP1 just redirect the data from DSP 0,
		DSP1 does not generate data*/
		if((0!=uiDSPNum)&&(TEST_PATH_EXTERNAL_REDIRECTION==aifLinkCfg[i].testDataPath))
			continue;

		if(AIF2_GENERIC_DATA_ONLY==aifLinkCfg[i].testDataType)
			continue;

		testInfo.testDataPath= aifLinkCfg[i].testDataPath;
		for(j=aifLinkCfg[i].firstAxcNum; 
			j<aifLinkCfg[i].firstAxcNum+ aifLinkCfg[i].numberAxC; j++)
		{
			testInfo.uiChannelNum= j;
			testInfo.uiSymNum= uiAxcSymbolIndex;
			/*scale packet size according to LTE bandwidth*/
			testInfo.uiPacketSize= uiPacketSize >> aifLinkCfg[i].lteBandwidth;
			testInfo.uiSequenceNum= uiAxcSequenceNum&0x3FFF;
			aifChStat[j].uiNumTxPackets= uiAxcSequenceNum;
			Init_Send_AxC_Packet(&testInfo);
		}
	}
	
	uiAxcSequenceNum++;
	uiAxcSymbolIndex++;
	if(uiAxcSymbolIndex >= FRMAE_NUM_PACKET)
		uiAxcSymbolIndex= 0;
}

And Then

void Init_Send_AxC_Packet(AifTestInfo * testInfo)
{
	Uint32 uiDescriptor;
	Uint32 uiFDQ, uiTxQ;
	unsigned char * ucpBufPointer;
	AIF_Protocol_Descriptor *aifDescriptor;
	MonolithicPacketDescriptor * Descriptor;

	uiFDQ = AIF_FDQ_BASE+ flowTable[testInfo->uiChannelNum];
	uiDescriptor =KeyStone_queuePop(uiFDQ);
	if(0==uiDescriptor)
	{//process data in Rx Queue, recycle the descriptor, and thus get one descriptor 
		uiDescriptor =RecycleDescFromRxQueue(flowTable[testInfo->uiChannelNum]);

		if(0==uiDescriptor)
		{
			printf("Source queue %s descriptor is NULL for channel %d\n", 
				fdqName[uiFDQ-AIF_FDQ_BASE], testInfo->uiChannelNum);
			return;
		}
	}

	/*invalid cache before read descriptor RAM*/
	InvalidCache((void *)uiDescriptor, 64);

	Descriptor= (MonolithicPacketDescriptor *) uiDescriptor;
	Descriptor->psv_word_count= 1;
	aifDescriptor = (AIF_Protocol_Descriptor *)(Descriptor+1);
	aifDescriptor->egress= 1;
	aifDescriptor->axcNum= testInfo->uiChannelNum;
	aifDescriptor->symNum= testInfo->uiSymNum;	
	ucpBufPointer = ((unsigned char *)Descriptor) + 16;
	Descriptor->data_offset= 16;

	Descriptor->packet_length= testInfo->uiPacketSize;
	
	/*the SRC_TAG_LO field in the Tx descriptor is used as RX flow ID
	for loopback/infrastructure mode transfer*/
	Descriptor->src_tag_lo= 
		(testInfo->uiChannelNum);//for buffer DDR data via SL2
	
	/*put the testInfo int the packet,
	it will be verified at the RX side*/
	memcpy(ucpBufPointer, testInfo, sizeof(AifTestInfo));

	/*write back data from cache to buffer*/
	WritebackCache((void *)ucpBufPointer, 64);

#if 0 	/*for debug only*/
	int i;
	for(i=64; i< testInfo->uiPacketSize; i+=16)
	{
		_amem8(&ucpBufPointer[i])= i; 
		_amem8(&ucpBufPointer[i+8])= 0x1111111111111111; 
	}
	WritebackCache((void *)(ucpBufPointer+64), testInfo->uiPacketSize-64);
#endif

	/*write back data from cache to descriptor RAM*/
	WritebackCache((void *)uiDescriptor, 64);

	uiTxQ = QMSS_AIF_QUEUE_BASE+testInfo->uiChannelNum;
	
	_mfence(); 	//force all memory operation complete
	_mfence(); 	//force all memory operation complete
	KeyStone_queuePush(uiTxQ, uiDescriptor|FETCH_SIZE_64);
}

In the func Init_Send_AxC_Packet(), the Monolithic Descriptor is 12 bytes followed by the Protocol Spec Info aifDescriptor with 4 Bytes. And the following is the Data Buffer.

I change

memcpy(ucpBufPointer, testInfo, sizeof(AifTestInfo));

to

memcpy(ucpBufPointer, 0x11, testInfo->uiPacketSize);

So the Data Buffer is full of 0x11 and then these 0x11 will be send out of the C6670 to FPGA K7.

But in the K7, I can not capture any 0x11 when I set the trigger condition to RX=0x1111.

And then I set the trigger condition to RX=C5BC(K28.7), I capture some strange data showing in the pic below

Can anyone interpret the relationships between 0303\C303\C0C0 and 0x1111???

Hope for any replies!!

Thanks!