HI,TIer.
Now I debug a linux audio driver for PCM1865 which connects to TMS320DM8168.
When I read the kernel code, I found that in DVRRDK_kernel_dir/sound/soc/davinci/davinci-mcasp.c(In a general linux, it is the same case)
function static void davinci_hw_param(struct davinci_audio_dev *dev, int stream)
....
mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);
....
This setting is both for all mode.Why clear the bit four(FSRDUR)? In DM8168, it means that the FrameSync width is a single bit.But, in a typical I2S mode, FrameSnc(LRCK or WCLK) is a word width,common 16bit wide. In a DSP mode,for example, for TVP5158 transferring multi channel audio, it can be a single bit wide.
So,Why set the framesync(LRCK) width to be a single bit in all modes?
BR!
