Porting of DDR, LAN & PMIC

/*
 * drivers/net/phy/national.c
 *
 * Driver for National Semiconductor PHYs
 *
 * Author: Stuart Menefy <stuart.menefy@st.com>
 * Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *
 * Copyright (c) 2008 STMicroelectronics Limited
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
#include <linux/netdevice.h>

#define DEBUG

// ADDED BY SRINI DP83848 SUPPORT FOR TUNSTALL AM335x CUSTOM BOARD
/* DP83848 phy identifier values */
#define DP83848_PHY_ID	0x20005c90

#define DP83848_EDCR 0x1D /*Energy Detect Control */
#define DP83848_energy_detect_en 0xE81F /* Energy Detect Enable */
#define DP83848_BMCR 0x00
#define DP83848_PHYCR 0x19
#define DP83848_PHYSTS 0x10
#define DP83848_MICR 0x11 /* MICR */
#define DP83848_MISR 0x12 /* MISR */
#define DP83848_INT_EVENTS 0x007f
#if 0

/* DP83865 phy identifier values */
#define DP83865_PHY_ID	0x20005c7a

#define DP83865_INT_STATUS	0x14
#define DP83865_INT_MASK	0x15
#define DP83865_INT_CLEAR	0x17

#define DP83865_INT_REMOTE_FAULT 0x0008
#define DP83865_INT_ANE_COMPLETED 0x0010
#define DP83865_INT_LINK_CHANGE	0xe000
#define DP83865_INT_MASK_DEFAULT (DP83865_INT_REMOTE_FAULT | \
				DP83865_INT_ANE_COMPLETED | \
				DP83865_INT_LINK_CHANGE)

/* Advanced proprietary configuration */
#define NS_EXP_MEM_CTL	0x16
#define NS_EXP_MEM_DATA	0x1d
#define NS_EXP_MEM_ADD	0x1e

#define LED_CTRL_REG 0x13
#define AN_FALLBACK_AN 0x0001
#define AN_FALLBACK_CRC 0x0002
#define AN_FALLBACK_IE 0x0004
#define ALL_FALLBACK_ON (AN_FALLBACK_AN |  AN_FALLBACK_CRC | AN_FALLBACK_IE)

enum hdx_loopback {
	hdx_loopback_on = 0,
	hdx_loopback_off = 1,
};

static u8 ns_exp_read(struct phy_device *phydev, u16 reg)
{
	phy_write(phydev, NS_EXP_MEM_ADD, reg);
	return phy_read(phydev, NS_EXP_MEM_DATA);
}

static void ns_exp_write(struct phy_device *phydev, u16 reg, u8 data)
{
	phy_write(phydev, NS_EXP_MEM_ADD, reg);
	phy_write(phydev, NS_EXP_MEM_DATA, data);
}

static int ns_config_intr(struct phy_device *phydev)
{
	int err;

	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
		err = phy_write(phydev, DP83865_INT_MASK,
				DP83865_INT_MASK_DEFAULT);
	else
		err = phy_write(phydev, DP83865_INT_MASK, 0);

	return err;
}

static int ns_ack_interrupt(struct phy_device *phydev)
{
	int ret = phy_read(phydev, DP83865_INT_STATUS);
	if (ret < 0)
		return ret;

	/* Clear the interrupt status bit by writing a “1”
	 * to the corresponding bit in INT_CLEAR (2:0 are reserved) */
	ret = phy_write(phydev, DP83865_INT_CLEAR, ret & ~0x7);

	return ret;
}

static void ns_giga_speed_fallback(struct phy_device *phydev, int mode)
{
	int bmcr = phy_read(phydev, MII_BMCR);

	phy_write(phydev, MII_BMCR, (bmcr | BMCR_PDOWN));

	/* Enable 8 bit expended memory read/write (no auto increment) */
	phy_write(phydev, NS_EXP_MEM_CTL, 0);
	phy_write(phydev, NS_EXP_MEM_ADD, 0x1C0);
	phy_write(phydev, NS_EXP_MEM_DATA, 0x0008);
	phy_write(phydev, MII_BMCR, (bmcr & ~BMCR_PDOWN));
	phy_write(phydev, LED_CTRL_REG, mode);
}

static void ns_10_base_t_hdx_loopack(struct phy_device *phydev, int disable)
{
	if (disable)
		ns_exp_write(phydev, 0x1c0, ns_exp_read(phydev, 0x1c0) | 1);
	else
		ns_exp_write(phydev, 0x1c0,
			     ns_exp_read(phydev, 0x1c0) & 0xfffe);

	pr_debug("10BASE-T HDX loopback %s\n",
		 (ns_exp_read(phydev, 0x1c0) & 0x0001) ? "off" : "on");
}

static int ns_config_init(struct phy_device *phydev)
{
	ns_giga_speed_fallback(phydev, ALL_FALLBACK_ON);
	/* In the latest MAC or switches design, the 10 Mbps loopback
	   is desired to be turned off. */
	ns_10_base_t_hdx_loopack(phydev, hdx_loopback_off);
	return ns_ack_interrupt(phydev);
}

static struct phy_driver dp83865_driver = {
	.phy_id = DP83865_PHY_ID,
	.phy_id_mask = 0xfffffff0,
	.name = "NatSemi DP83865",
	.features = PHY_GBIT_FEATURES | SUPPORTED_Pause | SUPPORTED_Asym_Pause,
	.flags = PHY_HAS_INTERRUPT,
	.config_init = ns_config_init,
	.config_aneg = genphy_config_aneg,
	.read_status = genphy_read_status,
	.ack_interrupt = ns_ack_interrupt,
	.config_intr = ns_config_intr,
	.driver = {.owner = THIS_MODULE,}
};
#endif

#if 0
static int dp83848_phy_config_intr(struct phy_device *phydev)
{
	int val;

	val = phy_write (phydev, DP83848_MISR,
			((PHY_INTERRUPT_ENABLED == phydev->interrupts)
			? 0x7F
			: 0));
//	printk("\nIn config_intr MISR value: %x, phydev->interrupts=%x\n", val,phydev->interrupts);
	return val < 0 ? val : 0;
}
#endif

static int dp83848_phy_ack_interrupt(struct phy_device *phydev)
{
	int ret = phy_read(phydev, DP83848_MISR);
	int value, /*data,*/value_link,value_speed,value_duplex,a,b;
	if (ret < 0)
		return ret;
    
	value=ret & 0x4000;	

	value_link=ret & 0x2000;	
	value_speed=ret & 0x1000;	
	value_duplex=ret & 0x0800;	

	//printk("\n Entering dp83848_phy_ack_interrupt FUNCTION\n");

	if((value>0))
	{
		//printk("\n Energy detect interrupt\n");
		
		a = phy_read(phydev, DP83848_EDCR);
		b= a &0x0400;
		if(b==0)
		{
		//printk("\n Entering energy detect mode\n");
		}
		else 
		{
	 //	printk("\n Entering normal mode of operation\n");

		}

		if(value_link>0)
		{
		//printk("\n Link status interrupt\n");
		}

	        if(value_speed>0)
		{
		//printk("\n Speed status interrupt\n");
		}

		if(value_duplex>0)
		{
	//printk("\n Duplex status interrupt\n");
		}
    }

	return 0;
}

static int dp83848_phy_config_init(struct phy_device *phydev)
{
	int val = phy_read(phydev, DP83848_EDCR);
	int value,data;
	if (val < 0)
		return val;
	
	phy_write(phydev, DP83848_MICR, 0x0003); /*Enabling interrupts */

	phy_write(phydev, DP83848_MISR, 0x007F);
       
	/*Enable energy detect control */
        value = phy_write(phydev, DP83848_EDCR, val | DP83848_energy_detect_en);

      value=phy_read(phydev, DP83848_EDCR);
	printk("\n Energy Value: ");
      printk(" %x",value);

	value=phy_read(phydev, DP83848_PHYCR);
	printk("\n Phy control register to check for AUTO-MDIX: ");
       printk(" %x",value);
        
 
       value=phy_read(phydev, DP83848_PHYSTS);
         
	data=value & 0x4000;
	
	if(data>0)
	{
	printk("\n MDI pairs swapped\n");
	}
	else 
	{
	printk("\n MDI pairs normal\n");
	}

	return dp83848_phy_ack_interrupt(phydev);

}

static int phy_probe(struct phy_device *phydev)
{
phydev->irq=42;	
printk("\n Entering phy_probe\n");
return 0;
};


static struct phy_driver dp83848_driver = {
	.phy_id		= DP83848_PHY_ID,
	.phy_id_mask	= 0xfffffff0,
	.name		= "DP83848 PHY",
	.features	= PHY_BASIC_FEATURES,
	.flags		= PHY_HAS_INTERRUPT,
	.probe		= phy_probe,	
	
	/* basic functions */
	
	.config_aneg	= genphy_config_aneg,
	.read_status	= genphy_read_status,
        .config_init	= dp83848_phy_config_init,

	/* interrupt related */
	.ack_interrupt	= dp83848_phy_ack_interrupt,
//	.config_intr	= dp83848_phy_config_intr,
   	
	.driver		= {.owner = THIS_MODULE,}
};
static int __init ns_init(void)
{
	//return phy_driver_register(&dp83865_driver);
	return phy_driver_register(&dp83848_driver);
}

static void __exit ns_exit(void)
{
	//phy_driver_unregister(&dp83865_driver);
	phy_driver_unregister(&dp83848_driver);
}

MODULE_DESCRIPTION("NatSemi PHY driver");
MODULE_AUTHOR("Stuart Menefy");
MODULE_LICENSE("GPL");

module_init(ns_init);
module_exit(ns_exit);

static struct mdio_device_id __maybe_unused ns_tbl[] = {
	//{ DP83865_PHY_ID, 0xfffffff0 },
	{ DP83848_PHY_ID, 0xfffffff0 },	
	{ }
};

MODULE_DEVICE_TABLE(mdio, ns_tbl);

/*
 * drivers/net/phy/national.c
 *
 * Driver for National Semiconductor PHYs
 *
 * Author: Stuart Menefy <stuart.menefy@st.com>
 * Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *
 * Copyright (c) 2008 STMicroelectronics Limited
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
#include <linux/netdevice.h>

#define DEBUG

// ADDED BY SRINI DP83848 SUPPORT FOR TUNSTALL AM335x CUSTOM BOARD
/* DP83848 phy identifier values */
#define DP83848_PHY_ID	0x20005c90

#define DP83848_EDCR 0x1D 	/*Energy Detect Control */
#define DP83848_energy_detect_en 0xE81F /* Energy Detect Enable */
#define DP83848_BMCR 0x00
#define DP83848_PHYCR 0x19
#define DP83848_PHYSTS 0x10
#define DP83848_MICR 0x11 	/* MICR */
#define DP83848_MISR 0x12 	/* MISR */
#define DP83848_RBR 0x17 	/* RMII */
#define DP83848_ANAR 0x04 	/* Auto-Negotiation Advertisement */
#define DP83848_INT_EVENTS 0x007f

#if 0
static int dp83848_phy_config_intr(struct phy_device *phydev)
{
	int val;

	val = phy_write (phydev, DP83848_MISR,
			((PHY_INTERRUPT_ENABLED == phydev->interrupts)
			? 0x7F
			: 0));
//	printk("\nIn config_intr MISR value: %x, phydev->interrupts=%x\n", val,phydev->interrupts);
	return val < 0 ? val : 0;
}
#endif

static int dp83848_phy_ack_interrupt(struct phy_device *phydev)
{
	int ret = phy_read(phydev, DP83848_MISR);
	int value, /*data,*/value_link,value_speed,value_duplex,a,b;
	if (ret < 0)
		return ret;

	value=ret & 0x4000;

	value_link=ret & 0x2000;
	value_speed=ret & 0x1000;
	value_duplex=ret & 0x0800;

	//printk("\n Entering dp83848_phy_ack_interrupt FUNCTION\n");

	if((value>0))
	{
		//printk("\n Energy detect interrupt\n");

		a = phy_read(phydev, DP83848_EDCR);
		b= a &0x0400;
		if(b==0)
		{
		//printk("\n Entering energy detect mode\n");
		}
		else
		{
	 //	printk("\n Entering normal mode of operation\n");

		}

		if(value_link>0)
		{
		//printk("\n Link status interrupt\n");
		}

	        if(value_speed>0)
		{
		//printk("\n Speed status interrupt\n");
		}

		if(value_duplex>0)
		{
	//printk("\n Duplex status interrupt\n");
		}
    }

	return 0;
}

static int dp83848_phy_config_init(struct phy_device *phydev)
{
	int val = phy_read(phydev, DP83848_EDCR);
	int value,data;
	if (val < 0)
		return val;

	phy_write(phydev, DP83848_BMCR, 0x8000);
	value=phy_read(phydev, DP83848_BMCR);
	printk("\n BMCR: %x", value);

	/* Enable RMII mode */
	phy_write(phydev, DP83848_RBR, 0x0031);
	value=phy_read(phydev, DP83848_RBR);
	printk("\n RBR: %x", value);

	/* Auto-Negotiation */
	phy_write(phydev, DP83848_ANAR, 0x01F1);
	value=phy_read(phydev, DP83848_ANAR);
	printk("\n ANAR: %x", value);

	/* Enable energy detect control */
        value = phy_write(phydev, DP83848_EDCR, DP83848_energy_detect_en);
      	value=phy_read(phydev, DP83848_EDCR);
	printk("\n Energy Value: %x", value);

	/* Enabling interrupts */
	// phy_write(phydev, DP83848_MICR, 0x0003); 
	// value=phy_read(phydev, DP83848_MICR);
	// printk("\n MICR: %x", value);

	// value=phy_read(phydev, DP83848_MISR);
	// printk("\n MISR: %x", value);

	value=phy_read(phydev, DP83848_PHYCR);
	printk("\n Phy control register to check for AUTO-MDIX: %x", value);

       	value=phy_read(phydev, DP83848_PHYSTS);
       	printk("\n PHYSTS 0x%x", value);

	data=value & 0x4000;

	if(data>0)
	{
	printk("\n MDI pairs swapped\n");
	}
	else
	{
	printk("\n MDI pairs normal\n");
	}

	return dp83848_phy_ack_interrupt(phydev);

}

static int phy_probe(struct phy_device *phydev)
{
phydev->irq=42;
printk("\n Entering phy_probe\n");
return 0;
};


static struct phy_driver dp83848_driver = {
	.phy_id		= DP83848_PHY_ID,
	.phy_id_mask	= 0x3FFFFFF0, //0xfffffff0,
	.name		= "DP83848 PHY",
	.features	= PHY_BASIC_FEATURES,
	.flags		= PHY_HAS_INTERRUPT,
	.probe		= phy_probe,

	/* basic functions */

	.config_aneg	= genphy_config_aneg,
	.read_status	= genphy_read_status,
        .config_init	= dp83848_phy_config_init,

	/* interrupt related */
	.ack_interrupt	= dp83848_phy_ack_interrupt,
	//.config_intr	= dp83848_phy_config_intr,

	.driver		= {.owner = THIS_MODULE,}
};
static int __init ns_init(void)
{
	return phy_driver_register(&dp83848_driver);
}

static void __exit ns_exit(void)
{
	phy_driver_unregister(&dp83848_driver);
}

MODULE_DESCRIPTION("NatSemi DP83848 PHY driver");
MODULE_AUTHOR("Stuart Menefy");
MODULE_LICENSE("GPL");

module_init(ns_init);
module_exit(ns_exit);

static struct mdio_device_id __maybe_unused ns_tbl[] = {
	{ DP83848_PHY_ID, 0xfffffff0 },
	{ }
};

MODULE_DEVICE_TABLE(mdio, ns_tbl);