AM335x EMAC MII Clock Cycle time

Hi Daisuke,

I don't understand what is the concern here. Yes, the tolerances  for MII RX/TX clocks in the AM335X Datasheet are 25MHz ± 100 ppm. Why should this be difficult to achieve?

Hi Biser-san,

Thank you for your reply.

Our customer measures the cycle time of RX_CLK and TX_CLK on their board and sees that it does not meet the requirements. Could you tell me the solution for them to achieve it? Should they use an external low-jitter oscillator for reference clock source to both the PHY and the AM335x?

Best regards,

Daisuke

Hi Biser-san,

Thank you for your reply.

I will ask the customer about the PHY they use.

There is other question. Is the cycle time referenced to 50% I/O voltage, i.e. 1.65V for 1.8V I/O voltage and 0.9V for 1.8V I/O voltage, for both high and low switching levels?

Best regards,

Daisuke

Cycle times are measured at 50%, rise and fall times are measured from 10% to 90%.

Hi Biser-san,

Thank you for your reply.

Are rise and fall times not measured from VIL MAX to VIH MIN, or from VOL MAX to VOH MIN?

You gave me the answer here: e2e.ti.com/.../424546

Best regards,

Daisuke

Hi Biser-san,

Because our customer uses the 2.5V I/O voltage for the PHY they use, they will change it to 3.3V.

Thank you for your help. Sorry for taking your precious time.

Best regards,

Daisuke

Hi Biser-san,

Thank you for your reply.

Best regards,

Daisuke