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nBE1/nBE0 signals on GPMC module of AM335x

Michi Yama
Guru 10030 points

I would like to know regarding GPMC singals nBE1/nBE0.

If CS1 region is set as the below, can we see the nBE1/nBE0 output signal? Pinmux is correct. Becuase GPMC works correctly when 16bit mode setting.

CS1:

8bit as device size

NOR flash as device type

non-multiplexed mode

 Pinmux is correct. Becuase GPMC works correctly when 16bit mode setting. The symptom occurs only when 8bit mode setting.

I found similar problem as the following site. But I coud not find its answer.

e2e.ti.com/.../301139

This quston is from my customer.

Our customer said as the below.

nBE1 is always high level. And then nBE0 is always low level in 8bit mode.

But nBE1 and nBE0 is fine when 16bit mode.

Are the behavior of nBE1/nBE0 signals correct?

Please advise me.

I appreciate your quick reply.

Best regards,

Michi

  • 0
    TI__Guru**** 161600 points
    Hi Michi,

    Check Section 7.1.3.3.8.3.12 Byte Enable (BE1n/BE0n) in AM335x TRM.

    What kind of gpmc access are you using?
    Synchronous/asynchronous multiple/single read/write ?

    Also can you share the dts & used linux version?

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    Guru 10030 points

    Dear Yordan-san,

    Thank you for your reply.

    I use asynchronous single read/write.

    Then, I don't use Linux OS. I use WEC7 OS.

    Best regards,

    Michi

  • 0 in reply to Michi Yama
    TI__Guru**** 161600 points
    Hi,

    In that case the behaviour of BE0/1 should be:
    Valid (asserted or nonasserted according to the incoming system request) from access start to access completion for asynchronous and synchronous single accesses.

    Unfortunately, I am not familiar with WEC7 OS, we support only Linux here, so I cannot help with kernel programming/settings.

    Can you provide a GPMC register dump?

    Best Regards,
    Yordan
  • 0
    Genius 3685 points

    If you have a buswidth of 8bit == 1byte, then all accesses of the GPMC are to this (lower) byte, and therefore nBE0 is active all the time, and nBE1 is inactive all the time, because there are no access to bit 8..15 of the data bus.

    So yes, this is the expected behaviour. Nobody needs nBE1 in 8bit mode, because the device is only using data bus bit 0..7.

    regards

    Wolfgang

  • 0 in reply to Wolfgang Muees1
    Guru 10030 points

    Dear　Wolfgang-san,

    Thank you for your comment.

    Please let me confirm you said.

    For example, 

    When accessing from 0h to 3h in 8bit mode, address bus work as the below.

    Access to 0h      A3 : A0 signals : 0000

    Access to 1h      A3 : A0 signals : 0001

    Access to 2h      A3 : A0 signals : 0010

    Access to 3h      A3 : A0 signals  : 0011

    In this case, I expect nBE1/nBE0 signals work as the below.

    Access to 0h      nBE1 : nBe0 signals : 10

    Access to 1h      nBE1 : nBe0 signals : 01

    Access to 2h      nBE1 : nBe0 signals : 10

    Access to 3h      nBE1 : nBe0 signals : 01

    But, in fact, nBE1/nBE0 signals work as the below.

    Access to 0h      nBE1 : nBe0 signals : 10

    Access to 1h      nBE1 : nBe0 signals : 10

    Access to 2h      nBE1 : nBe0 signals : 10

    Access to 3h      nBE1 : nBe0 signals : 10

    Does this fact prove your comment? 

     Also, according to AM335x TRM Table 7-5 GPMC pin Multplexing Options, GPMC_AD[15] - GPMC_AD[8] signals are not used in "Non Multplexed Address data 8-Bit Device". Does this also prove your comment?

    I appreciate your quick reply.

    Best regards,

    Michi

  • 0 in reply to Michi Yama
    Genius 3685 points
    BE0 and BE1 are "byte enables". They are low if data is transferred to a specific byte on the data bus.

    BE0 is active for a data transfer on D0...D7.
    BE1 is active for a data transfer on D8..D15.

    For 8 bit devices, all data is transferred on D0..D7.